board/pcippc2/pcippc2.c

   1 /*
   2  * (C) Copyright 2002
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <config.h>
  25 #include <common.h>
  26 #include <command.h>
  27 #include <asm/io.h>
  28 #include <linux/mtd/doc2000.h>
  29 #include <watchdog.h>
  30 #include <pci.h>
  31
  32 #include "hardware.h"
  33 #include "pcippc2.h"
  34 #include "sconsole.h"
  35 #include "fpga_serial.h"
  36
  37 #if defined(CONFIG_WATCHDOG)
  38
  39 static int pcippc2_wdt_init_done = 0;
  40
  41 void pcippc2_wdt_init (void);
  42
  43 #endif
  44
  45   /* Check board identity
  46    */
  47 int checkboard (void)
  48 {
  49 #ifdef CONFIG_PCIPPC2
  50         puts ("Board: Gespac PCIPPC-2\n");
  51 #else
  52         puts ("Board: Gespac PCIPPC-6\n");
  53 #endif
  54         return 0;
  55 }
  56
  57   /* RAM size is stored in CPC0_RGBAN1
  58    */
  59 u32 pcippc2_sdram_size (void)
  60 {
  61         return in32 (REG (CPC0, RGBAN1));
  62 }
  63
  64 long initdram (int board_type)
  65 {
  66         return cpc710_ram_init ();
  67 }
  68
  69 void do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
  70 {
  71         out32 (REG (CPC0, SPOR), 0);
  72         iobarrier_rw ();
  73         while (1);
  74 }
  75
  76 int board_pre_init (void)
  77 {
  78         out32 (REG (CPC0, RSTR), 0xC0000000);
  79         iobarrier_rw ();
  80
  81         out32 (REG (CPC0, RSTR), 0xF0000000);
  82         iobarrier_rw ();
  83
  84         out32 (REG (CPC0, UCTL), 0x00F80000);
  85
  86         out32 (REG (CPC0, SIOC0), 0x30000000);
  87
  88         out32 (REG (CPC0, ABCNTL), 0x00000000);
  89
  90         out32 (REG (CPC0, SESR), 0x00000000);
  91         out32 (REG (CPC0, SEAR), 0x00000000);
  92
  93         /* Detect IBM Avignon CPC710 Revision */
  94         if ((in32 (REG (CPC0, UCTL)) & 0x000000F0) == CPC710_TYPE_100P)
  95                 out32 (REG (CPC0, PGCHP), 0xA0000040);
  96         else
  97                 out32 (REG (CPC0, PGCHP), 0x80800040);
  98
  99
 100         out32 (REG (CPC0, ATAS), 0x709C2508);
 101
 102         iobarrier_rw ();
 103
 104         return 0;
 105 }
 106
 107 void after_reloc (ulong dest_addr)
 108 {
 109         DECLARE_GLOBAL_DATA_PTR;
 110
 111         /* Jump to the main U-Boot board init code
 112          */
 113         board_init_r (gd, dest_addr);
 114 }
 115
 116 int misc_init_r (void)
 117 {
 118         pcippc2_fpga_init ();
 119
 120         pcippc2_cpci3264_init ();
 121
 122 #if defined(CONFIG_WATCHDOG)
 123         pcippc2_wdt_init ();
 124 #endif
 125
 126         fpga_serial_init (sconsole_get_baudrate ());
 127
 128         sconsole_putc   = fpga_serial_putc;
 129         sconsole_puts   = fpga_serial_puts;
 130         sconsole_getc   = fpga_serial_getc;
 131         sconsole_tstc   = fpga_serial_tstc;
 132         sconsole_setbrg = fpga_serial_setbrg;
 133
 134         sconsole_flush ();
 135         return (0);
 136 }
 137
 138 void pci_init_board (void)
 139 {
 140         cpc710_pci_init ();
 141
 142         /* FPGA requires no retry timeouts to be enabled
 143          */
 144         cpc710_pci_enable_timeout ();
 145 }
 146
 147 void doc_init (void)
 148 {
 149         doc_probe (pcippc2_fpga1_phys + HW_FPGA1_DOC);
 150 }
 151
 152 void pcippc2_cpci3264_init (void)
 153 {
 154   pci_dev_t             bdf = pci_find_device(FPGA_VENDOR_ID, FPGA_DEVICE_ID, 0);
 155
 156   if (bdf == -1)
 157   {
 158     puts("Unable to find FPGA !\n");
 159     hang();
 160   }
 161
 162         if((in32(pcippc2_fpga0_phys + HW_FPGA0_BOARD) & 0x01000000) == 0x01000000)
 163         /* 32-bits Compact PCI bus - LSB bit */
 164         {
 165                 iobarrier_rw();
 166                 out32(BRIDGE(CPCI, PCIDG), 0x40000000); /* 32-bits bridge, Pipeline */
 167                 iobarrier_rw();
 168         }
 169 }
 170
 171 #if defined(CONFIG_WATCHDOG)
 172
 173 void pcippc2_wdt_init (void)
 174 {
 175         out16r (FPGA (WDT, PROG), 0xffff);
 176         out8 (FPGA (WDT, CTRL), 0x1);
 177
 178         pcippc2_wdt_init_done = 1;
 179 }
 180
 181 void pcippc2_wdt_done (void)
 182 {
 183         out8 (FPGA (WDT, CTRL), 0x0);
 184
 185         pcippc2_wdt_init_done = 0;
 186 }
 187
 188 void pcippc2_wdt_reset (void)
 189 {
 190         if (pcippc2_wdt_init_done == 1)
 191                 out8 (FPGA (WDT, REFRESH), 0x56);
 192 }
 193
 194 void watchdog_reset (void)
 195 {
 196         int re_enable = disable_interrupts ();
 197
 198         pcippc2_wdt_reset ();
 199         if (re_enable)
 200                 enable_interrupts ();
 201 }
 202
 203 #if (CONFIG_COMMANDS & CFG_CMD_BSP)
 204 int do_wd (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 205 {
 206         switch (argc) {
 207         case 1:
 208                 printf ("Watchdog timer status is %s\n",
 209                         pcippc2_wdt_init_done == 1 ? "on" : "off");
 210
 211                 return 0;
 212         case 2:
 213                 if (!strcmp(argv[1],"on")) {
 214                         pcippc2_wdt_init();
 215                         printf("Watchdog timer now is on\n");
 216
 217                         return 0;
 218
 219                 } else if (!strcmp(argv[1],"off")) {
 220                         pcippc2_wdt_done();
 221                         printf("Watchdog timer now is off\n");
 222
 223                         return 0;
 224
 225                 } else
 226                         break;
 227         default:
 228                 break;
 229         }
 230         printf ("Usage:\n%s\n", cmdtp->usage);
 231         return 1;
 232 }
 233
 234 #endif  /* CFG_CMD_BSP */
 235 #endif  /* CONFIG_WATCHDOG */