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zynq: add UART nodes to device tree to initialize UART with OF
[people/ms/u-boot.git] / board / samsung / smdk5420 / smdk5420.c
1 /*
2 * Copyright (C) 2013 Samsung Electronics
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #include <common.h>
8 #include <fdtdec.h>
9 #include <asm/io.h>
10 #include <i2c.h>
11 #include <lcd.h>
12 #include <spi.h>
13 #include <asm/arch/board.h>
14 #include <asm/arch/cpu.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/pinmux.h>
17 #include <asm/arch/dp_info.h>
18
19 DECLARE_GLOBAL_DATA_PTR;
20
21 #ifdef CONFIG_USB_EHCI_EXYNOS
22 static int board_usb_vbus_init(void)
23 {
24 struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
25 samsung_get_base_gpio_part1();
26
27 /* Enable VBUS power switch */
28 s5p_gpio_direction_output(&gpio1->x2, 6, 1);
29
30 /* VBUS turn ON time */
31 mdelay(3);
32
33 return 0;
34 }
35 #endif
36
37 int exynos_init(void)
38 {
39 #ifdef CONFIG_USB_EHCI_EXYNOS
40 board_usb_vbus_init();
41 #endif
42 return 0;
43 }
44
45 #ifdef CONFIG_LCD
46 void cfg_lcd_gpio(void)
47 {
48 struct exynos5_gpio_part1 *gpio1 =
49 (struct exynos5_gpio_part1 *)samsung_get_base_gpio_part1();
50
51 /* For Backlight */
52 s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT);
53 s5p_gpio_set_value(&gpio1->b2, 0, 1);
54
55 /* LCD power on */
56 s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT);
57 s5p_gpio_set_value(&gpio1->x1, 5, 1);
58
59 /* Set Hotplug detect for DP */
60 s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3));
61 }
62
63 vidinfo_t panel_info = {
64 .vl_freq = 60,
65 .vl_col = 2560,
66 .vl_row = 1600,
67 .vl_width = 2560,
68 .vl_height = 1600,
69 .vl_clkp = CONFIG_SYS_LOW,
70 .vl_hsp = CONFIG_SYS_LOW,
71 .vl_vsp = CONFIG_SYS_LOW,
72 .vl_dp = CONFIG_SYS_LOW,
73 .vl_bpix = 4, /* LCD_BPP = 2^4, for output conosle on LCD */
74
75 /* wDP panel timing infomation */
76 .vl_hspw = 32,
77 .vl_hbpd = 80,
78 .vl_hfpd = 48,
79
80 .vl_vspw = 6,
81 .vl_vbpd = 37,
82 .vl_vfpd = 3,
83 .vl_cmd_allow_len = 0xf,
84
85 .win_id = 3,
86 .cfg_gpio = cfg_lcd_gpio,
87 .backlight_on = NULL,
88 .lcd_power_on = NULL,
89 .reset_lcd = NULL,
90 .dual_lcd_enabled = 0,
91
92 .init_delay = 0,
93 .power_on_delay = 0,
94 .reset_delay = 0,
95 .interface_mode = FIMD_RGB_INTERFACE,
96 .dp_enabled = 1,
97 };
98
99 static struct edp_device_info edp_info = {
100 .disp_info = {
101 .h_res = 2560,
102 .h_sync_width = 32,
103 .h_back_porch = 80,
104 .h_front_porch = 48,
105 .v_res = 1600,
106 .v_sync_width = 6,
107 .v_back_porch = 37,
108 .v_front_porch = 3,
109 .v_sync_rate = 60,
110 },
111 .lt_info = {
112 .lt_status = DP_LT_NONE,
113 },
114 .video_info = {
115 .master_mode = 0,
116 .bist_mode = DP_DISABLE,
117 .bist_pattern = NO_PATTERN,
118 .h_sync_polarity = 0,
119 .v_sync_polarity = 0,
120 .interlaced = 0,
121 .color_space = COLOR_RGB,
122 .dynamic_range = VESA,
123 .ycbcr_coeff = COLOR_YCBCR601,
124 .color_depth = COLOR_8,
125 },
126 };
127
128 static struct exynos_dp_platform_data dp_platform_data = {
129 .phy_enable = set_dp_phy_ctrl,
130 .edp_dev_info = &edp_info,
131 };
132
133 void init_panel_info(vidinfo_t *vid)
134 {
135 vid->rgb_mode = MODE_RGB_P;
136
137 exynos_set_dp_platform_data(&dp_platform_data);
138 }
139 #endif
140
141 int board_get_revision(void)
142 {
143 return 0;
144 }