board/sandburst/common/sb_common.c

   1 /*
   2  *  Copyright (C) 2005 Sandburst Corporation
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22 #include <config.h>
  23 #include <common.h>
  24 #include <command.h>
  25 #include <asm/processor.h>
  26 #include <asm/io.h>
  27 #include <spd_sdram.h>
  28 #include <i2c.h>
  29 #include "sb_common.h"
  30
  31 DECLARE_GLOBAL_DATA_PTR;
  32
  33 long int fixed_sdram (void);
  34
  35 /*************************************************************************
  36  *  metrobox_get_master
  37  *
  38  *  PRI_N - active low signal.  If the GPIO pin is low we are the master
  39  *
  40  ************************************************************************/
  41 int sbcommon_get_master(void)
  42 {
  43         ppc440_gpio_regs_t *gpio_regs;
  44
  45         gpio_regs = (ppc440_gpio_regs_t *)CONFIG_SYS_GPIO_BASE;
  46
  47         if (gpio_regs->in & SBCOMMON_GPIO_PRI_N) {
  48                 return 0;
  49         }
  50         else {
  51                 return 1;
  52         }
  53 }
  54
  55 /*************************************************************************
  56  *  metrobox_secondary_present
  57  *
  58  *  Figure out if secondary/slave board is present
  59  *
  60  ************************************************************************/
  61 int sbcommon_secondary_present(void)
  62 {
  63         ppc440_gpio_regs_t *gpio_regs;
  64
  65         gpio_regs = (ppc440_gpio_regs_t *)CONFIG_SYS_GPIO_BASE;
  66
  67         if (gpio_regs->in & SBCOMMON_GPIO_SEC_PRES)
  68                 return 0;
  69         else
  70                 return 1;
  71 }
  72
  73 /*************************************************************************
  74  *  sbcommon_get_serial_number
  75  *
  76  *  Retrieve the board serial number via the mac address in eeprom
  77  *
  78  ************************************************************************/
  79 unsigned short sbcommon_get_serial_number(void)
  80 {
  81         unsigned char buff[0x100];
  82         unsigned short sernum;
  83
  84         /* Get the board serial number from eeprom */
  85         /* Initialize I2C */
  86         i2c_set_bus_num(0);
  87
  88         /* Read 256 bytes in EEPROM */
  89         i2c_read (0x50, 0, 1, buff, 0x100);
  90
  91         memcpy(&sernum, &buff[0xF4], 2);
  92         sernum /= 32;
  93
  94         return (sernum);
  95 }
  96
  97 /*************************************************************************
  98  *  sbcommon_fans
  99  *
 100  *  Spin up fans 2 & 3 to get some air moving.  OS will take care
 101  *  of the rest.  This is mostly a precaution...
 102  *
 103  *  Assumes i2c bus 1 is ready.
 104  *
 105  ************************************************************************/
 106 void sbcommon_fans(void)
 107 {
 108         /*
 109          * Attempt to turn on 2 of the fans...
 110          * Need to go through the bridge
 111          */
 112         i2c_set_bus_num(1);
 113         puts ("FANS:  ");
 114
 115         /* select fan4 through the bridge */
 116         i2c_reg_write(0x73, /* addr */
 117                       0x00, /* reg */
 118                       0x08); /* val = bus 4 */
 119
 120         /* Turn on FAN 4 */
 121         i2c_reg_write(0x2e,
 122                       1,
 123                       0x80);
 124
 125         i2c_reg_write(0x2e,
 126                       0,
 127                       0x19);
 128
 129         /* Deselect bus 4 on the bridge */
 130         i2c_reg_write(0x73,
 131                       0x00,
 132                       0x00);
 133
 134         /* select fan3 through the bridge */
 135         i2c_reg_write(0x73, /* addr */
 136                       0x00, /* reg */
 137                       0x04); /* val = bus 3 */
 138
 139         /* Turn on FAN 3 */
 140         i2c_reg_write(0x2e,
 141                       1,
 142                       0x80);
 143
 144         i2c_reg_write(0x2e,
 145                       0,
 146                       0x19);
 147
 148         /* Deselect bus 3 on the bridge */
 149         i2c_reg_write(0x73,
 150                       0x00,
 151                       0x00);
 152
 153         /* select fan2 through the bridge */
 154         i2c_reg_write(0x73, /* addr */
 155                       0x00, /* reg */
 156                       0x02); /* val = bus 4 */
 157
 158         /* Turn on FAN 2 */
 159         i2c_reg_write(0x2e,
 160                       1,
 161                       0x80);
 162
 163         i2c_reg_write(0x2e,
 164                       0,
 165                       0x19);
 166
 167         /* Deselect bus 2 on the bridge */
 168         i2c_reg_write(0x73,
 169                       0x00,
 170                       0x00);
 171
 172         /* select fan1 through the bridge */
 173         i2c_reg_write(0x73, /* addr */
 174                       0x00, /* reg */
 175                       0x01); /* val = bus 0 */
 176
 177         /* Turn on FAN 1 */
 178         i2c_reg_write(0x2e,
 179                       1,
 180                       0x80);
 181
 182         i2c_reg_write(0x2e,
 183                       0,
 184                       0x19);
 185
 186         /* Deselect bus 1 on the bridge */
 187         i2c_reg_write(0x73,
 188                       0x00,
 189                       0x00);
 190
 191         puts ("on\n");
 192         i2c_set_bus_num(0);
 193
 194         return;
 195
 196 }
 197
 198 /*************************************************************************
 199  *  initdram
 200  *
 201  *  Initialize sdram
 202  *
 203  ************************************************************************/
 204 phys_size_t initdram (int board_type)
 205 {
 206         long dram_size = 0;
 207
 208 #if defined(CONFIG_SPD_EEPROM)
 209         dram_size = spd_sdram ();
 210 #else
 211         dram_size = fixed_sdram ();
 212 #endif
 213         return dram_size;
 214 }
 215
 216
 217 /*************************************************************************
 218  *  testdram
 219  *
 220  *
 221  ************************************************************************/
 222 #if defined(CONFIG_SYS_DRAM_TEST)
 223 int testdram (void)
 224 {
 225         uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
 226         uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
 227         uint *p;
 228
 229         printf("Testing SDRAM: ");
 230         for (p = pstart; p < pend; p++)
 231                 *p = 0xaaaaaaaa;
 232
 233         for (p = pstart; p < pend; p++) {
 234                 if (*p != 0xaaaaaaaa) {
 235                         printf ("SDRAM test fails at: %08x\n", (uint) p);
 236                         return 1;
 237                 }
 238         }
 239
 240         for (p = pstart; p < pend; p++)
 241                 *p = 0x55555555;
 242
 243         for (p = pstart; p < pend; p++) {
 244                 if (*p != 0x55555555) {
 245                         printf ("SDRAM test fails at: %08x\n", (uint) p);
 246                         return 1;
 247                 }
 248         }
 249
 250         printf("OK\n");
 251         return 0;
 252 }
 253 #endif
 254
 255 #if !defined(CONFIG_SPD_EEPROM)
 256 /*************************************************************************
 257  *  fixed sdram init -- doesn't use serial presence detect.
 258  *
 259  *  Assumes:    128 MB, non-ECC, non-registered
 260  *              PLB @ 133 MHz
 261  *
 262  ************************************************************************/
 263 long int fixed_sdram (void)
 264 {
 265         uint reg;
 266
 267         /*--------------------------------------------------------------------
 268          * Setup some default
 269          *------------------------------------------------------------------*/
 270         mtsdram (SDRAM0_UABBA, 0x00000000);     /* ubba=0 (default)             */
 271         mtsdram (SDRAM0_SLIO, 0x00000000);              /* rdre=0 wrre=0 rarw=0         */
 272         mtsdram (SDRAM0_DEVOPT, 0x00000000);    /* dll=0 ds=0 (normal)          */
 273         mtsdram (SDRAM0_WDDCTR, 0x00000000);    /* wrcp=0 dcd=0                 */
 274         mtsdram (SDRAM0_CLKTR, 0x40000000);     /* clkp=1 (90 deg wr) dcdt=0    */
 275
 276         /*--------------------------------------------------------------------
 277          * Setup for board-specific specific mem
 278          *------------------------------------------------------------------*/
 279         /*
 280          * Following for CAS Latency = 2.5 @ 133 MHz PLB
 281          */
 282         mtsdram (SDRAM0_B0CR, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */
 283         mtsdram (SDRAM0_TR0, 0x410a4012);       /* WR=2  WD=1 CL=2.5 PA=3 CP=4 LD=2 */
 284         /* RA=10 RD=3                       */
 285         mtsdram (SDRAM0_TR1, 0x8080082f);       /* SS=T2 SL=STAGE 3 CD=1 CT=0x02f   */
 286         mtsdram (SDRAM0_RTR, 0x08200000);       /* Rate 15.625 ns @ 133 MHz PLB     */
 287         mtsdram (SDRAM0_CFG1, 0x00000000); /* Self-refresh exit, disable PM    */
 288         udelay (400);                   /* Delay 200 usecs (min)            */
 289
 290         /*--------------------------------------------------------------------
 291          * Enable the controller, then wait for DCEN to complete
 292          *------------------------------------------------------------------*/
 293         mtsdram (SDRAM0_CFG0, 0x86000000); /* DCEN=1, PMUD=1, 64-bit        */
 294         for (;;) {
 295                 mfsdram (SDRAM0_MCSTS, reg);
 296                 if (reg & 0x80000000)
 297                         break;
 298         }
 299
 300         return (128 * 1024 * 1024);     /* 128 MB                           */
 301 }
 302 #endif  /* !defined(CONFIG_SPD_EEPROM) */
 303
 304 /*************************************************************************
 305  *  board_get_enetaddr
 306  *
 307  *  Get the ethernet MAC address for the management ethernet from the
 308  *  strap EEPROM.  Note that is the BASE address for the range of
 309  *  external ethernet MACs on the board.  The base + 31 is the actual
 310  *  mgmt mac address.
 311  *
 312  ************************************************************************/
 313
 314 void board_get_enetaddr(int macaddr_idx, uchar *enet)
 315 {
 316         int i;
 317         unsigned short tmp;
 318         unsigned char buff[0x100], *cp;
 319
 320         if (0 == macaddr_idx) {
 321
 322                 /* Initialize I2C */
 323                 i2c_set_bus_num(0);
 324
 325                 /* Read 256 bytes in EEPROM */
 326                 i2c_read (0x50, 0, 1, buff, 0x100);
 327
 328                 cp = &buff[0xF0];
 329
 330                 for (i = 0; i < 6; i++,cp++)
 331                         enet[i] = *cp;
 332
 333                 memcpy(&tmp, &enet[4], 2);
 334                 tmp += 31;
 335                 memcpy(&enet[4], &tmp, 2);
 336
 337         } else {
 338                 enet[0] = 0x02;
 339                 enet[1] = 0x00;
 340                 enet[2] = 0x00;
 341                 enet[3] = 0x00;
 342                 enet[4] = 0x00;
 343                 if (1 == sbcommon_get_master() ) {
 344                         /* Master/Primary card */
 345                         enet[5] = 0x01;
 346                 } else {
 347                         /* Slave/Secondary card */
 348                         enet [5] = 0x02;
 349                 }
 350         }
 351
 352         return;
 353 }
 354
 355 #ifdef CONFIG_POST
 356 /*
 357  * Returns 1 if keys pressed to start the power-on long-running tests
 358  * Called from board_init_f().
 359  */
 360 int post_hotkeys_pressed(void)
 361 {
 362
 363         return (ctrlc());
 364 }
 365 #endif