board/siemens/taurus/taurus.c

   1 /*
   2  * Board functions for Siemens TAURUS (AT91SAM9G20) based boards
   3  * (C) Copyright Siemens AG
   4  *
   5  * Based on:
   6  * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
   7  *
   8  * (C) Copyright 2007-2008
   9  * Stelian Pop <stelian@popies.net>
  10  * Lead Tech Design <www.leadtechdesign.com>
  11  *
  12  * SPDX-License-Identifier:     GPL-2.0+
  13  */
  14
  15 #include <command.h>
  16 #include <common.h>
  17 #include <dm.h>
  18 #include <environment.h>
  19 #include <asm/io.h>
  20 #include <asm/arch/at91sam9260_matrix.h>
  21 #include <asm/arch/at91sam9_smc.h>
  22 #include <asm/arch/at91_common.h>
  23 #include <asm/arch/at91_rstc.h>
  24 #include <asm/arch/gpio.h>
  25 #include <asm/arch/at91sam9_sdramc.h>
  26 #include <asm/arch/atmel_serial.h>
  27 #include <asm/arch/clk.h>
  28 #include <asm/gpio.h>
  29 #include <linux/mtd/nand.h>
  30 #include <atmel_mci.h>
  31 #include <asm/arch/at91_spi.h>
  32 #include <spi.h>
  33
  34 #include <net.h>
  35 #ifndef CONFIG_DM_ETH
  36 #include <netdev.h>
  37 #endif
  38
  39 DECLARE_GLOBAL_DATA_PTR;
  40
  41 static void taurus_request_gpio(void)
  42 {
  43         gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
  44         gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
  45         gpio_request(AT91_PIN_PA25, "ena PHY");
  46 }
  47
  48 static void taurus_nand_hw_init(void)
  49 {
  50         struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  51         struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  52         unsigned long csa;
  53
  54         /* Assign CS3 to NAND/SmartMedia Interface */
  55         csa = readl(&matrix->ebicsa);
  56         csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
  57         writel(csa, &matrix->ebicsa);
  58
  59         /* Configure SMC CS3 for NAND/SmartMedia */
  60         writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
  61                AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
  62                &smc->cs[3].setup);
  63         writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
  64                AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
  65                &smc->cs[3].pulse);
  66         writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
  67                &smc->cs[3].cycle);
  68         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  69                AT91_SMC_MODE_EXNW_DISABLE |
  70                AT91_SMC_MODE_DBW_8 |
  71                AT91_SMC_MODE_TDF_CYCLE(3),
  72                &smc->cs[3].mode);
  73
  74         /* Configure RDY/BSY */
  75         at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  76
  77         /* Enable NandFlash */
  78         at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  79 }
  80
  81 #if defined(CONFIG_SPL_BUILD)
  82 #include <spl.h>
  83 #include <nand.h>
  84 #include <spi_flash.h>
  85
  86 void matrix_init(void)
  87 {
  88         struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  89
  90         writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE))
  91                         | AT91_MATRIX_SLOT_CYCLE_(0x40),
  92                         &mat->scfg[3]);
  93 }
  94
  95 #if defined(CONFIG_BOARD_AXM)
  96 static int at91_is_recovery(void)
  97 {
  98         if ((at91_get_gpio_value(AT91_PIN_PA26) == 0) &&
  99             (at91_get_gpio_value(AT91_PIN_PA27) == 0))
 100                 return 1;
 101
 102         return 0;
 103 }
 104 #elif defined(CONFIG_BOARD_TAURUS)
 105 static int at91_is_recovery(void)
 106 {
 107         if (at91_get_gpio_value(AT91_PIN_PA31) == 0)
 108                 return 1;
 109
 110         return 0;
 111 }
 112 #endif
 113
 114 void spl_board_init(void)
 115 {
 116         taurus_nand_hw_init();
 117         at91_spi0_hw_init(TAURUS_SPI_MASK);
 118
 119 #if defined(CONFIG_BOARD_AXM)
 120         /* Configure LED PINs */
 121         at91_set_gpio_output(AT91_PIN_PA6, 0);
 122         at91_set_gpio_output(AT91_PIN_PA8, 0);
 123         at91_set_gpio_output(AT91_PIN_PA9, 0);
 124         at91_set_gpio_output(AT91_PIN_PA10, 0);
 125         at91_set_gpio_output(AT91_PIN_PA11, 0);
 126         at91_set_gpio_output(AT91_PIN_PA12, 0);
 127
 128         /* Configure recovery button PINs */
 129         at91_set_gpio_input(AT91_PIN_PA26, 1);
 130         at91_set_gpio_input(AT91_PIN_PA27, 1);
 131 #elif defined(CONFIG_BOARD_TAURUS)
 132         at91_set_gpio_input(AT91_PIN_PA31, 1);
 133 #endif
 134
 135         /* check for recovery mode */
 136         if (at91_is_recovery() == 1) {
 137                 struct spi_flash *flash;
 138
 139                 puts("Recovery button pressed\n");
 140                 nand_init();
 141                 spl_nand_erase_one(0, 0);
 142                 flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
 143                                         0,
 144                                         CONFIG_SF_DEFAULT_SPEED,
 145                                         CONFIG_SF_DEFAULT_MODE);
 146                 if (!flash) {
 147                         puts("no flash\n");
 148                 } else {
 149                         puts("erase spi flash sector 0\n");
 150                         spi_flash_erase(flash, 0,
 151                                         CONFIG_SYS_NAND_U_BOOT_SIZE);
 152                 }
 153         }
 154 }
 155
 156 #define SDRAM_BASE_CONF (AT91_SDRAMC_NR_13 | AT91_SDRAMC_CAS_3 \
 157                          |AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32 \
 158                          | AT91_SDRAMC_TWR_VAL(3) | AT91_SDRAMC_TRC_VAL(9) \
 159                          | AT91_SDRAMC_TRP_VAL(3) | AT91_SDRAMC_TRCD_VAL(3) \
 160                          | AT91_SDRAMC_TRAS_VAL(6) | AT91_SDRAMC_TXSR_VAL(10))
 161
 162 void sdramc_configure(unsigned int mask)
 163 {
 164         struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX;
 165         struct sdramc_reg setting;
 166
 167         at91_sdram_hw_init();
 168         setting.cr = SDRAM_BASE_CONF | mask;
 169         setting.mdr = AT91_SDRAMC_MD_SDRAM;
 170         setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000;
 171
 172         writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC |
 173                 AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL,
 174                 &ma->ebicsa);
 175
 176         sdramc_initialize(ATMEL_BASE_CS1, &setting);
 177 }
 178
 179 void mem_init(void)
 180 {
 181         unsigned int ram_size = 0;
 182
 183         /* Configure SDRAM for 128MB */
 184         sdramc_configure(AT91_SDRAMC_NC_10);
 185
 186         /* Do memtest for 128MB */
 187         ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
 188                                 CONFIG_SYS_SDRAM_SIZE);
 189
 190         /*
 191          * If 32MB or 16MB should be supported check also for
 192          * expected mirroring at A16 and A17
 193          * To find mirror addresses depends how the collumns are connected
 194          * at RAM (internaly or externaly)
 195          * If the collumns are not in inverted order the mirror size effect
 196          * behaves like normal SRAM with A0,A1,A2,etc. connected incremantal
 197          */
 198
 199         /* Mirrors at A15 on ATMEL G20 SDRAM Controller with 64MB*/
 200         if (ram_size == 0x800) {
 201                 printf("\n\r 64MB");
 202                 sdramc_configure(AT91_SDRAMC_NC_9);
 203         } else {
 204                 /* Size already initialized */
 205                 printf("\n\r 128MB");
 206         }
 207 }
 208 #endif
 209
 210 #ifdef CONFIG_MACB
 211 static void siemens_phy_reset(void)
 212 {
 213         /*
 214          * we need to reset PHY for 200us
 215          * because of bug in ATMEL G20 CPU (undefined initial state of GPIO)
 216          */
 217         if ((readl(AT91_ASM_RSTC_SR) & AT91_RSTC_RSTTYP) ==
 218             AT91_RSTC_RSTTYP_GENERAL)
 219                 at91_set_gpio_value(AT91_PIN_PA25, 0); /* reset eth switch */
 220 }
 221
 222 static void taurus_macb_hw_init(void)
 223 {
 224         /* Enable EMAC clock */
 225         at91_periph_clk_enable(ATMEL_ID_EMAC0);
 226
 227         /*
 228          * Disable pull-up on:
 229          *      RXDV (PA17) => PHY normal mode (not Test mode)
 230          *      ERX0 (PA14) => PHY ADDR0
 231          *      ERX1 (PA15) => PHY ADDR1
 232          *      ERX2 (PA25) => PHY ADDR2
 233          *      ERX3 (PA26) => PHY ADDR3
 234          *      ECRS (PA28) => PHY ADDR4  => PHYADDR = 0x0
 235          *
 236          * PHY has internal pull-down
 237          */
 238         at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
 239         at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
 240         at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
 241         at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
 242         at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
 243         at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
 244
 245         siemens_phy_reset();
 246
 247         at91_phy_reset();
 248
 249         at91_set_gpio_input(AT91_PIN_PA25, 1);   /* ERST tri-state */
 250
 251         /* Re-enable pull-up */
 252         at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
 253         at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
 254         at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
 255         at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
 256         at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
 257         at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
 258
 259         /* Initialize EMAC=MACB hardware */
 260         at91_macb_hw_init();
 261 }
 262 #endif
 263
 264 #ifdef CONFIG_GENERIC_ATMEL_MCI
 265 int board_mmc_init(bd_t *bd)
 266 {
 267         at91_mci_hw_init();
 268
 269         return atmel_mci_init((void *)ATMEL_BASE_MCI);
 270 }
 271 #endif
 272
 273 int board_early_init_f(void)
 274 {
 275         /* Enable clocks for all PIOs */
 276         at91_periph_clk_enable(ATMEL_ID_PIOA);
 277         at91_periph_clk_enable(ATMEL_ID_PIOB);
 278         at91_periph_clk_enable(ATMEL_ID_PIOC);
 279
 280         at91_seriald_hw_init();
 281         taurus_request_gpio();
 282
 283         return 0;
 284 }
 285
 286 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 287 {
 288         return bus == 0 && cs == 0;
 289 }
 290
 291 void spi_cs_activate(struct spi_slave *slave)
 292 {
 293         at91_set_gpio_value(TAURUS_SPI_CS_PIN, 0);
 294 }
 295
 296 void spi_cs_deactivate(struct spi_slave *slave)
 297 {
 298         at91_set_gpio_value(TAURUS_SPI_CS_PIN, 1);
 299 }
 300
 301 #ifdef CONFIG_USB_GADGET_AT91
 302 #include <linux/usb/at91_udc.h>
 303
 304 void at91_udp_hw_init(void)
 305 {
 306         /* Enable PLLB */
 307         at91_pllb_clk_enable(get_pllb_init());
 308
 309         /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
 310         at91_periph_clk_enable(ATMEL_ID_UDP);
 311
 312         at91_system_clk_enable(AT91SAM926x_PMC_UDP);
 313 }
 314
 315 struct at91_udc_data board_udc_data  = {
 316         .baseaddr = ATMEL_BASE_UDP0,
 317 };
 318 #endif
 319
 320 int board_init(void)
 321 {
 322         /* adress of boot parameters */
 323         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 324
 325         taurus_request_gpio();
 326 #ifdef CONFIG_CMD_NAND
 327         taurus_nand_hw_init();
 328 #endif
 329 #ifdef CONFIG_MACB
 330         taurus_macb_hw_init();
 331 #endif
 332         at91_spi0_hw_init(TAURUS_SPI_MASK);
 333 #ifdef CONFIG_USB_GADGET_AT91
 334         at91_udp_hw_init();
 335         at91_udc_probe(&board_udc_data);
 336 #endif
 337
 338         return 0;
 339 }
 340
 341 int dram_init(void)
 342 {
 343         gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
 344                                     CONFIG_SYS_SDRAM_SIZE);
 345         return 0;
 346 }
 347
 348 #ifndef CONFIG_DM_ETH
 349 int board_eth_init(bd_t *bis)
 350 {
 351         int rc = 0;
 352 #ifdef CONFIG_MACB
 353         rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
 354 #endif
 355         return rc;
 356 }
 357 #endif
 358
 359 #if !defined(CONFIG_SPL_BUILD)
 360 #if defined(CONFIG_BOARD_AXM)
 361 /*
 362  * Booting the Fallback Image.
 363  *
 364  *  The function is used to provide and
 365  *  boot the image with the fallback
 366  *  parameters, incase if the faulty image
 367  *  in upgraded over the base firmware.
 368  *
 369  */
 370 static int upgrade_failure_fallback(void)
 371 {
 372         char *partitionset_active = NULL;
 373         char *rootfs = NULL;
 374         char *rootfs_fallback = NULL;
 375         char *kern_off;
 376         char *kern_off_fb;
 377         char *kern_size;
 378         char *kern_size_fb;
 379
 380         partitionset_active = env_get("partitionset_active");
 381         if (partitionset_active) {
 382                 if (partitionset_active[0] == 'A')
 383                         env_set("partitionset_active", "B");
 384                 else
 385                         env_set("partitionset_active", "A");
 386         } else {
 387                 printf("partitionset_active missing.\n");
 388                 return -ENOENT;
 389         }
 390
 391         rootfs = env_get("rootfs");
 392         rootfs_fallback = env_get("rootfs_fallback");
 393         env_set("rootfs", rootfs_fallback);
 394         env_set("rootfs_fallback", rootfs);
 395
 396         kern_size = env_get("kernel_size");
 397         kern_size_fb = env_get("kernel_size_fallback");
 398         env_set("kernel_size", kern_size_fb);
 399         env_set("kernel_size_fallback", kern_size);
 400
 401         kern_off = env_get("kernel_Off");
 402         kern_off_fb = env_get("kernel_Off_fallback");
 403         env_set("kernel_Off", kern_off_fb);
 404         env_set("kernel_Off_fallback", kern_off);
 405
 406         env_set("bootargs", '\0');
 407         env_set("upgrade_available", '\0');
 408         env_set("boot_retries", '\0');
 409         env_save();
 410
 411         return 0;
 412 }
 413
 414 static int do_upgrade_available(cmd_tbl_t *cmdtp, int flag, int argc,
 415                         char * const argv[])
 416 {
 417         unsigned long upgrade_available = 0;
 418         unsigned long boot_retry = 0;
 419         char boot_buf[10];
 420
 421         upgrade_available = simple_strtoul(env_get("upgrade_available"), NULL,
 422                                            10);
 423         if (upgrade_available) {
 424                 boot_retry = simple_strtoul(env_get("boot_retries"), NULL, 10);
 425                 boot_retry++;
 426                 sprintf(boot_buf, "%lx", boot_retry);
 427                 env_set("boot_retries", boot_buf);
 428                 env_save();
 429
 430                 /*
 431                  * Here the boot_retries count is checked, and if the
 432                  * count becomes greater than 2 switch back to the
 433                  * fallback, and reset the board.
 434                  */
 435
 436                 if (boot_retry > 2) {
 437                         if (upgrade_failure_fallback() == 0)
 438                                 do_reset(NULL, 0, 0, NULL);
 439                         return -1;
 440                 }
 441         }
 442         return 0;
 443 }
 444
 445 U_BOOT_CMD(
 446         upgrade_available,      1,      1,      do_upgrade_available,
 447         "check Siemens update",
 448         "no parameters"
 449 );
 450 #endif
 451 #endif