board/socrates/sdram.c

   1 /*
   2  * (C) Copyright 2008
   3  * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <asm/processor.h>
  10 #include <asm/immap_85xx.h>
  11 #include <fsl_ddr_sdram.h>
  12 #include <asm/processor.h>
  13 #include <asm/mmu.h>
  14 #include <spd_sdram.h>
  15
  16
  17 #if !defined(CONFIG_SPD_EEPROM)
  18 /*
  19  * Autodetect onboard DDR SDRAM on 85xx platforms
  20  *
  21  * NOTE: Some of the hardcoded values are hardware dependant,
  22  *       so this should be extended for other future boards
  23  *       using this routine!
  24  */
  25 phys_size_t fixed_sdram(void)
  26 {
  27         struct ccsr_ddr __iomem *ddr =
  28                 (struct ccsr_ddr __iomem *)(CONFIG_SYS_FSL_DDR_ADDR);
  29
  30         /*
  31          * Disable memory controller.
  32          */
  33         ddr->cs0_config = 0;
  34         ddr->sdram_cfg = 0;
  35
  36         ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS;
  37         ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG;
  38         ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
  39         ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
  40         ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
  41         ddr->sdram_mode = CONFIG_SYS_DDR_MODE;
  42         ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL;
  43         ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CONFIG_2;
  44         ddr->sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CONTROL;
  45
  46         asm ("sync;isync;msync");
  47         udelay(1000);
  48
  49         ddr->sdram_cfg = CONFIG_SYS_DDR_CONFIG;
  50         asm ("sync; isync; msync");
  51         udelay(1000);
  52
  53         if (get_ram_size(0, CONFIG_SYS_SDRAM_SIZE<<20) == CONFIG_SYS_SDRAM_SIZE<<20) {
  54                 /*
  55                  * OK, size detected -> all done
  56                  */
  57                 return CONFIG_SYS_SDRAM_SIZE<<20;
  58         }
  59
  60         return 0;                               /* nothing found !              */
  61 }
  62 #endif
  63
  64 #if defined(CONFIG_SYS_DRAM_TEST)
  65 int testdram (void)
  66 {
  67         uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
  68         uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
  69         uint *p;
  70
  71         printf ("SDRAM test phase 1:\n");
  72         for (p = pstart; p < pend; p++)
  73                 *p = 0xaaaaaaaa;
  74
  75         for (p = pstart; p < pend; p++) {
  76                 if (*p != 0xaaaaaaaa) {
  77                         printf ("SDRAM test fails at: %08x\n", (uint) p);
  78                         return 1;
  79                 }
  80         }
  81
  82         printf ("SDRAM test phase 2:\n");
  83         for (p = pstart; p < pend; p++)
  84                 *p = 0x55555555;
  85
  86         for (p = pstart; p < pend; p++) {
  87                 if (*p != 0x55555555) {
  88                         printf ("SDRAM test fails at: %08x\n", (uint) p);
  89                         return 1;
  90                 }
  91         }
  92
  93         printf ("SDRAM test passed.\n");
  94         return 0;
  95 }
  96 #endif