3 * Vikas Manocha, <vikas.manocha@st.com>
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/armv7m.h>
11 #include <asm/arch/stm32.h>
12 #include <asm/arch/gpio.h>
13 #include <dm/platdata.h>
14 #include <dm/platform_data/serial_stm32x7.h>
15 #include <asm/arch/stm32_periph.h>
16 #include <asm/arch/stm32_defs.h>
18 DECLARE_GLOBAL_DATA_PTR
;
20 const struct stm32_gpio_ctl gpio_ctl_gpout
= {
21 .mode
= STM32_GPIO_MODE_OUT
,
22 .otype
= STM32_GPIO_OTYPE_PP
,
23 .speed
= STM32_GPIO_SPEED_50M
,
24 .pupd
= STM32_GPIO_PUPD_NO
,
28 const struct stm32_gpio_ctl gpio_ctl_usart
= {
29 .mode
= STM32_GPIO_MODE_AF
,
30 .otype
= STM32_GPIO_OTYPE_PP
,
31 .speed
= STM32_GPIO_SPEED_50M
,
32 .pupd
= STM32_GPIO_PUPD_UP
,
36 static const struct stm32_gpio_dsc usart_gpio
[] = {
37 {STM32_GPIO_PORT_A
, STM32_GPIO_PIN_9
}, /* TX */
38 {STM32_GPIO_PORT_B
, STM32_GPIO_PIN_7
}, /* RX */
41 int uart_setup_gpio(void)
46 clock_setup(GPIO_A_CLOCK_CFG
);
47 clock_setup(GPIO_B_CLOCK_CFG
);
48 for (i
= 0; i
< ARRAY_SIZE(usart_gpio
); i
++) {
49 rv
= stm32_gpio_config(&usart_gpio
[i
], &gpio_ctl_usart
);
58 static const struct stm32x7_serial_platdata serial_platdata
= {
59 .base
= (struct stm32_usart
*)USART1_BASE
,
60 .clock
= CONFIG_SYS_CLK_FREQ
,
63 U_BOOT_DEVICE(stm32x7_serials
) = {
64 .name
= "serial_stm32x7",
65 .platdata
= &serial_platdata
,
68 u32
get_board_rev(void)
73 int board_early_init_f(void)
77 res
= uart_setup_gpio();
78 clock_setup(USART1_CLOCK_CFG
);
87 gd
->bd
->bi_boot_params
= CONFIG_SYS_SDRAM_BASE
+ 0x100;
94 gd
->bd
->bi_dram
[0].start
= CONFIG_SYS_RAM_BASE
;
95 gd
->bd
->bi_dram
[0].size
= CONFIG_SYS_RAM_SIZE
;
97 gd
->ram_size
= CONFIG_SYS_RAM_SIZE
;