board/sunxi/Kconfig

   1 if ARCH_SUNXI
   2
   3 config IDENT_STRING
   4         default " Allwinner Technology"
   5
   6 config PRE_CONSOLE_BUFFER
   7         default y
   8
   9 config SPL_GPIO_SUPPORT
  10         default y
  11
  12 config SPL_LIBCOMMON_SUPPORT
  13         default y
  14
  15 config SPL_LIBDISK_SUPPORT
  16         default y
  17
  18 config SPL_LIBGENERIC_SUPPORT
  19         default y
  20
  21 config SPL_MMC_SUPPORT
  22         default y
  23
  24 config SPL_POWER_SUPPORT
  25         default y
  26
  27 config SPL_SERIAL_SUPPORT
  28         default y
  29
  30 # Note only one of these may be selected at a time! But hidden choices are
  31 # not supported by Kconfig
  32 config SUNXI_GEN_SUN4I
  33         bool
  34         ---help---
  35         Select this for sunxi SoCs which have resets and clocks set up
  36         as the original A10 (mach-sun4i).
  37
  38 config SUNXI_GEN_SUN6I
  39         bool
  40         ---help---
  41         Select this for sunxi SoCs which have sun6i like periphery, like
  42         separate ahb reset control registers, custom pmic bus, new style
  43         watchdog, etc.
  44
  45
  46 choice
  47         prompt "Sunxi SoC Variant"
  48         optional
  49
  50 config MACH_SUN4I
  51         bool "sun4i (Allwinner A10)"
  52         select CPU_V7
  53         select SUNXI_GEN_SUN4I
  54         select SUPPORT_SPL
  55
  56 config MACH_SUN5I
  57         bool "sun5i (Allwinner A13)"
  58         select CPU_V7
  59         select SUNXI_GEN_SUN4I
  60         select SUPPORT_SPL
  61
  62 config MACH_SUN6I
  63         bool "sun6i (Allwinner A31)"
  64         select CPU_V7
  65         select CPU_V7_HAS_NONSEC
  66         select CPU_V7_HAS_VIRT
  67         select ARCH_SUPPORT_PSCI
  68         select SUNXI_GEN_SUN6I
  69         select SUPPORT_SPL
  70         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  71
  72 config MACH_SUN7I
  73         bool "sun7i (Allwinner A20)"
  74         select CPU_V7
  75         select CPU_V7_HAS_NONSEC
  76         select CPU_V7_HAS_VIRT
  77         select ARCH_SUPPORT_PSCI
  78         select SUNXI_GEN_SUN4I
  79         select SUPPORT_SPL
  80         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  81
  82 config MACH_SUN8I_A23
  83         bool "sun8i (Allwinner A23)"
  84         select CPU_V7
  85         select CPU_V7_HAS_NONSEC
  86         select CPU_V7_HAS_VIRT
  87         select ARCH_SUPPORT_PSCI
  88         select SUNXI_GEN_SUN6I
  89         select SUPPORT_SPL
  90         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  91
  92 config MACH_SUN8I_A33
  93         bool "sun8i (Allwinner A33)"
  94         select CPU_V7
  95         select CPU_V7_HAS_NONSEC
  96         select CPU_V7_HAS_VIRT
  97         select ARCH_SUPPORT_PSCI
  98         select SUNXI_GEN_SUN6I
  99         select SUPPORT_SPL
 100         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 101
 102 config MACH_SUN8I_A83T
 103         bool "sun8i (Allwinner A83T)"
 104         select CPU_V7
 105         select SUNXI_GEN_SUN6I
 106         select SUPPORT_SPL
 107
 108 config MACH_SUN8I_H3
 109         bool "sun8i (Allwinner H3)"
 110         select CPU_V7
 111         select CPU_V7_HAS_NONSEC
 112         select CPU_V7_HAS_VIRT
 113         select ARCH_SUPPORT_PSCI
 114         select SUNXI_GEN_SUN6I
 115         select SUPPORT_SPL
 116         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 117
 118 config MACH_SUN9I
 119         bool "sun9i (Allwinner A80)"
 120         select CPU_V7
 121         select SUNXI_GEN_SUN6I
 122         select SUPPORT_SPL
 123
 124 config MACH_SUN50I
 125         bool "sun50i (Allwinner A64)"
 126         select ARM64
 127         select SUNXI_GEN_SUN6I
 128         select SUPPORT_SPL
 129
 130 endchoice
 131
 132 # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
 133 config MACH_SUN8I
 134         bool
 135         default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T
 136
 137 config RESERVE_ALLWINNER_BOOT0_HEADER
 138         bool "reserve space for Allwinner boot0 header"
 139         select ENABLE_ARM_SOC_BOOT0_HOOK
 140         ---help---
 141         Prepend a 1536 byte (empty) header to the U-Boot image file, to be
 142         filled with magic values post build. The Allwinner provided boot0
 143         blob relies on this information to load and execute U-Boot.
 144         Only needed on 64-bit Allwinner boards so far when using boot0.
 145
 146 config ARM_BOOT_HOOK_RMR
 147         bool
 148         depends on ARM64
 149         default y
 150         select ENABLE_ARM_SOC_BOOT0_HOOK
 151         ---help---
 152         Insert some ARM32 code at the very beginning of the U-Boot binary
 153         which uses an RMR register write to bring the core into AArch64 mode.
 154         The very first instruction acts as a switch, since it's carefully
 155         chosen to be a NOP in one mode and a branch in the other, so the
 156         code would only be executed if not already in AArch64.
 157         This allows both the SPL and the U-Boot proper to be entered in
 158         either mode and switch to AArch64 if needed.
 159
 160 config DRAM_TYPE
 161         int "sunxi dram type"
 162         depends on MACH_SUN8I_A83T
 163         default 3
 164         ---help---
 165         Set the dram type, 3: DDR3, 7: LPDDR3
 166
 167 config DRAM_CLK
 168         int "sunxi dram clock speed"
 169         default 792 if MACH_SUN9I
 170         default 312 if MACH_SUN6I || MACH_SUN8I
 171         default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 172         default 672 if MACH_SUN50I
 173         ---help---
 174         Set the dram clock speed, valid range 240 - 480 (prior to sun9i),
 175         must be a multiple of 24. For the sun9i (A80), the tested values
 176         (for DDR3-1600) are 312 to 792.
 177
 178 if MACH_SUN5I || MACH_SUN7I
 179 config DRAM_MBUS_CLK
 180         int "sunxi mbus clock speed"
 181         default 300
 182         ---help---
 183         Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
 184
 185 endif
 186
 187 config DRAM_ZQ
 188         int "sunxi dram zq value"
 189         default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
 190         default 127 if MACH_SUN7I
 191         default 4145117 if MACH_SUN9I
 192         default 3881915 if MACH_SUN50I
 193         ---help---
 194         Set the dram zq value.
 195
 196 config DRAM_ODT_EN
 197         bool "sunxi dram odt enable"
 198         default n if !MACH_SUN8I_A23
 199         default y if MACH_SUN8I_A23
 200         default y if MACH_SUN50I
 201         ---help---
 202         Select this to enable dram odt (on die termination).
 203
 204 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 205 config DRAM_EMR1
 206         int "sunxi dram emr1 value"
 207         default 0 if MACH_SUN4I
 208         default 4 if MACH_SUN5I || MACH_SUN7I
 209         ---help---
 210         Set the dram controller emr1 value.
 211
 212 config DRAM_TPR3
 213         hex "sunxi dram tpr3 value"
 214         default 0
 215         ---help---
 216         Set the dram controller tpr3 parameter. This parameter configures
 217         the delay on the command lane and also phase shifts, which are
 218         applied for sampling incoming read data. The default value 0
 219         means that no phase/delay adjustments are necessary. Properly
 220         configuring this parameter increases reliability at high DRAM
 221         clock speeds.
 222
 223 config DRAM_DQS_GATING_DELAY
 224         hex "sunxi dram dqs_gating_delay value"
 225         default 0
 226         ---help---
 227         Set the dram controller dqs_gating_delay parmeter. Each byte
 228         encodes the DQS gating delay for each byte lane. The delay
 229         granularity is 1/4 cycle. For example, the value 0x05060606
 230         means that the delay is 5 quarter-cycles for one lane (1.25
 231         cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
 232         The default value 0 means autodetection. The results of hardware
 233         autodetection are not very reliable and depend on the chip
 234         temperature (sometimes producing different results on cold start
 235         and warm reboot). But the accuracy of hardware autodetection
 236         is usually good enough, unless running at really high DRAM
 237         clocks speeds (up to 600MHz). If unsure, keep as 0.
 238
 239 choice
 240         prompt "sunxi dram timings"
 241         default DRAM_TIMINGS_VENDOR_MAGIC
 242         ---help---
 243         Select the timings of the DDR3 chips.
 244
 245 config DRAM_TIMINGS_VENDOR_MAGIC
 246         bool "Magic vendor timings from Android"
 247         ---help---
 248         The same DRAM timings as in the Allwinner boot0 bootloader.
 249
 250 config DRAM_TIMINGS_DDR3_1066F_1333H
 251         bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
 252         ---help---
 253         Use the timings of the standard JEDEC DDR3-1066F speed bin for
 254         DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
 255         for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
 256         used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
 257         or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
 258         that down binning to DDR3-1066F is supported (because DDR3-1066F
 259         uses a bit faster timings than DDR3-1333H).
 260
 261 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
 262         bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
 263         ---help---
 264         Use the timings of the slowest possible JEDEC speed bin for the
 265         selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
 266         DDR3-800E, DDR3-1066G or DDR3-1333J.
 267
 268 endchoice
 269
 270 endif
 271
 272 if MACH_SUN8I_A23
 273 config DRAM_ODT_CORRECTION
 274         int "sunxi dram odt correction value"
 275         default 0
 276         ---help---
 277         Set the dram odt correction value (range -255 - 255). In allwinner
 278         fex files, this option is found in bits 8-15 of the u32 odt_en variable
 279         in the [dram] section. When bit 31 of the odt_en variable is set
 280         then the correction is negative. Usually the value for this is 0.
 281 endif
 282
 283 config SYS_CLK_FREQ
 284         default 816000000 if MACH_SUN50I
 285         default 912000000 if MACH_SUN7I
 286         default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I || MACH_SUN9I
 287
 288 config SYS_CONFIG_NAME
 289         default "sun4i" if MACH_SUN4I
 290         default "sun5i" if MACH_SUN5I
 291         default "sun6i" if MACH_SUN6I
 292         default "sun7i" if MACH_SUN7I
 293         default "sun8i" if MACH_SUN8I
 294         default "sun9i" if MACH_SUN9I
 295         default "sun50i" if MACH_SUN50I
 296
 297 config SYS_BOARD
 298         default "sunxi"
 299
 300 config SYS_SOC
 301         default "sunxi"
 302
 303 config UART0_PORT_F
 304         bool "UART0 on MicroSD breakout board"
 305         default n
 306         ---help---
 307         Repurpose the SD card slot for getting access to the UART0 serial
 308         console. Primarily useful only for low level u-boot debugging on
 309         tablets, where normal UART0 is difficult to access and requires
 310         device disassembly and/or soldering. As the SD card can't be used
 311         at the same time, the system can be only booted in the FEL mode.
 312         Only enable this if you really know what you are doing.
 313
 314 config OLD_SUNXI_KERNEL_COMPAT
 315         bool "Enable workarounds for booting old kernels"
 316         default n
 317         ---help---
 318         Set this to enable various workarounds for old kernels, this results in
 319         sub-optimal settings for newer kernels, only enable if needed.
 320
 321 config MMC0_CD_PIN
 322         string "Card detect pin for mmc0"
 323         default "PF6" if MACH_SUN8I_A83T || MACH_SUN8I_H3 || MACH_SUN50I
 324         default ""
 325         ---help---
 326         Set the card detect pin for mmc0, leave empty to not use cd. This
 327         takes a string in the format understood by sunxi_name_to_gpio, e.g.
 328         PH1 for pin 1 of port H.
 329
 330 config MMC1_CD_PIN
 331         string "Card detect pin for mmc1"
 332         default ""
 333         ---help---
 334         See MMC0_CD_PIN help text.
 335
 336 config MMC2_CD_PIN
 337         string "Card detect pin for mmc2"
 338         default ""
 339         ---help---
 340         See MMC0_CD_PIN help text.
 341
 342 config MMC3_CD_PIN
 343         string "Card detect pin for mmc3"
 344         default ""
 345         ---help---
 346         See MMC0_CD_PIN help text.
 347
 348 config MMC1_PINS
 349         string "Pins for mmc1"
 350         default ""
 351         ---help---
 352         Set the pins used for mmc1, when applicable. This takes a string in the
 353         format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
 354
 355 config MMC2_PINS
 356         string "Pins for mmc2"
 357         default ""
 358         ---help---
 359         See MMC1_PINS help text.
 360
 361 config MMC3_PINS
 362         string "Pins for mmc3"
 363         default ""
 364         ---help---
 365         See MMC1_PINS help text.
 366
 367 config MMC_SUNXI_SLOT_EXTRA
 368         int "mmc extra slot number"
 369         default -1
 370         ---help---
 371         sunxi builds always enable mmc0, some boards also have a second sdcard
 372         slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
 373         support for this.
 374
 375 config INITIAL_USB_SCAN_DELAY
 376         int "delay initial usb scan by x ms to allow builtin devices to init"
 377         default 0
 378         ---help---
 379         Some boards have on board usb devices which need longer than the
 380         USB spec's 1 second to connect from board powerup. Set this config
 381         option to a non 0 value to add an extra delay before the first usb
 382         bus scan.
 383
 384 config USB0_VBUS_PIN
 385         string "Vbus enable pin for usb0 (otg)"
 386         default ""
 387         ---help---
 388         Set the Vbus enable pin for usb0 (otg). This takes a string in the
 389         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 390
 391 config USB0_VBUS_DET
 392         string "Vbus detect pin for usb0 (otg)"
 393         default ""
 394         ---help---
 395         Set the Vbus detect pin for usb0 (otg). This takes a string in the
 396         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 397
 398 config USB0_ID_DET
 399         string "ID detect pin for usb0 (otg)"
 400         default ""
 401         ---help---
 402         Set the ID detect pin for usb0 (otg). This takes a string in the
 403         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 404
 405 config USB1_VBUS_PIN
 406         string "Vbus enable pin for usb1 (ehci0)"
 407         default "PH6" if MACH_SUN4I || MACH_SUN7I
 408         default "PH27" if MACH_SUN6I
 409         ---help---
 410         Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
 411         a string in the format understood by sunxi_name_to_gpio, e.g.
 412         PH1 for pin 1 of port H.
 413
 414 config USB2_VBUS_PIN
 415         string "Vbus enable pin for usb2 (ehci1)"
 416         default "PH3" if MACH_SUN4I || MACH_SUN7I
 417         default "PH24" if MACH_SUN6I
 418         ---help---
 419         See USB1_VBUS_PIN help text.
 420
 421 config USB3_VBUS_PIN
 422         string "Vbus enable pin for usb3 (ehci2)"
 423         default ""
 424         ---help---
 425         See USB1_VBUS_PIN help text.
 426
 427 config I2C0_ENABLE
 428         bool "Enable I2C/TWI controller 0"
 429         default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 430         default n if MACH_SUN6I || MACH_SUN8I
 431         select CMD_I2C
 432         ---help---
 433         This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
 434         its clock and setting up the bus. This is especially useful on devices
 435         with slaves connected to the bus or with pins exposed through e.g. an
 436         expansion port/header.
 437
 438 config I2C1_ENABLE
 439         bool "Enable I2C/TWI controller 1"
 440         default n
 441         select CMD_I2C
 442         ---help---
 443         See I2C0_ENABLE help text.
 444
 445 config I2C2_ENABLE
 446         bool "Enable I2C/TWI controller 2"
 447         default n
 448         select CMD_I2C
 449         ---help---
 450         See I2C0_ENABLE help text.
 451
 452 if MACH_SUN6I || MACH_SUN7I
 453 config I2C3_ENABLE
 454         bool "Enable I2C/TWI controller 3"
 455         default n
 456         select CMD_I2C
 457         ---help---
 458         See I2C0_ENABLE help text.
 459 endif
 460
 461 if SUNXI_GEN_SUN6I
 462 config R_I2C_ENABLE
 463         bool "Enable the PRCM I2C/TWI controller"
 464         # This is used for the pmic on H3
 465         default y if SY8106A_POWER
 466         select CMD_I2C
 467         ---help---
 468         Set this to y to enable the I2C controller which is part of the PRCM.
 469 endif
 470
 471 if MACH_SUN7I
 472 config I2C4_ENABLE
 473         bool "Enable I2C/TWI controller 4"
 474         default n
 475         select CMD_I2C
 476         ---help---
 477         See I2C0_ENABLE help text.
 478 endif
 479
 480 config AXP_GPIO
 481         bool "Enable support for gpio-s on axp PMICs"
 482         default n
 483         ---help---
 484         Say Y here to enable support for the gpio pins of the axp PMIC ICs.
 485
 486 config VIDEO
 487         bool "Enable graphical uboot console on HDMI, LCD or VGA"
 488         depends on !MACH_SUN8I_A83T && !MACH_SUN8I_H3 && !MACH_SUN9I && !MACH_SUN50I
 489         default y
 490         ---help---
 491         Say Y here to add support for using a cfb console on the HDMI, LCD
 492         or VGA output found on most sunxi devices. See doc/README.video for
 493         info on how to select the video output and mode.
 494
 495 config VIDEO_HDMI
 496         bool "HDMI output support"
 497         depends on VIDEO && !MACH_SUN8I
 498         default y
 499         ---help---
 500         Say Y here to add support for outputting video over HDMI.
 501
 502 config VIDEO_VGA
 503         bool "VGA output support"
 504         depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
 505         default n
 506         ---help---
 507         Say Y here to add support for outputting video over VGA.
 508
 509 config VIDEO_VGA_VIA_LCD
 510         bool "VGA via LCD controller support"
 511         depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
 512         default n
 513         ---help---
 514         Say Y here to add support for external DACs connected to the parallel
 515         LCD interface driving a VGA connector, such as found on the
 516         Olimex A13 boards.
 517
 518 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
 519         bool "Force sync active high for VGA via LCD controller support"
 520         depends on VIDEO_VGA_VIA_LCD
 521         default n
 522         ---help---
 523         Say Y here if you've a board which uses opendrain drivers for the vga
 524         hsync and vsync signals. Opendrain drivers cannot generate steep enough
 525         positive edges for a stable video output, so on boards with opendrain
 526         drivers the sync signals must always be active high.
 527
 528 config VIDEO_VGA_EXTERNAL_DAC_EN
 529         string "LCD panel power enable pin"
 530         depends on VIDEO_VGA_VIA_LCD
 531         default ""
 532         ---help---
 533         Set the enable pin for the external VGA DAC. This takes a string in the
 534         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 535
 536 config VIDEO_COMPOSITE
 537         bool "Composite video output support"
 538         depends on VIDEO && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
 539         default n
 540         ---help---
 541         Say Y here to add support for outputting composite video.
 542
 543 config VIDEO_LCD_MODE
 544         string "LCD panel timing details"
 545         depends on VIDEO
 546         default ""
 547         ---help---
 548         LCD panel timing details string, leave empty if there is no LCD panel.
 549         This is in drivers/video/videomodes.c: video_get_params() format, e.g.
 550         x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
 551         Also see: http://linux-sunxi.org/LCD
 552
 553 config VIDEO_LCD_DCLK_PHASE
 554         int "LCD panel display clock phase"
 555         depends on VIDEO
 556         default 1
 557         ---help---
 558         Select LCD panel display clock phase shift, range 0-3.
 559
 560 config VIDEO_LCD_POWER
 561         string "LCD panel power enable pin"
 562         depends on VIDEO
 563         default ""
 564         ---help---
 565         Set the power enable pin for the LCD panel. This takes a string in the
 566         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 567
 568 config VIDEO_LCD_RESET
 569         string "LCD panel reset pin"
 570         depends on VIDEO
 571         default ""
 572         ---help---
 573         Set the reset pin for the LCD panel. This takes a string in the format
 574         understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 575
 576 config VIDEO_LCD_BL_EN
 577         string "LCD panel backlight enable pin"
 578         depends on VIDEO
 579         default ""
 580         ---help---
 581         Set the backlight enable pin for the LCD panel. This takes a string in the
 582         the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
 583         port H.
 584
 585 config VIDEO_LCD_BL_PWM
 586         string "LCD panel backlight pwm pin"
 587         depends on VIDEO
 588         default ""
 589         ---help---
 590         Set the backlight pwm pin for the LCD panel. This takes a string in the
 591         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 592
 593 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
 594         bool "LCD panel backlight pwm is inverted"
 595         depends on VIDEO
 596         default y
 597         ---help---
 598         Set this if the backlight pwm output is active low.
 599
 600 config VIDEO_LCD_PANEL_I2C
 601         bool "LCD panel needs to be configured via i2c"
 602         depends on VIDEO
 603         default n
 604         select CMD_I2C
 605         ---help---
 606         Say y here if the LCD panel needs to be configured via i2c. This
 607         will add a bitbang i2c controller using gpios to talk to the LCD.
 608
 609 config VIDEO_LCD_PANEL_I2C_SDA
 610         string "LCD panel i2c interface SDA pin"
 611         depends on VIDEO_LCD_PANEL_I2C
 612         default "PG12"
 613         ---help---
 614         Set the SDA pin for the LCD i2c interface. This takes a string in the
 615         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 616
 617 config VIDEO_LCD_PANEL_I2C_SCL
 618         string "LCD panel i2c interface SCL pin"
 619         depends on VIDEO_LCD_PANEL_I2C
 620         default "PG10"
 621         ---help---
 622         Set the SCL pin for the LCD i2c interface. This takes a string in the
 623         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 624
 625
 626 # Note only one of these may be selected at a time! But hidden choices are
 627 # not supported by Kconfig
 628 config VIDEO_LCD_IF_PARALLEL
 629         bool
 630
 631 config VIDEO_LCD_IF_LVDS
 632         bool
 633
 634
 635 choice
 636         prompt "LCD panel support"
 637         depends on VIDEO
 638         ---help---
 639         Select which type of LCD panel to support.
 640
 641 config VIDEO_LCD_PANEL_PARALLEL
 642         bool "Generic parallel interface LCD panel"
 643         select VIDEO_LCD_IF_PARALLEL
 644
 645 config VIDEO_LCD_PANEL_LVDS
 646         bool "Generic lvds interface LCD panel"
 647         select VIDEO_LCD_IF_LVDS
 648
 649 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
 650         bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
 651         select VIDEO_LCD_SSD2828
 652         select VIDEO_LCD_IF_PARALLEL
 653         ---help---
 654         7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
 655
 656 config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
 657         bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
 658         select VIDEO_LCD_ANX9804
 659         select VIDEO_LCD_IF_PARALLEL
 660         select VIDEO_LCD_PANEL_I2C
 661         ---help---
 662         Select this for eDP LCD panels with 4 lanes running at 1.62G,
 663         connected via an ANX9804 bridge chip.
 664
 665 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
 666         bool "Hitachi tx18d42vm LCD panel"
 667         select VIDEO_LCD_HITACHI_TX18D42VM
 668         select VIDEO_LCD_IF_LVDS
 669         ---help---
 670         7.85" 1024x768 Hitachi tx18d42vm LCD panel support
 671
 672 config VIDEO_LCD_TL059WV5C0
 673         bool "tl059wv5c0 LCD panel"
 674         select VIDEO_LCD_PANEL_I2C
 675         select VIDEO_LCD_IF_PARALLEL
 676         ---help---
 677         6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
 678         Aigo M60/M608/M606 tablets.
 679
 680 endchoice
 681
 682
 683 config GMAC_TX_DELAY
 684         int "GMAC Transmit Clock Delay Chain"
 685         default 0
 686         ---help---
 687         Set the GMAC Transmit Clock Delay Chain value.
 688
 689 config SPL_STACK_R_ADDR
 690         default 0x4fe00000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || MACH_SUN50I
 691         default 0x2fe00000 if MACH_SUN9I
 692
 693 endif