2 * Keystone : Board initialization
5 * Texas Instruments Incorporated, <www.ti.com>
7 * SPDX-License-Identifier: GPL-2.0+
14 #include <fdt_support.h>
15 #include <asm/arch/ddr3.h>
16 #include <asm/arch/psc_defs.h>
17 #include <asm/arch/clock.h>
18 #include <asm/ti-common/ti-aemif.h>
19 #include <asm/ti-common/keystone_net.h>
21 DECLARE_GLOBAL_DATA_PTR
;
23 #if defined(CONFIG_TI_AEMIF)
24 static struct aemif_config aemif_configs
[] = {
26 .mode
= AEMIF_MODE_NAND
,
34 .width
= AEMIF_WIDTH_8
,
43 ddr3_size
= ddr3_init();
45 gd
->ram_size
= get_ram_size((long *)CONFIG_SYS_SDRAM_BASE
,
46 CONFIG_MAX_RAM_BANK_SIZE
);
47 #if defined(CONFIG_TI_AEMIF)
48 if (!board_is_k2g_ice())
49 aemif_init(ARRAY_SIZE(aemif_configs
), aemif_configs
);
52 if (!board_is_k2g_ice()) {
54 ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE
, ddr3_size
);
56 ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE
,
65 gd
->bd
->bi_boot_params
= CONFIG_SYS_SDRAM_BASE
+ 0x100;
70 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
72 int get_eth_env_param(char *env_name
)
77 env
= env_get(env_name
);
79 res
= simple_strtol(env
, NULL
, 0);
84 int board_eth_init(bd_t
*bis
)
89 char link_type_name
[32];
92 writel(KS2_ETHERNET_RGMII
, KS2_ETHERNET_CFG
);
94 /* By default, select PA PLL clock as PA clock source */
95 #ifndef CONFIG_SOC_K2G
96 if (psc_enable_module(KS2_LPSC_PA
))
99 if (psc_enable_module(KS2_LPSC_CPGMAC
))
101 if (psc_enable_module(KS2_LPSC_CRYPTO
))
104 if (cpu_is_k2e() || cpu_is_k2l())
107 port_num
= get_num_eth_ports();
109 for (j
= 0; j
< port_num
; j
++) {
110 sprintf(link_type_name
, "sgmii%d_link_type", j
);
111 res
= get_eth_env_param(link_type_name
);
113 eth_priv_cfg
[j
].sgmii_link_type
= res
;
115 keystone2_emac_initialize(ð_priv_cfg
[j
]);
123 #ifdef CONFIG_SPL_BUILD
124 void spl_board_init(void)
126 spl_init_keystone_plls();
127 preloader_console_init();
130 u32
spl_boot_device(void)
132 #if defined(CONFIG_SPL_SPI_LOAD)
133 return BOOT_DEVICE_SPI
;
135 puts("Unknown boot device\n");
141 #ifdef CONFIG_OF_BOARD_SETUP
142 int ft_board_setup(void *blob
, bd_t
*bd
)
152 int unitrd_fixup
= 0;
154 env
= env_get("mem_lpae");
155 lpae
= env
&& simple_strtol(env
, NULL
, 0);
156 env
= env_get("uinitrd_fixup");
157 unitrd_fixup
= env
&& simple_strtol(env
, NULL
, 0);
161 ddr3a_size
= ddr3_get_size();
162 if ((ddr3a_size
!= 8) && (ddr3a_size
!= 4))
167 start
[0] = bd
->bi_dram
[0].start
;
168 size
[0] = bd
->bi_dram
[0].size
;
170 /* adjust memory start address for LPAE */
172 start
[0] -= CONFIG_SYS_SDRAM_BASE
;
173 start
[0] += CONFIG_SYS_LPAE_SDRAM_BASE
;
176 if ((size
[0] == 0x80000000) && (ddr3a_size
!= 0)) {
177 size
[1] = ((u64
)ddr3a_size
- 2) << 30;
178 start
[1] = 0x880000000;
182 /* reserve memory at start of bank */
183 env
= env_get("mem_reserve_head");
185 start
[0] += ustrtoul(env
, &endp
, 0);
186 size
[0] -= ustrtoul(env
, &endp
, 0);
189 env
= env_get("mem_reserve");
191 size
[0] -= ustrtoul(env
, &endp
, 0);
193 fdt_fixup_memory_banks(blob
, start
, size
, nbanks
);
195 /* Fix up the initrd */
196 if (lpae
&& unitrd_fixup
) {
199 u64 initrd_start
, initrd_end
;
201 nodeoffset
= fdt_path_offset(blob
, "/chosen");
202 if (nodeoffset
>= 0) {
203 prop1
= (u32
*)fdt_getprop(blob
, nodeoffset
,
204 "linux,initrd-start", NULL
);
205 prop2
= (u32
*)fdt_getprop(blob
, nodeoffset
,
206 "linux,initrd-end", NULL
);
207 if (prop1
&& prop2
) {
208 initrd_start
= __be32_to_cpu(*prop1
);
209 initrd_start
-= CONFIG_SYS_SDRAM_BASE
;
210 initrd_start
+= CONFIG_SYS_LPAE_SDRAM_BASE
;
211 initrd_start
= __cpu_to_be64(initrd_start
);
212 initrd_end
= __be32_to_cpu(*prop2
);
213 initrd_end
-= CONFIG_SYS_SDRAM_BASE
;
214 initrd_end
+= CONFIG_SYS_LPAE_SDRAM_BASE
;
215 initrd_end
= __cpu_to_be64(initrd_end
);
217 err
= fdt_delprop(blob
, nodeoffset
,
218 "linux,initrd-start");
220 puts("error deleting initrd-start\n");
222 err
= fdt_delprop(blob
, nodeoffset
,
225 puts("error deleting initrd-end\n");
227 err
= fdt_setprop(blob
, nodeoffset
,
228 "linux,initrd-start",
230 sizeof(initrd_start
));
232 puts("error adding initrd-start\n");
234 err
= fdt_setprop(blob
, nodeoffset
,
239 puts("error adding linux,initrd-end\n");
247 void ft_board_setup_ex(void *blob
, bd_t
*bd
)
254 env
= env_get("mem_lpae");
255 lpae
= env
&& simple_strtol(env
, NULL
, 0);
259 * the initrd and other reserved memory areas are
260 * embedded in in the DTB itslef. fix up these addresses
263 reserve_start
= (u64
*)((char *)blob
+
264 fdt_off_mem_rsvmap(blob
));
266 *reserve_start
= __cpu_to_be64(*reserve_start
);
267 size
= __cpu_to_be64(*(reserve_start
+ 1));
269 *reserve_start
-= CONFIG_SYS_SDRAM_BASE
;
271 CONFIG_SYS_LPAE_SDRAM_BASE
;
273 __cpu_to_be64(*reserve_start
);
281 ddr3_check_ecc_int(KS2_DDR3A_EMIF_CTRL_BASE
);
283 #endif /* CONFIG_OF_BOARD_SETUP */
285 #if defined(CONFIG_DTB_RESELECT)
286 int __weak
embedded_dtb_select(void)