board/ti/ks2_evm/board_k2g.c

   1 /*
   2  * K2G EVM : Board initialization
   3  *
   4  * (C) Copyright 2015
   5  *     Texas Instruments Incorporated, <www.ti.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9 #include <common.h>
  10 #include <asm/arch/clock.h>
  11 #include <asm/ti-common/keystone_net.h>
  12 #include <asm/arch/psc_defs.h>
  13 #include <asm/arch/mmc_host_def.h>
  14 #include "mux-k2g.h"
  15
  16 #define SYS_CLK         24000000
  17
  18 unsigned int external_clk[ext_clk_count] = {
  19         [sys_clk]       =       SYS_CLK,
  20         [pa_clk]        =       SYS_CLK,
  21         [tetris_clk]    =       SYS_CLK,
  22         [ddr3a_clk]     =       SYS_CLK,
  23         [uart_clk]      =       SYS_CLK,
  24 };
  25
  26 static struct pll_init_data main_pll_config = {MAIN_PLL, 100, 1, 4};
  27 static struct pll_init_data tetris_pll_config = {TETRIS_PLL, 100, 1, 4};
  28 static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
  29 static struct pll_init_data nss_pll_config = {NSS_PLL, 250, 3, 2};
  30 static struct pll_init_data ddr3_pll_config = {DDR3A_PLL, 250, 3, 10};
  31
  32 struct pll_init_data *get_pll_init_data(int pll)
  33 {
  34         struct pll_init_data *data = NULL;
  35
  36         switch (pll) {
  37         case MAIN_PLL:
  38                 data = &main_pll_config;
  39                 break;
  40         case TETRIS_PLL:
  41                 data = &tetris_pll_config;
  42                 break;
  43         case NSS_PLL:
  44                 data = &nss_pll_config;
  45                 break;
  46         case UART_PLL:
  47                 data = &uart_pll_config;
  48                 break;
  49         case DDR3_PLL:
  50                 data = &ddr3_pll_config;
  51                 break;
  52         default:
  53                 data = NULL;
  54         }
  55
  56         return data;
  57 }
  58
  59 s16 divn_val[16] = {
  60         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
  61 };
  62
  63 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
  64 int board_mmc_init(bd_t *bis)
  65 {
  66         if (psc_enable_module(KS2_LPSC_MMC)) {
  67                 printf("%s module enabled failed\n", __func__);
  68                 return -1;
  69         }
  70
  71         omap_mmc_init(0, 0, 0, -1, -1);
  72         omap_mmc_init(1, 0, 0, -1, -1);
  73         return 0;
  74 }
  75 #endif
  76
  77 #ifdef CONFIG_BOARD_EARLY_INIT_F
  78 int board_early_init_f(void)
  79 {
  80         init_plls();
  81
  82         k2g_mux_config();
  83
  84         /* deassert FLASH_HOLD */
  85         clrbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_DIR_OFFSET,
  86                      BIT(9));
  87         setbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_SETDATA_OFFSET,
  88                      BIT(9));
  89
  90         return 0;
  91 }
  92 #endif
  93
  94 #ifdef CONFIG_SPL_BUILD
  95 void spl_init_keystone_plls(void)
  96 {
  97         init_plls();
  98 }
  99 #endif
 100
 101 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
 102 struct eth_priv_t eth_priv_cfg[] = {
 103         {
 104                 .int_name       = "K2G_EMAC",
 105                 .rx_flow        = 0,
 106                 .phy_addr       = 0,
 107                 .slave_port     = 1,
 108                 .sgmii_link_type = SGMII_LINK_MAC_PHY,
 109                 .phy_if          = PHY_INTERFACE_MODE_RGMII,
 110         },
 111 };
 112
 113 int get_num_eth_ports(void)
 114 {
 115         return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t);
 116 }
 117 #endif