board/ti/panda/panda.c

   1 /*
   2  * (C) Copyright 2010
   3  * Texas Instruments Incorporated, <www.ti.com>
   4  * Steve Sakoman  <steve@sakoman.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24 #include <common.h>
  25 #include <asm/arch/sys_proto.h>
  26 #include <asm/arch/mmc_host_def.h>
  27 #include <asm/arch/clock.h>
  28 #include <asm/arch/gpio.h>
  29 #include <asm/gpio.h>
  30
  31 #include "panda_mux_data.h"
  32
  33 #ifdef CONFIG_USB_EHCI
  34 #include <usb.h>
  35 #include <asm/arch/ehci.h>
  36 #include <asm/ehci-omap.h>
  37 #endif
  38
  39 #define PANDA_ULPI_PHY_TYPE_GPIO       182
  40 #define PANDA_BOARD_ID_1_GPIO          101
  41 #define PANDA_ES_BOARD_ID_1_GPIO        48
  42 #define PANDA_BOARD_ID_2_GPIO          171
  43 #define PANDA_ES_BOARD_ID_3_GPIO         3
  44 #define PANDA_ES_BOARD_ID_4_GPIO         2
  45
  46 DECLARE_GLOBAL_DATA_PTR;
  47
  48 const struct omap_sysinfo sysinfo = {
  49         "Board: OMAP4 Panda\n"
  50 };
  51
  52 struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;
  53
  54 /**
  55  * @brief board_init
  56  *
  57  * @return 0
  58  */
  59 int board_init(void)
  60 {
  61         gpmc_init();
  62
  63         gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA;
  64         gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
  65
  66         return 0;
  67 }
  68
  69 int board_eth_init(bd_t *bis)
  70 {
  71         return 0;
  72 }
  73
  74 /*
  75 * Routine: get_board_revision
  76 * Description: Detect if we are running on a panda revision A1-A6,
  77 *              or an ES panda board. This can be done by reading
  78 *              the level of GPIOs and checking the processor revisions.
  79 *              This should result in:
  80 *                       Panda 4430:
  81 *              GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5
  82 *              GPIO171, GPIO101, GPIO182: 1 0 1 => A6
  83 *                       Panda ES:
  84 *              GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2
  85 *              GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3
  86 */
  87 int get_board_revision(void)
  88 {
  89         int board_id0, board_id1, board_id2;
  90         int board_id3, board_id4;
  91         int board_id;
  92
  93         int processor_rev = omap_revision();
  94
  95         /* Setup the mux for the common board ID pins (gpio 171 and 182) */
  96         writew((IEN | M3), (*ctrl)->control_padconf_core_base + UNIPRO_TX0);
  97         writew((IEN | M3), (*ctrl)->control_padconf_core_base + FREF_CLK2_OUT);
  98
  99         board_id0 = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO);
 100         board_id2 = gpio_get_value(PANDA_BOARD_ID_2_GPIO);
 101
 102         if ((processor_rev >= OMAP4460_ES1_0 &&
 103              processor_rev <= OMAP4460_ES1_1)) {
 104                 /*
 105                  * Setup the mux for the ES specific board ID pins (gpio 101,
 106                  * 2 and 3.
 107                  */
 108                 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
 109                                 GPMC_A24);
 110                 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
 111                                 UNIPRO_RY0);
 112                 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
 113                                 UNIPRO_RX1);
 114
 115                 board_id1 = gpio_get_value(PANDA_ES_BOARD_ID_1_GPIO);
 116                 board_id3 = gpio_get_value(PANDA_ES_BOARD_ID_3_GPIO);
 117                 board_id4 = gpio_get_value(PANDA_ES_BOARD_ID_4_GPIO);
 118
 119 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 120                 setenv("board_name", strcat(CONFIG_SYS_BOARD, "-es"));
 121 #endif
 122                 board_id = ((board_id4 << 4) | (board_id3 << 3) |
 123                         (board_id2 << 2) | (board_id1 << 1) | (board_id0));
 124         } else {
 125                 /* Setup the mux for the Ax specific board ID pins (gpio 101) */
 126                 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
 127                                 FREF_CLK2_OUT);
 128
 129                 board_id1 = gpio_get_value(PANDA_BOARD_ID_1_GPIO);
 130                 board_id = ((board_id2 << 2) | (board_id1 << 1) | (board_id0));
 131
 132 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 133                 if ((board_id >= 0x3) && (processor_rev == OMAP4430_ES2_3))
 134                         setenv("board_name", strcat(CONFIG_SYS_BOARD, "-a4"));
 135 #endif
 136         }
 137
 138         return board_id;
 139 }
 140
 141 /**
 142  * @brief misc_init_r - Configure Panda board specific configurations
 143  * such as power configurations, ethernet initialization as phase2 of
 144  * boot sequence
 145  *
 146  * @return 0
 147  */
 148 int misc_init_r(void)
 149 {
 150         int phy_type;
 151         u32 auxclk, altclksrc;
 152
 153         /* EHCI is not supported on ES1.0 */
 154         if (omap_revision() == OMAP4430_ES1_0)
 155                 return 0;
 156
 157         get_board_revision();
 158
 159         gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO);
 160         phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO);
 161
 162         if (phy_type == 1) {
 163                 /* ULPI PHY supplied by auxclk3 derived from sys_clk */
 164                 debug("ULPI PHY supplied by auxclk3\n");
 165
 166                 auxclk = readl(&scrm->auxclk3);
 167                 /* Select sys_clk */
 168                 auxclk &= ~AUXCLK_SRCSELECT_MASK;
 169                 auxclk |=  AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT;
 170                 /* Set the divisor to 2 */
 171                 auxclk &= ~AUXCLK_CLKDIV_MASK;
 172                 auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT;
 173                 /* Request auxilary clock #3 */
 174                 auxclk |= AUXCLK_ENABLE_MASK;
 175
 176                 writel(auxclk, &scrm->auxclk3);
 177        } else {
 178                 /* ULPI PHY supplied by auxclk1 derived from PER dpll */
 179                 debug("ULPI PHY supplied by auxclk1\n");
 180
 181                 auxclk = readl(&scrm->auxclk1);
 182                 /* Select per DPLL */
 183                 auxclk &= ~AUXCLK_SRCSELECT_MASK;
 184                 auxclk |=  AUXCLK_SRCSELECT_PER_DPLL << AUXCLK_SRCSELECT_SHIFT;
 185                 /* Set the divisor to 16 */
 186                 auxclk &= ~AUXCLK_CLKDIV_MASK;
 187                 auxclk |= AUXCLK_CLKDIV_16 << AUXCLK_CLKDIV_SHIFT;
 188                 /* Request auxilary clock #3 */
 189                 auxclk |= AUXCLK_ENABLE_MASK;
 190
 191                 writel(auxclk, &scrm->auxclk1);
 192         }
 193
 194         altclksrc = readl(&scrm->altclksrc);
 195
 196         /* Activate alternate system clock supplier */
 197         altclksrc &= ~ALTCLKSRC_MODE_MASK;
 198         altclksrc |= ALTCLKSRC_MODE_ACTIVE;
 199
 200         /* enable clocks */
 201         altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK;
 202
 203         writel(altclksrc, &scrm->altclksrc);
 204
 205         return 0;
 206 }
 207
 208 void set_muxconf_regs_essential(void)
 209 {
 210         do_set_mux((*ctrl)->control_padconf_core_base,
 211                    core_padconf_array_essential,
 212                    sizeof(core_padconf_array_essential) /
 213                    sizeof(struct pad_conf_entry));
 214
 215         do_set_mux((*ctrl)->control_padconf_wkup_base,
 216                    wkup_padconf_array_essential,
 217                    sizeof(wkup_padconf_array_essential) /
 218                    sizeof(struct pad_conf_entry));
 219
 220         if (omap_revision() >= OMAP4460_ES1_0)
 221                 do_set_mux((*ctrl)->control_padconf_wkup_base,
 222                                  wkup_padconf_array_essential_4460,
 223                                  sizeof(wkup_padconf_array_essential_4460) /
 224                                  sizeof(struct pad_conf_entry));
 225 }
 226
 227 void set_muxconf_regs_non_essential(void)
 228 {
 229         do_set_mux((*ctrl)->control_padconf_core_base,
 230                    core_padconf_array_non_essential,
 231                    sizeof(core_padconf_array_non_essential) /
 232                    sizeof(struct pad_conf_entry));
 233
 234         if (omap_revision() < OMAP4460_ES1_0)
 235                 do_set_mux((*ctrl)->control_padconf_core_base,
 236                                 core_padconf_array_non_essential_4430,
 237                                 sizeof(core_padconf_array_non_essential_4430) /
 238                                 sizeof(struct pad_conf_entry));
 239         else
 240                 do_set_mux((*ctrl)->control_padconf_core_base,
 241                                 core_padconf_array_non_essential_4460,
 242                                 sizeof(core_padconf_array_non_essential_4460) /
 243                                 sizeof(struct pad_conf_entry));
 244
 245         do_set_mux((*ctrl)->control_padconf_wkup_base,
 246                    wkup_padconf_array_non_essential,
 247                    sizeof(wkup_padconf_array_non_essential) /
 248                    sizeof(struct pad_conf_entry));
 249
 250         if (omap_revision() < OMAP4460_ES1_0)
 251                 do_set_mux((*ctrl)->control_padconf_wkup_base,
 252                                 wkup_padconf_array_non_essential_4430,
 253                                 sizeof(wkup_padconf_array_non_essential_4430) /
 254                                 sizeof(struct pad_conf_entry));
 255 }
 256
 257 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
 258 int board_mmc_init(bd_t *bis)
 259 {
 260         return omap_mmc_init(0, 0, 0, -1, -1);
 261 }
 262 #endif
 263
 264 #ifdef CONFIG_USB_EHCI
 265
 266 static struct omap_usbhs_board_data usbhs_bdata = {
 267         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
 268         .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
 269         .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
 270 };
 271
 272 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 273 {
 274         int ret;
 275         unsigned int utmi_clk;
 276
 277         /* Now we can enable our port clocks */
 278         utmi_clk = readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL);
 279         utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK;
 280         sr32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, 0, 32, utmi_clk);
 281
 282         ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
 283         if (ret < 0)
 284                 return ret;
 285
 286         return 0;
 287 }
 288
 289 int ehci_hcd_stop(int index)
 290 {
 291         return omap_ehci_hcd_stop();
 292 }
 293 #endif
 294
 295 /*
 296  * get_board_rev() - get board revision
 297  */
 298 u32 get_board_rev(void)
 299 {
 300         return 0x20;
 301 }