2 * Copyright (C) 2012 Lucas Stach
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm/arch/clock.h>
9 #include <asm/arch/funcmux.h>
10 #include <asm/arch/pinmux.h>
11 #include <asm/arch-tegra/ap.h>
12 #include <asm/arch-tegra/board.h>
13 #include <asm/arch-tegra/tegra.h>
18 #define PMU_I2C_ADDRESS 0x34
19 #define MAX_I2C_RETRY 3
20 #define PMU_SUPPLYENE 0x14
21 #define PMU_SUPPLYENE_SYSINEN (1<<5)
22 #define PMU_SUPPLYENE_EXITSLREQ (1<<1)
24 int arch_misc_init(void)
26 /* Disable PMIC sleep mode on low supply voltage */
31 err
= i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS
, 1, &dev
);
33 debug("%s: Cannot find PMIC I2C chip\n", __func__
);
39 err
= dm_i2c_read(dev
, addr
, data
, 1);
41 debug("failed to get PMU_SUPPLYENE\n");
45 data
[0] &= ~PMU_SUPPLYENE_SYSINEN
;
46 data
[0] |= PMU_SUPPLYENE_EXITSLREQ
;
48 err
= dm_i2c_write(dev
, addr
, data
, 1);
50 debug("failed to set PMU_SUPPLYENE\n");
54 /* make sure SODIMM pin 87 nRESET_OUT is released properly */
55 pinmux_set_func(PMUX_PINGRP_ATA
, PMUX_FUNC_GMI
);
57 if (readl(NV_PA_BASE_SRAM
+ NVBOOTINFOTABLE_BOOTTYPE
) ==
59 printf("USB recovery mode\n");
64 #ifdef CONFIG_TEGRA_MMC
66 * Routine: pin_mux_mmc
67 * Description: setup the pin muxes/tristate values for the SDMMC(s)
69 void pin_mux_mmc(void)
71 funcmux_select(PERIPH_ID_SDMMC4
, FUNCMUX_SDMMC4_ATB_GMA_4_BIT
);
72 pinmux_tristate_disable(PMUX_PINGRP_GMB
);
76 #ifdef CONFIG_TEGRA_NAND
77 void pin_mux_nand(void)
79 funcmux_select(PERIPH_ID_NDFLASH
, FUNCMUX_NDFLASH_KBC_8_BIT
);
82 * configure pingroup ATC to something unrelated to
83 * avoid ATC overriding KBC
85 pinmux_set_func(PMUX_PINGRP_ATC
, PMUX_FUNC_GMI
);
89 #ifdef CONFIG_USB_EHCI_TEGRA
90 void pin_mux_usb(void)
92 /* module internal USB bus to connect ethernet chipset */
93 funcmux_select(PERIPH_ID_USB2
, FUNCMUX_USB2_ULPI
);
95 /* ULPI reference clock output */
96 pinmux_set_func(PMUX_PINGRP_CDEV2
, PMUX_FUNC_PLLP_OUT4
);
97 pinmux_tristate_disable(PMUX_PINGRP_CDEV2
);
100 pinmux_tristate_disable(PMUX_PINGRP_UAC
);
103 pinmux_tristate_disable(PMUX_PINGRP_DTE
);
105 /* Reset ASIX using LAN_RESET */
106 gpio_request(TEGRA_GPIO(V
, 4), "LAN_RESET");
107 gpio_direction_output(TEGRA_GPIO(V
, 4), 0);
108 pinmux_tristate_disable(PMUX_PINGRP_GPV
);
110 gpio_set_value(TEGRA_GPIO(V
, 4), 1);
112 /* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */
113 pinmux_tristate_disable(PMUX_PINGRP_SPIG
);
117 #ifdef CONFIG_VIDEO_TEGRA20
119 * Routine: pin_mux_display
120 * Description: setup the pin muxes/tristate values for the LCD interface)
122 void pin_mux_display(void)
125 * Manually untristate BL_ON (PT4 - SODIMM 71) as specified through
128 pinmux_tristate_disable(PMUX_PINGRP_DTA
);
130 pinmux_set_func(PMUX_PINGRP_SDC
, PMUX_FUNC_PWM
);
131 pinmux_tristate_disable(PMUX_PINGRP_SDC
);