]>
git.ipfire.org Git - people/ms/u-boot.git/blob - board/zipitz2/zipitz2.c
3 * Marek Vasut <marek.vasut@gmail.com>
5 * Heavily based on pxa255_idp platform
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/hardware.h>
30 #include <asm/arch/pxa.h>
31 #include <asm/arch/regs-mmc.h>
35 DECLARE_GLOBAL_DATA_PTR
;
40 inline void lcd_start(void) {};
44 * Miscelaneous platform dependent initialisations
49 /* We have RAM, disable cache */
53 /* arch number of Z2 */
54 gd
->bd
->bi_arch_number
= MACH_TYPE_ZIPIT2
;
56 /* adress of boot parameters */
57 gd
->bd
->bi_boot_params
= 0xa0000100;
68 gd
->ram_size
= PHYS_SDRAM_1_SIZE
;
72 void dram_init_banksize(void)
74 gd
->bd
->bi_dram
[0].start
= PHYS_SDRAM_1
;
75 gd
->bd
->bi_dram
[0].size
= PHYS_SDRAM_1_SIZE
;
79 int board_mmc_init(bd_t
*bis
)
100 { 0x13, 0x0070, 200 },
126 { 0x07, 0x0015, 30 },
133 void zipitz2_spi_sda(int set
)
137 writel((1 << 13), GPSR0
);
139 writel((1 << 13), GPCR0
);
142 void zipitz2_spi_scl(int set
)
146 writel((1 << 22), GPCR0
);
148 writel((1 << 22), GPSR0
);
151 unsigned char zipitz2_spi_read(void)
154 return !!(readl(GPLR1
) & (1 << 8));
157 int spi_cs_is_valid(unsigned int bus
, unsigned int cs
)
163 void spi_cs_activate(struct spi_slave
*slave
)
166 writel((1 << 24), GPCR2
);
169 void spi_cs_deactivate(struct spi_slave
*slave
)
172 writel((1 << 24), GPSR2
);
179 unsigned char reg
[3] = { 0x74, 0x00, 0 };
180 unsigned char data
[3] = { 0x76, 0, 0 };
181 unsigned char dummy
[3] = { 0, 0, 0 };
184 writel(readl(GAFR0_L
) | 0x00800000, GAFR0_L
);
185 /* Enable clock to all PWM */
186 writel(readl(CKEN
) | 0x3, CKEN
);
188 writel(0x4f, PWM_CTRL2
);
189 writel(0x2ff, PWM_PWDUTY2
);
190 writel(792, PWM_PERVAL2
);
192 /* Toggle the reset pin to reset the LCD */
193 writel((1 << 19), GPSR0
);
195 writel((1 << 19), GPCR0
);
197 writel((1 << 19), GPSR0
);
200 /* Program the LCD init sequence */
201 for (i
= 0; i
< sizeof(lcd_data
) / sizeof(lcd_data
[0]); i
++) {
204 reg
[2] = lcd_data
[i
].reg
;
205 spi_xfer(NULL
, 24, reg
, dummy
, SPI_XFER_BEGIN
| SPI_XFER_END
);
208 data
[1] = lcd_data
[i
].data
>> 8;
209 data
[2] = lcd_data
[i
].data
& 0xff;
210 spi_xfer(NULL
, 24, data
, dummy
, SPI_XFER_BEGIN
| SPI_XFER_END
);
212 if (lcd_data
[i
].mdelay
)
213 udelay(lcd_data
[i
].mdelay
* 1000);
216 writel((1 << 11), GPSR0
);