2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
17 #include <environment.h>
21 #if defined(CONFIG_CMD_IDE)
30 /* TODO: Can we move these into arch/ headers? */
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
47 #include <status_led.h>
52 #include <linux/errno.h>
54 #include <asm/sections.h>
55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
56 #include <asm/init_helpers.h>
58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
59 #include <asm/relocate.h>
62 #include <linux/compiler.h>
65 * Pointer to initial global data area
67 * Here we initialize it if needed.
69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
72 DECLARE_GLOBAL_DATA_PTR
= (gd_t
*) (CONFIG_SYS_INIT_GD_ADDR
);
74 DECLARE_GLOBAL_DATA_PTR
;
78 * TODO(sjg@chromium.org): IMO this code should be
79 * refactored to a single function, something like:
81 * void led_set_state(enum led_colour_t colour, int on);
83 /************************************************************************
84 * Coloured LED functionality
85 ************************************************************************
86 * May be supplied by boards if desired
88 __weak
void coloured_LED_init(void) {}
89 __weak
void red_led_on(void) {}
90 __weak
void red_led_off(void) {}
91 __weak
void green_led_on(void) {}
92 __weak
void green_led_off(void) {}
93 __weak
void yellow_led_on(void) {}
94 __weak
void yellow_led_off(void) {}
95 __weak
void blue_led_on(void) {}
96 __weak
void blue_led_off(void) {}
99 * Why is gd allocated a register? Prior to reloc it might be better to
100 * just pass it around to each function in this file?
102 * After reloc one could argue that it is hardly used and doesn't need
103 * to be in a register. Or if it is it should perhaps hold pointers to all
104 * global data for all modules, so that post-reloc we can avoid the massive
105 * literal pool we get on ARM. Or perhaps just encourage each module to use
110 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
113 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
114 static int init_func_watchdog_init(void)
116 # if defined(CONFIG_HW_WATCHDOG) && \
117 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
118 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
119 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
120 defined(CONFIG_IMX_WATCHDOG))
122 puts(" Watchdog enabled\n");
129 int init_func_watchdog_reset(void)
135 #endif /* CONFIG_WATCHDOG */
137 __weak
void board_add_ram_info(int use_default
)
139 /* please define platform specific board_add_ram_info() */
142 static int init_baud_rate(void)
144 gd
->baudrate
= getenv_ulong("baudrate", 10, CONFIG_BAUDRATE
);
148 static int display_text_info(void)
150 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
151 ulong bss_start
, bss_end
, text_base
;
153 bss_start
= (ulong
)&__bss_start
;
154 bss_end
= (ulong
)&__bss_end
;
156 #ifdef CONFIG_SYS_TEXT_BASE
157 text_base
= CONFIG_SYS_TEXT_BASE
;
159 text_base
= CONFIG_SYS_MONITOR_BASE
;
162 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
163 text_base
, bss_start
, bss_end
);
166 #ifdef CONFIG_USE_IRQ
167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START
);
168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START
);
174 static int announce_dram_init(void)
180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
181 static int init_func_ram(void)
187 static int show_dram_config(void)
189 unsigned long long size
;
191 #ifdef CONFIG_NR_DRAM_BANKS
194 debug("\nRAM Configuration:\n");
195 for (i
= size
= 0; i
< CONFIG_NR_DRAM_BANKS
; i
++) {
196 size
+= gd
->bd
->bi_dram
[i
].size
;
197 debug("Bank #%d: %llx ", i
,
198 (unsigned long long)(gd
->bd
->bi_dram
[i
].start
));
200 print_size(gd
->bd
->bi_dram
[i
].size
, "\n");
208 print_size(size
, "");
209 board_add_ram_info(0);
215 __weak
void dram_init_banksize(void)
217 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
218 gd
->bd
->bi_dram
[0].start
= CONFIG_SYS_SDRAM_BASE
;
219 gd
->bd
->bi_dram
[0].size
= get_effective_memsize();
223 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
224 static int init_func_i2c(void)
227 #ifdef CONFIG_SYS_I2C
230 i2c_init(CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
237 #if defined(CONFIG_HARD_SPI)
238 static int init_func_spi(void)
248 static int zero_global_data(void)
250 memset((void *)gd
, '\0', sizeof(gd_t
));
255 static int setup_mon_len(void)
257 #if defined(__ARM__) || defined(__MICROBLAZE__)
258 gd
->mon_len
= (ulong
)&__bss_end
- (ulong
)_start
;
259 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
260 gd
->mon_len
= (ulong
)&_end
- (ulong
)_init
;
261 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
262 gd
->mon_len
= CONFIG_SYS_MONITOR_LEN
;
263 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
264 gd
->mon_len
= (ulong
)(&__bss_end
) - (ulong
)(&_start
);
265 #elif defined(CONFIG_SYS_MONITOR_BASE)
266 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
267 gd
->mon_len
= (ulong
)&__bss_end
- CONFIG_SYS_MONITOR_BASE
;
272 __weak
int arch_cpu_init(void)
277 __weak
int mach_cpu_init(void)
282 /* Get the top of usable RAM */
283 __weak ulong
board_get_usable_ram_top(ulong total_size
)
285 #ifdef CONFIG_SYS_SDRAM_BASE
287 * Detect whether we have so much RAM that it goes past the end of our
288 * 32-bit address space. If so, clip the usable RAM so it doesn't.
290 if (gd
->ram_top
< CONFIG_SYS_SDRAM_BASE
)
292 * Will wrap back to top of 32-bit space when reservations
300 static int setup_dest_addr(void)
302 debug("Monitor len: %08lX\n", gd
->mon_len
);
304 * Ram is setup, size stored in gd !!
306 debug("Ram size: %08lX\n", (ulong
)gd
->ram_size
);
307 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
309 * Subtract specified amount of memory to hide so that it won't
310 * get "touched" at all by U-Boot. By fixing up gd->ram_size
311 * the Linux kernel should now get passed the now "corrected"
312 * memory size and won't touch it either. This should work
313 * for arch/ppc and arch/powerpc. Only Linux board ports in
314 * arch/powerpc with bootwrapper support, that recalculate the
315 * memory size from the SDRAM controller setup will have to
318 gd
->ram_size
-= CONFIG_SYS_MEM_TOP_HIDE
;
320 #ifdef CONFIG_SYS_SDRAM_BASE
321 gd
->ram_top
= CONFIG_SYS_SDRAM_BASE
;
323 gd
->ram_top
+= get_effective_memsize();
324 gd
->ram_top
= board_get_usable_ram_top(gd
->mon_len
);
325 gd
->relocaddr
= gd
->ram_top
;
326 debug("Ram top: %08lX\n", (ulong
)gd
->ram_top
);
327 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
329 * We need to make sure the location we intend to put secondary core
330 * boot code is reserved and not used by any part of u-boot
332 if (gd
->relocaddr
> determine_mp_bootpg(NULL
)) {
333 gd
->relocaddr
= determine_mp_bootpg(NULL
);
334 debug("Reserving MP boot page to %08lx\n", gd
->relocaddr
);
340 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
341 static int reserve_logbuffer(void)
343 /* reserve kernel log buffer */
344 gd
->relocaddr
-= LOGBUFF_RESERVE
;
345 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN
,
352 /* reserve protected RAM */
353 static int reserve_pram(void)
357 reg
= getenv_ulong("pram", 10, CONFIG_PRAM
);
358 gd
->relocaddr
-= (reg
<< 10); /* size is in kB */
359 debug("Reserving %ldk for protected RAM at %08lx\n", reg
,
363 #endif /* CONFIG_PRAM */
365 /* Round memory pointer down to next 4 kB limit */
366 static int reserve_round_4k(void)
368 gd
->relocaddr
&= ~(4096 - 1);
372 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
374 static int reserve_mmu(void)
376 /* reserve TLB table */
377 gd
->arch
.tlb_size
= PGTABLE_SIZE
;
378 gd
->relocaddr
-= gd
->arch
.tlb_size
;
380 /* round down to next 64 kB limit */
381 gd
->relocaddr
&= ~(0x10000 - 1);
383 gd
->arch
.tlb_addr
= gd
->relocaddr
;
384 debug("TLB table from %08lx to %08lx\n", gd
->arch
.tlb_addr
,
385 gd
->arch
.tlb_addr
+ gd
->arch
.tlb_size
);
387 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
389 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
390 * with location within secure ram.
392 gd
->arch
.tlb_allocated
= gd
->arch
.tlb_addr
;
399 #ifdef CONFIG_DM_VIDEO
400 static int reserve_video(void)
405 addr
= gd
->relocaddr
;
406 ret
= video_reserve(&addr
);
409 gd
->relocaddr
= addr
;
416 static int reserve_lcd(void)
418 # ifdef CONFIG_FB_ADDR
419 gd
->fb_base
= CONFIG_FB_ADDR
;
421 /* reserve memory for LCD display (always full pages) */
422 gd
->relocaddr
= lcd_setmem(gd
->relocaddr
);
423 gd
->fb_base
= gd
->relocaddr
;
424 # endif /* CONFIG_FB_ADDR */
428 # endif /* CONFIG_LCD */
430 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
431 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
432 !defined(CONFIG_M68K)
433 static int reserve_legacy_video(void)
435 /* reserve memory for video display (always full pages) */
436 gd
->relocaddr
= video_setmem(gd
->relocaddr
);
437 gd
->fb_base
= gd
->relocaddr
;
442 #endif /* !CONFIG_DM_VIDEO */
444 static int reserve_trace(void)
447 gd
->relocaddr
-= CONFIG_TRACE_BUFFER_SIZE
;
448 gd
->trace_buff
= map_sysmem(gd
->relocaddr
, CONFIG_TRACE_BUFFER_SIZE
);
449 debug("Reserving %dk for trace data at: %08lx\n",
450 CONFIG_TRACE_BUFFER_SIZE
>> 10, gd
->relocaddr
);
456 static int reserve_uboot(void)
459 * reserve memory for U-Boot code, data & bss
460 * round down to next 4 kB limit
462 gd
->relocaddr
-= gd
->mon_len
;
463 gd
->relocaddr
&= ~(4096 - 1);
465 /* round down to next 64 kB limit so that IVPR stays aligned */
466 gd
->relocaddr
&= ~(65536 - 1);
469 debug("Reserving %ldk for U-Boot at: %08lx\n", gd
->mon_len
>> 10,
472 gd
->start_addr_sp
= gd
->relocaddr
;
477 #ifndef CONFIG_SPL_BUILD
478 /* reserve memory for malloc() area */
479 static int reserve_malloc(void)
481 gd
->start_addr_sp
= gd
->start_addr_sp
- TOTAL_MALLOC_LEN
;
482 debug("Reserving %dk for malloc() at: %08lx\n",
483 TOTAL_MALLOC_LEN
>> 10, gd
->start_addr_sp
);
487 /* (permanently) allocate a Board Info struct */
488 static int reserve_board(void)
491 gd
->start_addr_sp
-= sizeof(bd_t
);
492 gd
->bd
= (bd_t
*)map_sysmem(gd
->start_addr_sp
, sizeof(bd_t
));
493 memset(gd
->bd
, '\0', sizeof(bd_t
));
494 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
495 sizeof(bd_t
), gd
->start_addr_sp
);
501 static int setup_machine(void)
503 #ifdef CONFIG_MACH_TYPE
504 gd
->bd
->bi_arch_number
= CONFIG_MACH_TYPE
; /* board id for Linux */
509 static int reserve_global_data(void)
511 gd
->start_addr_sp
-= sizeof(gd_t
);
512 gd
->new_gd
= (gd_t
*)map_sysmem(gd
->start_addr_sp
, sizeof(gd_t
));
513 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
514 sizeof(gd_t
), gd
->start_addr_sp
);
518 static int reserve_fdt(void)
520 #ifndef CONFIG_OF_EMBED
522 * If the device tree is sitting immediately above our image then we
523 * must relocate it. If it is embedded in the data section, then it
524 * will be relocated with other data.
527 gd
->fdt_size
= ALIGN(fdt_totalsize(gd
->fdt_blob
) + 0x1000, 32);
529 gd
->start_addr_sp
-= gd
->fdt_size
;
530 gd
->new_fdt
= map_sysmem(gd
->start_addr_sp
, gd
->fdt_size
);
531 debug("Reserving %lu Bytes for FDT at: %08lx\n",
532 gd
->fdt_size
, gd
->start_addr_sp
);
539 int arch_reserve_stacks(void)
544 static int reserve_stacks(void)
546 /* make stack pointer 16-byte aligned */
547 gd
->start_addr_sp
-= 16;
548 gd
->start_addr_sp
&= ~0xf;
551 * let the architecture-specific code tailor gd->start_addr_sp and
554 return arch_reserve_stacks();
557 static int display_new_sp(void)
559 debug("New Stack Pointer is: %08lx\n", gd
->start_addr_sp
);
564 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
566 static int setup_board_part1(void)
571 * Save local variables to board info struct
573 bd
->bi_memstart
= CONFIG_SYS_SDRAM_BASE
; /* start of memory */
574 bd
->bi_memsize
= gd
->ram_size
; /* size in bytes */
576 #ifdef CONFIG_SYS_SRAM_BASE
577 bd
->bi_sramstart
= CONFIG_SYS_SRAM_BASE
; /* start of SRAM */
578 bd
->bi_sramsize
= CONFIG_SYS_SRAM_SIZE
; /* size of SRAM */
581 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
582 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
583 bd
->bi_immr_base
= CONFIG_SYS_IMMR
; /* base of IMMR register */
585 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
586 bd
->bi_mbar_base
= CONFIG_SYS_MBAR
; /* base of internal registers */
588 #if defined(CONFIG_MPC83xx)
589 bd
->bi_immrbar
= CONFIG_SYS_IMMR
;
596 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
597 static int setup_board_part2(void)
601 bd
->bi_intfreq
= gd
->cpu_clk
; /* Internal Freq, in Hz */
602 bd
->bi_busfreq
= gd
->bus_clk
; /* Bus Freq, in Hz */
603 #if defined(CONFIG_CPM2)
604 bd
->bi_cpmfreq
= gd
->arch
.cpm_clk
;
605 bd
->bi_brgfreq
= gd
->arch
.brg_clk
;
606 bd
->bi_sccfreq
= gd
->arch
.scc_clk
;
607 bd
->bi_vco
= gd
->arch
.vco_out
;
608 #endif /* CONFIG_CPM2 */
609 #if defined(CONFIG_MPC512X)
610 bd
->bi_ipsfreq
= gd
->arch
.ips_clk
;
611 #endif /* CONFIG_MPC512X */
612 #if defined(CONFIG_MPC5xxx)
613 bd
->bi_ipbfreq
= gd
->arch
.ipb_clk
;
614 bd
->bi_pcifreq
= gd
->pci_clk
;
615 #endif /* CONFIG_MPC5xxx */
616 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
617 bd
->bi_pcifreq
= gd
->pci_clk
;
619 #if defined(CONFIG_EXTRA_CLOCK)
620 bd
->bi_inpfreq
= gd
->arch
.inp_clk
; /* input Freq in Hz */
621 bd
->bi_vcofreq
= gd
->arch
.vco_clk
; /* vco Freq in Hz */
622 bd
->bi_flbfreq
= gd
->arch
.flb_clk
; /* flexbus Freq in Hz */
629 #ifdef CONFIG_SYS_EXTBDINFO
630 static int setup_board_extra(void)
634 strncpy((char *) bd
->bi_s_version
, "1.2", sizeof(bd
->bi_s_version
));
635 strncpy((char *) bd
->bi_r_version
, U_BOOT_VERSION
,
636 sizeof(bd
->bi_r_version
));
638 bd
->bi_procfreq
= gd
->cpu_clk
; /* Processor Speed, In Hz */
639 bd
->bi_plb_busfreq
= gd
->bus_clk
;
640 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
641 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
642 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
643 bd
->bi_pci_busfreq
= get_PCI_freq();
644 bd
->bi_opbfreq
= get_OPB_freq();
645 #elif defined(CONFIG_XILINX_405)
646 bd
->bi_pci_busfreq
= get_PCI_freq();
654 static int init_post(void)
656 post_bootmode_init();
657 post_run(NULL
, POST_ROM
| post_bootmode_get(0));
663 static int setup_dram_config(void)
665 /* Ram is board specific, so move it to board code ... */
666 dram_init_banksize();
671 static int reloc_fdt(void)
673 #ifndef CONFIG_OF_EMBED
674 if (gd
->flags
& GD_FLG_SKIP_RELOC
)
677 memcpy(gd
->new_fdt
, gd
->fdt_blob
, gd
->fdt_size
);
678 gd
->fdt_blob
= gd
->new_fdt
;
685 static int setup_reloc(void)
687 if (gd
->flags
& GD_FLG_SKIP_RELOC
) {
688 debug("Skipping relocation due to flag\n");
692 #ifdef CONFIG_SYS_TEXT_BASE
693 gd
->reloc_off
= gd
->relocaddr
- CONFIG_SYS_TEXT_BASE
;
696 * On all ColdFire arch cpu, monitor code starts always
697 * just after the default vector table location, so at 0x400
699 gd
->reloc_off
= gd
->relocaddr
- (CONFIG_SYS_TEXT_BASE
+ 0x400);
702 memcpy(gd
->new_gd
, (char *)gd
, sizeof(gd_t
));
704 debug("Relocation Offset is: %08lx\n", gd
->reloc_off
);
705 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
706 gd
->relocaddr
, (ulong
)map_to_sysmem(gd
->new_gd
),
712 #ifdef CONFIG_OF_BOARD_FIXUP
713 static int fix_fdt(void)
715 return board_fix_fdt((void *)gd
->fdt_blob
);
719 /* ARM calls relocate_code from its crt0.S */
720 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
721 !CONFIG_IS_ENABLED(X86_64)
723 static int jump_to_copy(void)
725 if (gd
->flags
& GD_FLG_SKIP_RELOC
)
728 * x86 is special, but in a nice way. It uses a trampoline which
729 * enables the dcache if possible.
731 * For now, other archs use relocate_code(), which is implemented
732 * similarly for all archs. When we do generic relocation, hopefully
733 * we can make all archs enable the dcache prior to relocation.
735 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
737 * SDRAM and console are now initialised. The final stack can now
738 * be setup in SDRAM. Code execution will continue in Flash, but
739 * with the stack in SDRAM and Global Data in temporary memory
742 arch_setup_gd(gd
->new_gd
);
743 board_init_f_r_trampoline(gd
->start_addr_sp
);
745 relocate_code(gd
->start_addr_sp
, gd
->new_gd
, gd
->relocaddr
);
752 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
753 static int mark_bootstage(void)
755 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F
, "board_init_f");
760 static int initf_console_record(void)
762 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
763 return console_record_init();
769 static int initf_dm(void)
771 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
774 ret
= dm_init_and_scan(true);
778 #ifdef CONFIG_TIMER_EARLY
779 ret
= dm_timer_init();
787 /* Architecture-specific memory reservation */
788 __weak
int reserve_arch(void)
793 __weak
int arch_cpu_init_dm(void)
798 static const init_fnc_t init_sequence_f
[] = {
800 #ifdef CONFIG_OF_CONTROL
807 initf_console_record
,
808 #if defined(CONFIG_HAVE_FSP)
811 arch_cpu_init
, /* basic arch cpu dependent setup */
812 mach_cpu_init
, /* SoC/machine dependent CPU setup */
815 mark_bootstage
, /* need timer, go after init dm */
816 #if defined(CONFIG_BOARD_EARLY_INIT_F)
819 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
820 /* get CPU and bus clocks according to the environment variable */
821 get_clocks
, /* get CPU and bus clocks (etc.) */
823 timer_init
, /* initialize timer */
824 #if defined(CONFIG_BOARD_POSTCLK_INIT)
827 env_init
, /* initialize environment */
828 init_baud_rate
, /* initialze baudrate settings */
829 serial_init
, /* serial communications setup */
830 console_init_f
, /* stage 1 init of console */
831 display_options
, /* say that we are here */
832 display_text_info
, /* show debugging info if required */
833 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
837 #if defined(CONFIG_DISPLAY_CPUINFO)
838 print_cpuinfo
, /* display cpu info (and speed) */
840 #if defined(CONFIG_DISPLAY_BOARDINFO)
843 INIT_FUNC_WATCHDOG_INIT
844 #if defined(CONFIG_MISC_INIT_F)
847 INIT_FUNC_WATCHDOG_RESET
848 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
851 #if defined(CONFIG_HARD_SPI)
855 /* TODO: unify all these dram functions? */
856 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
857 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \
859 dram_init
, /* configure available RAM banks */
861 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
867 INIT_FUNC_WATCHDOG_RESET
868 #if defined(CONFIG_SYS_DRAM_TEST)
870 #endif /* CONFIG_SYS_DRAM_TEST */
871 INIT_FUNC_WATCHDOG_RESET
876 INIT_FUNC_WATCHDOG_RESET
878 * Now that we have DRAM mapped and working, we can
879 * relocate the code and continue running from DRAM.
881 * Reserve memory at end of RAM for (top down in that order):
882 * - area that won't get touched by U-Boot and Linux (optional)
883 * - kernel log buffer
887 * - board info struct
890 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
897 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
901 #ifdef CONFIG_DM_VIDEO
907 /* TODO: Why the dependency on CONFIG_8xx? */
908 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
909 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
910 !defined(CONFIG_M68K)
911 reserve_legacy_video
,
913 #endif /* CONFIG_DM_VIDEO */
916 #ifndef CONFIG_SPL_BUILD
927 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
931 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
932 INIT_FUNC_WATCHDOG_RESET
936 #ifdef CONFIG_SYS_EXTBDINFO
939 #ifdef CONFIG_OF_BOARD_FIXUP
942 INIT_FUNC_WATCHDOG_RESET
945 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
950 #if defined(CONFIG_XTENSA)
953 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
954 !CONFIG_IS_ENABLED(X86_64)
960 void board_init_f(ulong boot_flags
)
962 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
964 * For some architectures, global data is initialized and used before
965 * calling this function. The data should be preserved. For others,
966 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
967 * here to host global data until relocation.
974 * Clear global data before it is accessed at debug print
975 * in initcall_run_list. Otherwise the debug print probably
976 * get the wrong value of gd->have_console.
981 gd
->flags
= boot_flags
;
982 gd
->have_console
= 0;
984 if (initcall_run_list(init_sequence_f
))
987 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
988 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
989 /* NOTREACHED - jump_to_copy() does not return */
994 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
996 * For now this code is only used on x86.
998 * init_sequence_f_r is the list of init functions which are run when
999 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1000 * The following limitations must be considered when implementing an
1002 * - 'static' variables are read-only
1003 * - Global Data (gd->xxx) is read/write
1005 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1006 * supported). It _should_, if possible, copy global data to RAM and
1007 * initialise the CPU caches (to speed up the relocation process)
1009 * NOTE: At present only x86 uses this route, but it is intended that
1010 * all archs will move to this when generic relocation is implemented.
1012 static const init_fnc_t init_sequence_f_r
[] = {
1013 #if !CONFIG_IS_ENABLED(X86_64)
1020 void board_init_f_r(void)
1022 if (initcall_run_list(init_sequence_f_r
))
1026 * The pre-relocation drivers may be using memory that has now gone
1027 * away. Mark serial as unavailable - this will fall back to the debug
1028 * UART if available.
1030 gd
->flags
&= ~GD_FLG_SERIAL_READY
;
1033 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1034 * Transfer execution from Flash to RAM by calculating the address
1035 * of the in-RAM copy of board_init_r() and calling it
1037 (board_init_r
+ gd
->reloc_off
)((gd_t
*)gd
, gd
->relocaddr
);
1039 /* NOTREACHED - board_init_r() does not return */
1042 #endif /* CONFIG_X86 */