common/board_f.c

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2002-2006
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Marius Groeger <mgroeger@sysgo.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #include <common.h>
  14 #include <console.h>
  15 #include <environment.h>
  16 #include <dm.h>
  17 #include <fdtdec.h>
  18 #include <fs.h>
  19 #include <i2c.h>
  20 #include <initcall.h>
  21 #include <init_helpers.h>
  22 #include <logbuff.h>
  23 #include <malloc.h>
  24 #include <mapmem.h>
  25 #include <os.h>
  26 #include <post.h>
  27 #include <relocate.h>
  28 #include <spi.h>
  29 #include <status_led.h>
  30 #include <timer.h>
  31 #include <trace.h>
  32 #include <video.h>
  33 #include <watchdog.h>
  34 #ifdef CONFIG_MACH_TYPE
  35 #include <asm/mach-types.h>
  36 #endif
  37 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  38 #include <asm/mp.h>
  39 #endif
  40 #include <asm/io.h>
  41 #include <asm/sections.h>
  42 #include <dm/root.h>
  43 #include <linux/errno.h>
  44
  45 /*
  46  * Pointer to initial global data area
  47  *
  48  * Here we initialize it if needed.
  49  */
  50 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  51 #undef  XTRN_DECLARE_GLOBAL_DATA_PTR
  52 #define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
  53 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  54 #else
  55 DECLARE_GLOBAL_DATA_PTR;
  56 #endif
  57
  58 /*
  59  * TODO(sjg@chromium.org): IMO this code should be
  60  * refactored to a single function, something like:
  61  *
  62  * void led_set_state(enum led_colour_t colour, int on);
  63  */
  64 /************************************************************************
  65  * Coloured LED functionality
  66  ************************************************************************
  67  * May be supplied by boards if desired
  68  */
  69 __weak void coloured_LED_init(void) {}
  70 __weak void red_led_on(void) {}
  71 __weak void red_led_off(void) {}
  72 __weak void green_led_on(void) {}
  73 __weak void green_led_off(void) {}
  74 __weak void yellow_led_on(void) {}
  75 __weak void yellow_led_off(void) {}
  76 __weak void blue_led_on(void) {}
  77 __weak void blue_led_off(void) {}
  78
  79 /*
  80  * Why is gd allocated a register? Prior to reloc it might be better to
  81  * just pass it around to each function in this file?
  82  *
  83  * After reloc one could argue that it is hardly used and doesn't need
  84  * to be in a register. Or if it is it should perhaps hold pointers to all
  85  * global data for all modules, so that post-reloc we can avoid the massive
  86  * literal pool we get on ARM. Or perhaps just encourage each module to use
  87  * a structure...
  88  */
  89
  90 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  91 static int init_func_watchdog_init(void)
  92 {
  93 # if defined(CONFIG_HW_WATCHDOG) && \
  94         (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  95         defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
  96         defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  97         defined(CONFIG_IMX_WATCHDOG))
  98         hw_watchdog_init();
  99         puts("       Watchdog enabled\n");
 100 # endif
 101         WATCHDOG_RESET();
 102
 103         return 0;
 104 }
 105
 106 int init_func_watchdog_reset(void)
 107 {
 108         WATCHDOG_RESET();
 109
 110         return 0;
 111 }
 112 #endif /* CONFIG_WATCHDOG */
 113
 114 __weak void board_add_ram_info(int use_default)
 115 {
 116         /* please define platform specific board_add_ram_info() */
 117 }
 118
 119 static int init_baud_rate(void)
 120 {
 121         gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
 122         return 0;
 123 }
 124
 125 static int display_text_info(void)
 126 {
 127 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
 128         ulong bss_start, bss_end, text_base;
 129
 130         bss_start = (ulong)&__bss_start;
 131         bss_end = (ulong)&__bss_end;
 132
 133 #ifdef CONFIG_SYS_TEXT_BASE
 134         text_base = CONFIG_SYS_TEXT_BASE;
 135 #else
 136         text_base = CONFIG_SYS_MONITOR_BASE;
 137 #endif
 138
 139         debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 140                 text_base, bss_start, bss_end);
 141 #endif
 142
 143         return 0;
 144 }
 145
 146 static int announce_dram_init(void)
 147 {
 148         puts("DRAM:  ");
 149         return 0;
 150 }
 151
 152 static int show_dram_config(void)
 153 {
 154         unsigned long long size;
 155
 156 #ifdef CONFIG_NR_DRAM_BANKS
 157         int i;
 158
 159         debug("\nRAM Configuration:\n");
 160         for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 161                 size += gd->bd->bi_dram[i].size;
 162                 debug("Bank #%d: %llx ", i,
 163                       (unsigned long long)(gd->bd->bi_dram[i].start));
 164 #ifdef DEBUG
 165                 print_size(gd->bd->bi_dram[i].size, "\n");
 166 #endif
 167         }
 168         debug("\nDRAM:  ");
 169 #else
 170         size = gd->ram_size;
 171 #endif
 172
 173         print_size(size, "");
 174         board_add_ram_info(0);
 175         putc('\n');
 176
 177         return 0;
 178 }
 179
 180 __weak int dram_init_banksize(void)
 181 {
 182 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 183         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 184         gd->bd->bi_dram[0].size = get_effective_memsize();
 185 #endif
 186
 187         return 0;
 188 }
 189
 190 #if defined(CONFIG_SYS_I2C)
 191 static int init_func_i2c(void)
 192 {
 193         puts("I2C:   ");
 194 #ifdef CONFIG_SYS_I2C
 195         i2c_init_all();
 196 #else
 197         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 198 #endif
 199         puts("ready\n");
 200         return 0;
 201 }
 202 #endif
 203
 204 #if defined(CONFIG_HARD_SPI)
 205 static int init_func_spi(void)
 206 {
 207         puts("SPI:   ");
 208         spi_init();
 209         puts("ready\n");
 210         return 0;
 211 }
 212 #endif
 213
 214 __maybe_unused
 215 static int zero_global_data(void)
 216 {
 217         memset((void *)gd, '\0', sizeof(gd_t));
 218
 219         return 0;
 220 }
 221
 222 static int setup_mon_len(void)
 223 {
 224 #if defined(__ARM__) || defined(__MICROBLAZE__)
 225         gd->mon_len = (ulong)&__bss_end - (ulong)_start;
 226 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
 227         gd->mon_len = (ulong)&_end - (ulong)_init;
 228 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
 229         gd->mon_len = CONFIG_SYS_MONITOR_LEN;
 230 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
 231         gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 232 #elif defined(CONFIG_SYS_MONITOR_BASE)
 233         /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 234         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
 235 #endif
 236         return 0;
 237 }
 238
 239 __weak int arch_cpu_init(void)
 240 {
 241         return 0;
 242 }
 243
 244 __weak int mach_cpu_init(void)
 245 {
 246         return 0;
 247 }
 248
 249 /* Get the top of usable RAM */
 250 __weak ulong board_get_usable_ram_top(ulong total_size)
 251 {
 252 #ifdef CONFIG_SYS_SDRAM_BASE
 253         /*
 254          * Detect whether we have so much RAM that it goes past the end of our
 255          * 32-bit address space. If so, clip the usable RAM so it doesn't.
 256          */
 257         if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
 258                 /*
 259                  * Will wrap back to top of 32-bit space when reservations
 260                  * are made.
 261                  */
 262                 return 0;
 263 #endif
 264         return gd->ram_top;
 265 }
 266
 267 static int setup_dest_addr(void)
 268 {
 269         debug("Monitor len: %08lX\n", gd->mon_len);
 270         /*
 271          * Ram is setup, size stored in gd !!
 272          */
 273         debug("Ram size: %08lX\n", (ulong)gd->ram_size);
 274 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
 275         /*
 276          * Subtract specified amount of memory to hide so that it won't
 277          * get "touched" at all by U-Boot. By fixing up gd->ram_size
 278          * the Linux kernel should now get passed the now "corrected"
 279          * memory size and won't touch it either. This should work
 280          * for arch/ppc and arch/powerpc. Only Linux board ports in
 281          * arch/powerpc with bootwrapper support, that recalculate the
 282          * memory size from the SDRAM controller setup will have to
 283          * get fixed.
 284          */
 285         gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
 286 #endif
 287 #ifdef CONFIG_SYS_SDRAM_BASE
 288         gd->ram_top = CONFIG_SYS_SDRAM_BASE;
 289 #endif
 290         gd->ram_top += get_effective_memsize();
 291         gd->ram_top = board_get_usable_ram_top(gd->mon_len);
 292         gd->relocaddr = gd->ram_top;
 293         debug("Ram top: %08lX\n", (ulong)gd->ram_top);
 294 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 295         /*
 296          * We need to make sure the location we intend to put secondary core
 297          * boot code is reserved and not used by any part of u-boot
 298          */
 299         if (gd->relocaddr > determine_mp_bootpg(NULL)) {
 300                 gd->relocaddr = determine_mp_bootpg(NULL);
 301                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
 302         }
 303 #endif
 304         return 0;
 305 }
 306
 307 #if defined(CONFIG_LOGBUFFER)
 308 static int reserve_logbuffer(void)
 309 {
 310 #ifndef CONFIG_ALT_LB_ADDR
 311         /* reserve kernel log buffer */
 312         gd->relocaddr -= LOGBUFF_RESERVE;
 313         debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
 314                 gd->relocaddr);
 315 #endif
 316
 317         return 0;
 318 }
 319 #endif
 320
 321 #ifdef CONFIG_PRAM
 322 /* reserve protected RAM */
 323 static int reserve_pram(void)
 324 {
 325         ulong reg;
 326
 327         reg = getenv_ulong("pram", 10, CONFIG_PRAM);
 328         gd->relocaddr -= (reg << 10);           /* size is in kB */
 329         debug("Reserving %ldk for protected RAM at %08lx\n", reg,
 330               gd->relocaddr);
 331         return 0;
 332 }
 333 #endif /* CONFIG_PRAM */
 334
 335 /* Round memory pointer down to next 4 kB limit */
 336 static int reserve_round_4k(void)
 337 {
 338         gd->relocaddr &= ~(4096 - 1);
 339         return 0;
 340 }
 341
 342 #ifdef CONFIG_ARM
 343 static int reserve_mmu(void)
 344 {
 345 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 346         /* reserve TLB table */
 347         gd->arch.tlb_size = PGTABLE_SIZE;
 348         gd->relocaddr -= gd->arch.tlb_size;
 349
 350         /* round down to next 64 kB limit */
 351         gd->relocaddr &= ~(0x10000 - 1);
 352
 353         gd->arch.tlb_addr = gd->relocaddr;
 354         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 355               gd->arch.tlb_addr + gd->arch.tlb_size);
 356
 357 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
 358         /*
 359          * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
 360          * with location within secure ram.
 361          */
 362         gd->arch.tlb_allocated = gd->arch.tlb_addr;
 363 #endif
 364 #endif
 365
 366         return 0;
 367 }
 368 #endif
 369
 370 static int reserve_video(void)
 371 {
 372 #ifdef CONFIG_DM_VIDEO
 373         ulong addr;
 374         int ret;
 375
 376         addr = gd->relocaddr;
 377         ret = video_reserve(&addr);
 378         if (ret)
 379                 return ret;
 380         gd->relocaddr = addr;
 381 #elif defined(CONFIG_LCD)
 382 #  ifdef CONFIG_FB_ADDR
 383         gd->fb_base = CONFIG_FB_ADDR;
 384 #  else
 385         /* reserve memory for LCD display (always full pages) */
 386         gd->relocaddr = lcd_setmem(gd->relocaddr);
 387         gd->fb_base = gd->relocaddr;
 388 #  endif /* CONFIG_FB_ADDR */
 389 #elif defined(CONFIG_VIDEO) && \
 390                 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 391                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 392                 !defined(CONFIG_M68K)
 393         /* reserve memory for video display (always full pages) */
 394         gd->relocaddr = video_setmem(gd->relocaddr);
 395         gd->fb_base = gd->relocaddr;
 396 #endif
 397
 398         return 0;
 399 }
 400
 401 static int reserve_trace(void)
 402 {
 403 #ifdef CONFIG_TRACE
 404         gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
 405         gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
 406         debug("Reserving %dk for trace data at: %08lx\n",
 407               CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
 408 #endif
 409
 410         return 0;
 411 }
 412
 413 static int reserve_uboot(void)
 414 {
 415         /*
 416          * reserve memory for U-Boot code, data & bss
 417          * round down to next 4 kB limit
 418          */
 419         gd->relocaddr -= gd->mon_len;
 420         gd->relocaddr &= ~(4096 - 1);
 421 #ifdef CONFIG_E500
 422         /* round down to next 64 kB limit so that IVPR stays aligned */
 423         gd->relocaddr &= ~(65536 - 1);
 424 #endif
 425
 426         debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
 427               gd->relocaddr);
 428
 429         gd->start_addr_sp = gd->relocaddr;
 430
 431         return 0;
 432 }
 433
 434 /* reserve memory for malloc() area */
 435 static int reserve_malloc(void)
 436 {
 437         gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
 438         debug("Reserving %dk for malloc() at: %08lx\n",
 439                         TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
 440         return 0;
 441 }
 442
 443 /* (permanently) allocate a Board Info struct */
 444 static int reserve_board(void)
 445 {
 446         if (!gd->bd) {
 447                 gd->start_addr_sp -= sizeof(bd_t);
 448                 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 449                 memset(gd->bd, '\0', sizeof(bd_t));
 450                 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 451                       sizeof(bd_t), gd->start_addr_sp);
 452         }
 453         return 0;
 454 }
 455
 456 static int setup_machine(void)
 457 {
 458 #ifdef CONFIG_MACH_TYPE
 459         gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
 460 #endif
 461         return 0;
 462 }
 463
 464 static int reserve_global_data(void)
 465 {
 466         gd->start_addr_sp -= sizeof(gd_t);
 467         gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
 468         debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 469                         sizeof(gd_t), gd->start_addr_sp);
 470         return 0;
 471 }
 472
 473 static int reserve_fdt(void)
 474 {
 475 #ifndef CONFIG_OF_EMBED
 476         /*
 477          * If the device tree is sitting immediately above our image then we
 478          * must relocate it. If it is embedded in the data section, then it
 479          * will be relocated with other data.
 480          */
 481         if (gd->fdt_blob) {
 482                 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
 483
 484                 gd->start_addr_sp -= gd->fdt_size;
 485                 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
 486                 debug("Reserving %lu Bytes for FDT at: %08lx\n",
 487                       gd->fdt_size, gd->start_addr_sp);
 488         }
 489 #endif
 490
 491         return 0;
 492 }
 493
 494 static int reserve_bootstage(void)
 495 {
 496 #ifdef CONFIG_BOOTSTAGE
 497         int size = bootstage_get_size();
 498
 499         gd->start_addr_sp -= size;
 500         gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
 501         debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
 502               gd->start_addr_sp);
 503 #endif
 504
 505         return 0;
 506 }
 507
 508 int arch_reserve_stacks(void)
 509 {
 510         return 0;
 511 }
 512
 513 static int reserve_stacks(void)
 514 {
 515         /* make stack pointer 16-byte aligned */
 516         gd->start_addr_sp -= 16;
 517         gd->start_addr_sp &= ~0xf;
 518
 519         /*
 520          * let the architecture-specific code tailor gd->start_addr_sp and
 521          * gd->irq_sp
 522          */
 523         return arch_reserve_stacks();
 524 }
 525
 526 static int display_new_sp(void)
 527 {
 528         debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
 529
 530         return 0;
 531 }
 532
 533 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 534         defined(CONFIG_SH)
 535 static int setup_board_part1(void)
 536 {
 537         bd_t *bd = gd->bd;
 538
 539         /*
 540          * Save local variables to board info struct
 541          */
 542         bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 543         bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 544
 545 #ifdef CONFIG_SYS_SRAM_BASE
 546         bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 547         bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 548 #endif
 549
 550 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
 551                 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 552         bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 553 #endif
 554 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
 555         bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 556 #endif
 557 #if defined(CONFIG_MPC83xx)
 558         bd->bi_immrbar = CONFIG_SYS_IMMR;
 559 #endif
 560
 561         return 0;
 562 }
 563 #endif
 564
 565 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 566 static int setup_board_part2(void)
 567 {
 568         bd_t *bd = gd->bd;
 569
 570         bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 571         bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 572 #if defined(CONFIG_CPM2)
 573         bd->bi_cpmfreq = gd->arch.cpm_clk;
 574         bd->bi_brgfreq = gd->arch.brg_clk;
 575         bd->bi_sccfreq = gd->arch.scc_clk;
 576         bd->bi_vco = gd->arch.vco_out;
 577 #endif /* CONFIG_CPM2 */
 578 #if defined(CONFIG_MPC512X)
 579         bd->bi_ipsfreq = gd->arch.ips_clk;
 580 #endif /* CONFIG_MPC512X */
 581 #if defined(CONFIG_MPC5xxx)
 582         bd->bi_ipbfreq = gd->arch.ipb_clk;
 583         bd->bi_pcifreq = gd->pci_clk;
 584 #endif /* CONFIG_MPC5xxx */
 585 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
 586         bd->bi_pcifreq = gd->pci_clk;
 587 #endif
 588 #if defined(CONFIG_EXTRA_CLOCK)
 589         bd->bi_inpfreq = gd->arch.inp_clk;      /* input Freq in Hz */
 590         bd->bi_vcofreq = gd->arch.vco_clk;      /* vco Freq in Hz */
 591         bd->bi_flbfreq = gd->arch.flb_clk;      /* flexbus Freq in Hz */
 592 #endif
 593
 594         return 0;
 595 }
 596 #endif
 597
 598 #ifdef CONFIG_POST
 599 static int init_post(void)
 600 {
 601         post_bootmode_init();
 602         post_run(NULL, POST_ROM | post_bootmode_get(0));
 603
 604         return 0;
 605 }
 606 #endif
 607
 608 static int reloc_fdt(void)
 609 {
 610 #ifndef CONFIG_OF_EMBED
 611         if (gd->flags & GD_FLG_SKIP_RELOC)
 612                 return 0;
 613         if (gd->new_fdt) {
 614                 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 615                 gd->fdt_blob = gd->new_fdt;
 616         }
 617 #endif
 618
 619         return 0;
 620 }
 621
 622 static int reloc_bootstage(void)
 623 {
 624 #ifdef CONFIG_BOOTSTAGE
 625         if (gd->flags & GD_FLG_SKIP_RELOC)
 626                 return 0;
 627         if (gd->new_bootstage) {
 628                 int size = bootstage_get_size();
 629
 630                 debug("Copying bootstage from %p to %p, size %x\n",
 631                       gd->bootstage, gd->new_bootstage, size);
 632                 memcpy(gd->new_bootstage, gd->bootstage, size);
 633                 gd->bootstage = gd->new_bootstage;
 634         }
 635 #endif
 636
 637         return 0;
 638 }
 639
 640 static int setup_reloc(void)
 641 {
 642         if (gd->flags & GD_FLG_SKIP_RELOC) {
 643                 debug("Skipping relocation due to flag\n");
 644                 return 0;
 645         }
 646
 647 #ifdef CONFIG_SYS_TEXT_BASE
 648         gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 649 #ifdef CONFIG_M68K
 650         /*
 651          * On all ColdFire arch cpu, monitor code starts always
 652          * just after the default vector table location, so at 0x400
 653          */
 654         gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
 655 #endif
 656 #endif
 657         memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 658
 659         debug("Relocation Offset is: %08lx\n", gd->reloc_off);
 660         debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 661               gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 662               gd->start_addr_sp);
 663
 664         return 0;
 665 }
 666
 667 #ifdef CONFIG_OF_BOARD_FIXUP
 668 static int fix_fdt(void)
 669 {
 670         return board_fix_fdt((void *)gd->fdt_blob);
 671 }
 672 #endif
 673
 674 /* ARM calls relocate_code from its crt0.S */
 675 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 676                 !CONFIG_IS_ENABLED(X86_64)
 677
 678 static int jump_to_copy(void)
 679 {
 680         if (gd->flags & GD_FLG_SKIP_RELOC)
 681                 return 0;
 682         /*
 683          * x86 is special, but in a nice way. It uses a trampoline which
 684          * enables the dcache if possible.
 685          *
 686          * For now, other archs use relocate_code(), which is implemented
 687          * similarly for all archs. When we do generic relocation, hopefully
 688          * we can make all archs enable the dcache prior to relocation.
 689          */
 690 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 691         /*
 692          * SDRAM and console are now initialised. The final stack can now
 693          * be setup in SDRAM. Code execution will continue in Flash, but
 694          * with the stack in SDRAM and Global Data in temporary memory
 695          * (CPU cache)
 696          */
 697         arch_setup_gd(gd->new_gd);
 698         board_init_f_r_trampoline(gd->start_addr_sp);
 699 #else
 700         relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 701 #endif
 702
 703         return 0;
 704 }
 705 #endif
 706
 707 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
 708 static int initf_bootstage(void)
 709 {
 710 #if defined(CONFIG_SPL_BOOTSTAGE) && defined(CONFIG_BOOTSTAGE_STASH)
 711         bool from_spl = true;
 712 #else
 713         bool from_spl = false;
 714 #endif
 715         int ret;
 716
 717         ret = bootstage_init(!from_spl);
 718         if (ret)
 719                 return ret;
 720         if (from_spl) {
 721                 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
 722                                                CONFIG_BOOTSTAGE_STASH_SIZE);
 723
 724                 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
 725                 if (ret && ret != -ENOENT) {
 726                         debug("Failed to unstash bootstage: err=%d\n", ret);
 727                         return ret;
 728                 }
 729         }
 730
 731         bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
 732
 733         return 0;
 734 }
 735
 736 static int initf_console_record(void)
 737 {
 738 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
 739         return console_record_init();
 740 #else
 741         return 0;
 742 #endif
 743 }
 744
 745 static int initf_dm(void)
 746 {
 747 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
 748         int ret;
 749
 750         bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
 751         ret = dm_init_and_scan(true);
 752         bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
 753         if (ret)
 754                 return ret;
 755 #endif
 756 #ifdef CONFIG_TIMER_EARLY
 757         ret = dm_timer_init();
 758         if (ret)
 759                 return ret;
 760 #endif
 761
 762         return 0;
 763 }
 764
 765 /* Architecture-specific memory reservation */
 766 __weak int reserve_arch(void)
 767 {
 768         return 0;
 769 }
 770
 771 __weak int arch_cpu_init_dm(void)
 772 {
 773         return 0;
 774 }
 775
 776 static const init_fnc_t init_sequence_f[] = {
 777         setup_mon_len,
 778 #ifdef CONFIG_OF_CONTROL
 779         fdtdec_setup,
 780 #endif
 781 #ifdef CONFIG_TRACE
 782         trace_early_init,
 783 #endif
 784         initf_malloc,
 785         initf_bootstage,        /* uses its own timer, so does not need DM */
 786         initf_console_record,
 787 #if defined(CONFIG_HAVE_FSP)
 788         arch_fsp_init,
 789 #endif
 790         arch_cpu_init,          /* basic arch cpu dependent setup */
 791         mach_cpu_init,          /* SoC/machine dependent CPU setup */
 792         initf_dm,
 793         arch_cpu_init_dm,
 794 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 795         board_early_init_f,
 796 #endif
 797 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
 798         /* get CPU and bus clocks according to the environment variable */
 799         get_clocks,             /* get CPU and bus clocks (etc.) */
 800 #endif
 801 #if !defined(CONFIG_M68K)
 802         timer_init,             /* initialize timer */
 803 #endif
 804 #if defined(CONFIG_BOARD_POSTCLK_INIT)
 805         board_postclk_init,
 806 #endif
 807         env_init,               /* initialize environment */
 808         init_baud_rate,         /* initialze baudrate settings */
 809         serial_init,            /* serial communications setup */
 810         console_init_f,         /* stage 1 init of console */
 811         display_options,        /* say that we are here */
 812         display_text_info,      /* show debugging info if required */
 813 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
 814                 defined(CONFIG_X86)
 815         checkcpu,
 816 #endif
 817 #if defined(CONFIG_DISPLAY_CPUINFO)
 818         print_cpuinfo,          /* display cpu info (and speed) */
 819 #endif
 820 #if defined(CONFIG_DISPLAY_BOARDINFO)
 821         show_board_info,
 822 #endif
 823         INIT_FUNC_WATCHDOG_INIT
 824 #if defined(CONFIG_MISC_INIT_F)
 825         misc_init_f,
 826 #endif
 827         INIT_FUNC_WATCHDOG_RESET
 828 #if defined(CONFIG_SYS_I2C)
 829         init_func_i2c,
 830 #endif
 831 #if defined(CONFIG_HARD_SPI)
 832         init_func_spi,
 833 #endif
 834         announce_dram_init,
 835         dram_init,              /* configure available RAM banks */
 836 #ifdef CONFIG_POST
 837         post_init_f,
 838 #endif
 839         INIT_FUNC_WATCHDOG_RESET
 840 #if defined(CONFIG_SYS_DRAM_TEST)
 841         testdram,
 842 #endif /* CONFIG_SYS_DRAM_TEST */
 843         INIT_FUNC_WATCHDOG_RESET
 844
 845 #ifdef CONFIG_POST
 846         init_post,
 847 #endif
 848         INIT_FUNC_WATCHDOG_RESET
 849         /*
 850          * Now that we have DRAM mapped and working, we can
 851          * relocate the code and continue running from DRAM.
 852          *
 853          * Reserve memory at end of RAM for (top down in that order):
 854          *  - area that won't get touched by U-Boot and Linux (optional)
 855          *  - kernel log buffer
 856          *  - protected RAM
 857          *  - LCD framebuffer
 858          *  - monitor code
 859          *  - board info struct
 860          */
 861         setup_dest_addr,
 862 #if defined(CONFIG_LOGBUFFER)
 863         reserve_logbuffer,
 864 #endif
 865 #ifdef CONFIG_PRAM
 866         reserve_pram,
 867 #endif
 868         reserve_round_4k,
 869 #ifdef CONFIG_ARM
 870         reserve_mmu,
 871 #endif
 872         reserve_video,
 873         reserve_trace,
 874         reserve_uboot,
 875         reserve_malloc,
 876         reserve_board,
 877         setup_machine,
 878         reserve_global_data,
 879         reserve_fdt,
 880         reserve_bootstage,
 881         reserve_arch,
 882         reserve_stacks,
 883         dram_init_banksize,
 884         show_dram_config,
 885 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 886         defined(CONFIG_SH)
 887         setup_board_part1,
 888 #endif
 889 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 890         INIT_FUNC_WATCHDOG_RESET
 891         setup_board_part2,
 892 #endif
 893         display_new_sp,
 894 #ifdef CONFIG_SYS_EXTBDINFO
 895         setup_board_extra,
 896 #endif
 897 #ifdef CONFIG_OF_BOARD_FIXUP
 898         fix_fdt,
 899 #endif
 900         INIT_FUNC_WATCHDOG_RESET
 901         reloc_fdt,
 902         reloc_bootstage,
 903         setup_reloc,
 904 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 905         copy_uboot_to_ram,
 906         do_elf_reloc_fixups,
 907         clear_bss,
 908 #endif
 909 #if defined(CONFIG_XTENSA)
 910         clear_bss,
 911 #endif
 912 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 913                 !CONFIG_IS_ENABLED(X86_64)
 914         jump_to_copy,
 915 #endif
 916         NULL,
 917 };
 918
 919 void board_init_f(ulong boot_flags)
 920 {
 921 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
 922         /*
 923          * For some architectures, global data is initialized and used before
 924          * calling this function. The data should be preserved. For others,
 925          * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
 926          * here to host global data until relocation.
 927          */
 928         gd_t data;
 929
 930         gd = &data;
 931
 932         /*
 933          * Clear global data before it is accessed at debug print
 934          * in initcall_run_list. Otherwise the debug print probably
 935          * get the wrong value of gd->have_console.
 936          */
 937         zero_global_data();
 938 #endif
 939
 940         gd->flags = boot_flags;
 941         gd->have_console = 0;
 942
 943         if (initcall_run_list(init_sequence_f))
 944                 hang();
 945
 946 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 947                 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
 948         /* NOTREACHED - jump_to_copy() does not return */
 949         hang();
 950 #endif
 951 }
 952
 953 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 954 /*
 955  * For now this code is only used on x86.
 956  *
 957  * init_sequence_f_r is the list of init functions which are run when
 958  * U-Boot is executing from Flash with a semi-limited 'C' environment.
 959  * The following limitations must be considered when implementing an
 960  * '_f_r' function:
 961  *  - 'static' variables are read-only
 962  *  - Global Data (gd->xxx) is read/write
 963  *
 964  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
 965  * supported).  It _should_, if possible, copy global data to RAM and
 966  * initialise the CPU caches (to speed up the relocation process)
 967  *
 968  * NOTE: At present only x86 uses this route, but it is intended that
 969  * all archs will move to this when generic relocation is implemented.
 970  */
 971 static const init_fnc_t init_sequence_f_r[] = {
 972 #if !CONFIG_IS_ENABLED(X86_64)
 973         init_cache_f_r,
 974 #endif
 975
 976         NULL,
 977 };
 978
 979 void board_init_f_r(void)
 980 {
 981         if (initcall_run_list(init_sequence_f_r))
 982                 hang();
 983
 984         /*
 985          * The pre-relocation drivers may be using memory that has now gone
 986          * away. Mark serial as unavailable - this will fall back to the debug
 987          * UART if available.
 988          */
 989         gd->flags &= ~GD_FLG_SERIAL_READY;
 990
 991         /*
 992          * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
 993          * Transfer execution from Flash to RAM by calculating the address
 994          * of the in-RAM copy of board_init_r() and calling it
 995          */
 996         (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
 997
 998         /* NOTREACHED - board_init_r() does not return */
 999         hang();
1000 }
1001 #endif /* CONFIG_X86 */