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1 /*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13 #include <common.h>
14 #include <linux/compiler.h>
15 #include <version.h>
16 #include <environment.h>
17 #include <dm.h>
18 #include <fdtdec.h>
19 #include <fs.h>
20 #if defined(CONFIG_CMD_IDE)
21 #include <ide.h>
22 #endif
23 #include <i2c.h>
24 #include <initcall.h>
25 #include <logbuff.h>
26
27 /* TODO: Can we move these into arch/ headers? */
28 #ifdef CONFIG_8xx
29 #include <mpc8xx.h>
30 #endif
31 #ifdef CONFIG_5xx
32 #include <mpc5xx.h>
33 #endif
34 #ifdef CONFIG_MPC5xxx
35 #include <mpc5xxx.h>
36 #endif
37 #if (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
38 #include <asm/mp.h>
39 #endif
40
41 #include <os.h>
42 #include <post.h>
43 #include <spi.h>
44 #include <status_led.h>
45 #include <trace.h>
46 #include <watchdog.h>
47 #include <asm/errno.h>
48 #include <asm/io.h>
49 #include <asm/sections.h>
50 #ifdef CONFIG_X86
51 #include <asm/init_helpers.h>
52 #include <asm/relocate.h>
53 #endif
54 #ifdef CONFIG_SANDBOX
55 #include <asm/state.h>
56 #endif
57 #include <dm/root.h>
58 #include <linux/compiler.h>
59
60 /*
61 * Pointer to initial global data area
62 *
63 * Here we initialize it if needed.
64 */
65 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
66 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
67 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
68 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
69 #else
70 DECLARE_GLOBAL_DATA_PTR;
71 #endif
72
73 /*
74 * sjg: IMO this code should be
75 * refactored to a single function, something like:
76 *
77 * void led_set_state(enum led_colour_t colour, int on);
78 */
79 /************************************************************************
80 * Coloured LED functionality
81 ************************************************************************
82 * May be supplied by boards if desired
83 */
84 __weak void coloured_LED_init(void) {}
85 __weak void red_led_on(void) {}
86 __weak void red_led_off(void) {}
87 __weak void green_led_on(void) {}
88 __weak void green_led_off(void) {}
89 __weak void yellow_led_on(void) {}
90 __weak void yellow_led_off(void) {}
91 __weak void blue_led_on(void) {}
92 __weak void blue_led_off(void) {}
93
94 /*
95 * Why is gd allocated a register? Prior to reloc it might be better to
96 * just pass it around to each function in this file?
97 *
98 * After reloc one could argue that it is hardly used and doesn't need
99 * to be in a register. Or if it is it should perhaps hold pointers to all
100 * global data for all modules, so that post-reloc we can avoid the massive
101 * literal pool we get on ARM. Or perhaps just encourage each module to use
102 * a structure...
103 */
104
105 /*
106 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
107 */
108
109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
110 static int init_func_watchdog_init(void)
111 {
112 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
114 defined(CONFIG_SH))
115 hw_watchdog_init();
116 # endif
117 puts(" Watchdog enabled\n");
118 WATCHDOG_RESET();
119
120 return 0;
121 }
122
123 int init_func_watchdog_reset(void)
124 {
125 WATCHDOG_RESET();
126
127 return 0;
128 }
129 #endif /* CONFIG_WATCHDOG */
130
131 void __board_add_ram_info(int use_default)
132 {
133 /* please define platform specific board_add_ram_info() */
134 }
135
136 void board_add_ram_info(int)
137 __attribute__ ((weak, alias("__board_add_ram_info")));
138
139 static int init_baud_rate(void)
140 {
141 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
142 return 0;
143 }
144
145 static int display_text_info(void)
146 {
147 #ifndef CONFIG_SANDBOX
148 ulong bss_start, bss_end;
149
150 bss_start = (ulong)&__bss_start;
151 bss_end = (ulong)&__bss_end;
152
153 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
154 #ifdef CONFIG_SYS_TEXT_BASE
155 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
156 #else
157 CONFIG_SYS_MONITOR_BASE, bss_start, bss_end);
158 #endif
159 #endif
160
161 #ifdef CONFIG_MODEM_SUPPORT
162 debug("Modem Support enabled\n");
163 #endif
164 #ifdef CONFIG_USE_IRQ
165 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
166 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
167 #endif
168
169 return 0;
170 }
171
172 static int announce_dram_init(void)
173 {
174 puts("DRAM: ");
175 return 0;
176 }
177
178 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
179 static int init_func_ram(void)
180 {
181 #ifdef CONFIG_BOARD_TYPES
182 int board_type = gd->board_type;
183 #else
184 int board_type = 0; /* use dummy arg */
185 #endif
186
187 gd->ram_size = initdram(board_type);
188
189 if (gd->ram_size > 0)
190 return 0;
191
192 puts("*** failed ***\n");
193 return 1;
194 }
195 #endif
196
197 static int show_dram_config(void)
198 {
199 unsigned long long size;
200
201 #ifdef CONFIG_NR_DRAM_BANKS
202 int i;
203
204 debug("\nRAM Configuration:\n");
205 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
206 size += gd->bd->bi_dram[i].size;
207 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
208 #ifdef DEBUG
209 print_size(gd->bd->bi_dram[i].size, "\n");
210 #endif
211 }
212 debug("\nDRAM: ");
213 #else
214 size = gd->ram_size;
215 #endif
216
217 print_size(size, "");
218 board_add_ram_info(0);
219 putc('\n');
220
221 return 0;
222 }
223
224 void __dram_init_banksize(void)
225 {
226 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
227 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
228 gd->bd->bi_dram[0].size = get_effective_memsize();
229 #endif
230 }
231
232 void dram_init_banksize(void)
233 __attribute__((weak, alias("__dram_init_banksize")));
234
235 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
236 static int init_func_i2c(void)
237 {
238 puts("I2C: ");
239 #ifdef CONFIG_SYS_I2C
240 i2c_init_all();
241 #else
242 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
243 #endif
244 puts("ready\n");
245 return 0;
246 }
247 #endif
248
249 #if defined(CONFIG_HARD_SPI)
250 static int init_func_spi(void)
251 {
252 puts("SPI: ");
253 spi_init();
254 puts("ready\n");
255 return 0;
256 }
257 #endif
258
259 __maybe_unused
260 static int zero_global_data(void)
261 {
262 memset((void *)gd, '\0', sizeof(gd_t));
263
264 return 0;
265 }
266
267 static int setup_mon_len(void)
268 {
269 #ifdef __ARM__
270 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
271 #elif defined(CONFIG_SANDBOX)
272 gd->mon_len = (ulong)&_end - (ulong)_init;
273 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
274 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
275 #else
276 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
277 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
278 #endif
279 return 0;
280 }
281
282 __weak int arch_cpu_init(void)
283 {
284 return 0;
285 }
286
287 #ifdef CONFIG_OF_HOSTFILE
288
289 static int read_fdt_from_file(void)
290 {
291 struct sandbox_state *state = state_get_current();
292 const char *fname = state->fdt_fname;
293 void *blob;
294 ssize_t size;
295 int err;
296 int fd;
297
298 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
299 if (!state->fdt_fname) {
300 err = fdt_create_empty_tree(blob, 256);
301 if (!err)
302 goto done;
303 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
304 return -EINVAL;
305 }
306
307 size = os_get_filesize(fname);
308 if (size < 0) {
309 printf("Failed to file FDT file '%s'\n", fname);
310 return -ENOENT;
311 }
312 fd = os_open(fname, OS_O_RDONLY);
313 if (fd < 0) {
314 printf("Failed to open FDT file '%s'\n", fname);
315 return -EACCES;
316 }
317 if (os_read(fd, blob, size) != size) {
318 os_close(fd);
319 return -EIO;
320 }
321 os_close(fd);
322
323 done:
324 gd->fdt_blob = blob;
325
326 return 0;
327 }
328 #endif
329
330 #ifdef CONFIG_SANDBOX
331 static int setup_ram_buf(void)
332 {
333 struct sandbox_state *state = state_get_current();
334
335 gd->arch.ram_buf = state->ram_buf;
336 gd->ram_size = state->ram_size;
337
338 return 0;
339 }
340 #endif
341
342 static int setup_fdt(void)
343 {
344 #ifdef CONFIG_OF_EMBED
345 /* Get a pointer to the FDT */
346 gd->fdt_blob = __dtb_dt_begin;
347 #elif defined CONFIG_OF_SEPARATE
348 /* FDT is at end of image */
349 gd->fdt_blob = (ulong *)&_end;
350 #elif defined(CONFIG_OF_HOSTFILE)
351 if (read_fdt_from_file()) {
352 puts("Failed to read control FDT\n");
353 return -1;
354 }
355 #endif
356 /* Allow the early environment to override the fdt address */
357 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
358 (uintptr_t)gd->fdt_blob);
359 return 0;
360 }
361
362 /* Get the top of usable RAM */
363 __weak ulong board_get_usable_ram_top(ulong total_size)
364 {
365 return gd->ram_top;
366 }
367
368 static int setup_dest_addr(void)
369 {
370 debug("Monitor len: %08lX\n", gd->mon_len);
371 /*
372 * Ram is setup, size stored in gd !!
373 */
374 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
375 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
376 /*
377 * Subtract specified amount of memory to hide so that it won't
378 * get "touched" at all by U-Boot. By fixing up gd->ram_size
379 * the Linux kernel should now get passed the now "corrected"
380 * memory size and won't touch it either. This should work
381 * for arch/ppc and arch/powerpc. Only Linux board ports in
382 * arch/powerpc with bootwrapper support, that recalculate the
383 * memory size from the SDRAM controller setup will have to
384 * get fixed.
385 */
386 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
387 #endif
388 #ifdef CONFIG_SYS_SDRAM_BASE
389 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
390 #endif
391 gd->ram_top += get_effective_memsize();
392 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
393 gd->relocaddr = gd->ram_top;
394 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
395 #if (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
396 /*
397 * We need to make sure the location we intend to put secondary core
398 * boot code is reserved and not used by any part of u-boot
399 */
400 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
401 gd->relocaddr = determine_mp_bootpg(NULL);
402 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
403 }
404 #endif
405 return 0;
406 }
407
408 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
409 static int reserve_logbuffer(void)
410 {
411 /* reserve kernel log buffer */
412 gd->relocaddr -= LOGBUFF_RESERVE;
413 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
414 gd->relocaddr);
415 return 0;
416 }
417 #endif
418
419 #ifdef CONFIG_PRAM
420 /* reserve protected RAM */
421 static int reserve_pram(void)
422 {
423 ulong reg;
424
425 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
426 gd->relocaddr -= (reg << 10); /* size is in kB */
427 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
428 gd->relocaddr);
429 return 0;
430 }
431 #endif /* CONFIG_PRAM */
432
433 /* Round memory pointer down to next 4 kB limit */
434 static int reserve_round_4k(void)
435 {
436 gd->relocaddr &= ~(4096 - 1);
437 return 0;
438 }
439
440 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
441 defined(CONFIG_ARM)
442 static int reserve_mmu(void)
443 {
444 /* reserve TLB table */
445 gd->arch.tlb_size = PGTABLE_SIZE;
446 gd->relocaddr -= gd->arch.tlb_size;
447
448 /* round down to next 64 kB limit */
449 gd->relocaddr &= ~(0x10000 - 1);
450
451 gd->arch.tlb_addr = gd->relocaddr;
452 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
453 gd->arch.tlb_addr + gd->arch.tlb_size);
454 return 0;
455 }
456 #endif
457
458 #ifdef CONFIG_LCD
459 static int reserve_lcd(void)
460 {
461 #ifdef CONFIG_FB_ADDR
462 gd->fb_base = CONFIG_FB_ADDR;
463 #else
464 /* reserve memory for LCD display (always full pages) */
465 gd->relocaddr = lcd_setmem(gd->relocaddr);
466 gd->fb_base = gd->relocaddr;
467 #endif /* CONFIG_FB_ADDR */
468 return 0;
469 }
470 #endif /* CONFIG_LCD */
471
472 static int reserve_trace(void)
473 {
474 #ifdef CONFIG_TRACE
475 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
476 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
477 debug("Reserving %dk for trace data at: %08lx\n",
478 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
479 #endif
480
481 return 0;
482 }
483
484 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
485 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
486 !defined(CONFIG_BLACKFIN)
487 static int reserve_video(void)
488 {
489 /* reserve memory for video display (always full pages) */
490 gd->relocaddr = video_setmem(gd->relocaddr);
491 gd->fb_base = gd->relocaddr;
492
493 return 0;
494 }
495 #endif
496
497 static int reserve_uboot(void)
498 {
499 /*
500 * reserve memory for U-Boot code, data & bss
501 * round down to next 4 kB limit
502 */
503 gd->relocaddr -= gd->mon_len;
504 gd->relocaddr &= ~(4096 - 1);
505 #ifdef CONFIG_E500
506 /* round down to next 64 kB limit so that IVPR stays aligned */
507 gd->relocaddr &= ~(65536 - 1);
508 #endif
509
510 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
511 gd->relocaddr);
512
513 gd->start_addr_sp = gd->relocaddr;
514
515 return 0;
516 }
517
518 #ifndef CONFIG_SPL_BUILD
519 /* reserve memory for malloc() area */
520 static int reserve_malloc(void)
521 {
522 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
523 debug("Reserving %dk for malloc() at: %08lx\n",
524 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
525 return 0;
526 }
527
528 /* (permanently) allocate a Board Info struct */
529 static int reserve_board(void)
530 {
531 if (!gd->bd) {
532 gd->start_addr_sp -= sizeof(bd_t);
533 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
534 memset(gd->bd, '\0', sizeof(bd_t));
535 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
536 sizeof(bd_t), gd->start_addr_sp);
537 }
538 return 0;
539 }
540 #endif
541
542 static int setup_machine(void)
543 {
544 #ifdef CONFIG_MACH_TYPE
545 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
546 #endif
547 return 0;
548 }
549
550 static int reserve_global_data(void)
551 {
552 gd->start_addr_sp -= sizeof(gd_t);
553 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
554 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
555 sizeof(gd_t), gd->start_addr_sp);
556 return 0;
557 }
558
559 static int reserve_fdt(void)
560 {
561 /*
562 * If the device tree is sitting immediate above our image then we
563 * must relocate it. If it is embedded in the data section, then it
564 * will be relocated with other data.
565 */
566 if (gd->fdt_blob) {
567 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
568
569 gd->start_addr_sp -= gd->fdt_size;
570 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
571 debug("Reserving %lu Bytes for FDT at: %08lx\n",
572 gd->fdt_size, gd->start_addr_sp);
573 }
574
575 return 0;
576 }
577
578 static int reserve_stacks(void)
579 {
580 #ifdef CONFIG_SPL_BUILD
581 # ifdef CONFIG_ARM
582 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
583 gd->irq_sp = gd->start_addr_sp;
584 # endif
585 #else
586 # ifdef CONFIG_PPC
587 ulong *s;
588 # endif
589
590 /* setup stack pointer for exceptions */
591 gd->start_addr_sp -= 16;
592 gd->start_addr_sp &= ~0xf;
593 gd->irq_sp = gd->start_addr_sp;
594
595 /*
596 * Handle architecture-specific things here
597 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
598 * to handle this and put in arch/xxx/lib/stack.c
599 */
600 # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
601 # ifdef CONFIG_USE_IRQ
602 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
603 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
604 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
605
606 /* 8-byte alignment for ARM ABI compliance */
607 gd->start_addr_sp &= ~0x07;
608 # endif
609 /* leave 3 words for abort-stack, plus 1 for alignment */
610 gd->start_addr_sp -= 16;
611 # elif defined(CONFIG_PPC)
612 /* Clear initial stack frame */
613 s = (ulong *) gd->start_addr_sp;
614 *s = 0; /* Terminate back chain */
615 *++s = 0; /* NULL return address */
616 # endif /* Architecture specific code */
617
618 return 0;
619 #endif
620 }
621
622 static int display_new_sp(void)
623 {
624 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
625
626 return 0;
627 }
628
629 #ifdef CONFIG_PPC
630 static int setup_board_part1(void)
631 {
632 bd_t *bd = gd->bd;
633
634 /*
635 * Save local variables to board info struct
636 */
637
638 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
639 bd->bi_memsize = gd->ram_size; /* size in bytes */
640
641 #ifdef CONFIG_SYS_SRAM_BASE
642 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
643 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
644 #endif
645
646 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
647 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
648 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
649 #endif
650 #if defined(CONFIG_MPC5xxx)
651 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
652 #endif
653 #if defined(CONFIG_MPC83xx)
654 bd->bi_immrbar = CONFIG_SYS_IMMR;
655 #endif
656
657 return 0;
658 }
659
660 static int setup_board_part2(void)
661 {
662 bd_t *bd = gd->bd;
663
664 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
665 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
666 #if defined(CONFIG_CPM2)
667 bd->bi_cpmfreq = gd->arch.cpm_clk;
668 bd->bi_brgfreq = gd->arch.brg_clk;
669 bd->bi_sccfreq = gd->arch.scc_clk;
670 bd->bi_vco = gd->arch.vco_out;
671 #endif /* CONFIG_CPM2 */
672 #if defined(CONFIG_MPC512X)
673 bd->bi_ipsfreq = gd->arch.ips_clk;
674 #endif /* CONFIG_MPC512X */
675 #if defined(CONFIG_MPC5xxx)
676 bd->bi_ipbfreq = gd->arch.ipb_clk;
677 bd->bi_pcifreq = gd->pci_clk;
678 #endif /* CONFIG_MPC5xxx */
679
680 return 0;
681 }
682 #endif
683
684 #ifdef CONFIG_SYS_EXTBDINFO
685 static int setup_board_extra(void)
686 {
687 bd_t *bd = gd->bd;
688
689 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
690 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
691 sizeof(bd->bi_r_version));
692
693 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
694 bd->bi_plb_busfreq = gd->bus_clk;
695 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
696 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
697 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
698 bd->bi_pci_busfreq = get_PCI_freq();
699 bd->bi_opbfreq = get_OPB_freq();
700 #elif defined(CONFIG_XILINX_405)
701 bd->bi_pci_busfreq = get_PCI_freq();
702 #endif
703
704 return 0;
705 }
706 #endif
707
708 #ifdef CONFIG_POST
709 static int init_post(void)
710 {
711 post_bootmode_init();
712 post_run(NULL, POST_ROM | post_bootmode_get(0));
713
714 return 0;
715 }
716 #endif
717
718 static int setup_dram_config(void)
719 {
720 /* Ram is board specific, so move it to board code ... */
721 dram_init_banksize();
722
723 return 0;
724 }
725
726 static int reloc_fdt(void)
727 {
728 if (gd->new_fdt) {
729 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
730 gd->fdt_blob = gd->new_fdt;
731 }
732
733 return 0;
734 }
735
736 static int setup_reloc(void)
737 {
738 #ifdef CONFIG_SYS_TEXT_BASE
739 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
740 #endif
741 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
742
743 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
744 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
745 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
746 gd->start_addr_sp);
747
748 return 0;
749 }
750
751 /* ARM calls relocate_code from its crt0.S */
752 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
753
754 static int jump_to_copy(void)
755 {
756 /*
757 * x86 is special, but in a nice way. It uses a trampoline which
758 * enables the dcache if possible.
759 *
760 * For now, other archs use relocate_code(), which is implemented
761 * similarly for all archs. When we do generic relocation, hopefully
762 * we can make all archs enable the dcache prior to relocation.
763 */
764 #ifdef CONFIG_X86
765 /*
766 * SDRAM and console are now initialised. The final stack can now
767 * be setup in SDRAM. Code execution will continue in Flash, but
768 * with the stack in SDRAM and Global Data in temporary memory
769 * (CPU cache)
770 */
771 board_init_f_r_trampoline(gd->start_addr_sp);
772 #else
773 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
774 #endif
775
776 return 0;
777 }
778 #endif
779
780 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
781 static int mark_bootstage(void)
782 {
783 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
784
785 return 0;
786 }
787
788 static int initf_malloc(void)
789 {
790 #ifdef CONFIG_SYS_MALLOC_F_LEN
791 assert(gd->malloc_base); /* Set up by crt0.S */
792 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
793 gd->malloc_ptr = 0;
794 #endif
795
796 return 0;
797 }
798
799 static int initf_dm(void)
800 {
801 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
802 int ret;
803
804 ret = dm_init_and_scan(true);
805 if (ret)
806 return ret;
807 #endif
808
809 return 0;
810 }
811
812 static init_fnc_t init_sequence_f[] = {
813 #ifdef CONFIG_SANDBOX
814 setup_ram_buf,
815 #endif
816 setup_mon_len,
817 setup_fdt,
818 trace_early_init,
819 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
820 /* TODO: can this go into arch_cpu_init()? */
821 probecpu,
822 #endif
823 arch_cpu_init, /* basic arch cpu dependent setup */
824 #ifdef CONFIG_X86
825 cpu_init_f, /* TODO(sjg@chromium.org): remove */
826 # ifdef CONFIG_OF_CONTROL
827 find_fdt, /* TODO(sjg@chromium.org): remove */
828 # endif
829 #endif
830 mark_bootstage,
831 #ifdef CONFIG_OF_CONTROL
832 fdtdec_check_fdt,
833 #endif
834 #if defined(CONFIG_BOARD_EARLY_INIT_F)
835 board_early_init_f,
836 #endif
837 /* TODO: can any of this go into arch_cpu_init()? */
838 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
839 get_clocks, /* get CPU and bus clocks (etc.) */
840 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
841 && !defined(CONFIG_TQM885D)
842 adjust_sdram_tbs_8xx,
843 #endif
844 /* TODO: can we rename this to timer_init()? */
845 init_timebase,
846 #endif
847 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
848 timer_init, /* initialize timer */
849 #endif
850 #ifdef CONFIG_SYS_ALLOC_DPRAM
851 #if !defined(CONFIG_CPM2)
852 dpram_init,
853 #endif
854 #endif
855 #if defined(CONFIG_BOARD_POSTCLK_INIT)
856 board_postclk_init,
857 #endif
858 #ifdef CONFIG_FSL_ESDHC
859 get_clocks,
860 #endif
861 env_init, /* initialize environment */
862 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
863 /* get CPU and bus clocks according to the environment variable */
864 get_clocks_866,
865 /* adjust sdram refresh rate according to the new clock */
866 sdram_adjust_866,
867 init_timebase,
868 #endif
869 initf_malloc,
870 initf_dm,
871 init_baud_rate, /* initialze baudrate settings */
872 serial_init, /* serial communications setup */
873 console_init_f, /* stage 1 init of console */
874 #ifdef CONFIG_SANDBOX
875 sandbox_early_getopt_check,
876 #endif
877 #ifdef CONFIG_OF_CONTROL
878 fdtdec_prepare_fdt,
879 #endif
880 display_options, /* say that we are here */
881 display_text_info, /* show debugging info if required */
882 #if defined(CONFIG_MPC8260)
883 prt_8260_rsr,
884 prt_8260_clks,
885 #endif /* CONFIG_MPC8260 */
886 #if defined(CONFIG_MPC83xx)
887 prt_83xx_rsr,
888 #endif
889 #ifdef CONFIG_PPC
890 checkcpu,
891 #endif
892 print_cpuinfo, /* display cpu info (and speed) */
893 #if defined(CONFIG_MPC5xxx)
894 prt_mpc5xxx_clks,
895 #endif /* CONFIG_MPC5xxx */
896 #if defined(CONFIG_DISPLAY_BOARDINFO)
897 checkboard, /* display board info */
898 #endif
899 INIT_FUNC_WATCHDOG_INIT
900 #if defined(CONFIG_MISC_INIT_F)
901 misc_init_f,
902 #endif
903 INIT_FUNC_WATCHDOG_RESET
904 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
905 init_func_i2c,
906 #endif
907 #if defined(CONFIG_HARD_SPI)
908 init_func_spi,
909 #endif
910 #ifdef CONFIG_X86
911 dram_init_f, /* configure available RAM banks */
912 calculate_relocation_address,
913 #endif
914 announce_dram_init,
915 /* TODO: unify all these dram functions? */
916 #ifdef CONFIG_ARM
917 dram_init, /* configure available RAM banks */
918 #endif
919 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
920 init_func_ram,
921 #endif
922 #ifdef CONFIG_POST
923 post_init_f,
924 #endif
925 INIT_FUNC_WATCHDOG_RESET
926 #if defined(CONFIG_SYS_DRAM_TEST)
927 testdram,
928 #endif /* CONFIG_SYS_DRAM_TEST */
929 INIT_FUNC_WATCHDOG_RESET
930
931 #ifdef CONFIG_POST
932 init_post,
933 #endif
934 INIT_FUNC_WATCHDOG_RESET
935 /*
936 * Now that we have DRAM mapped and working, we can
937 * relocate the code and continue running from DRAM.
938 *
939 * Reserve memory at end of RAM for (top down in that order):
940 * - area that won't get touched by U-Boot and Linux (optional)
941 * - kernel log buffer
942 * - protected RAM
943 * - LCD framebuffer
944 * - monitor code
945 * - board info struct
946 */
947 setup_dest_addr,
948 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
949 /* Blackfin u-boot monitor should be on top of the ram */
950 reserve_uboot,
951 #endif
952 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
953 reserve_logbuffer,
954 #endif
955 #ifdef CONFIG_PRAM
956 reserve_pram,
957 #endif
958 reserve_round_4k,
959 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
960 defined(CONFIG_ARM)
961 reserve_mmu,
962 #endif
963 #ifdef CONFIG_LCD
964 reserve_lcd,
965 #endif
966 reserve_trace,
967 /* TODO: Why the dependency on CONFIG_8xx? */
968 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
969 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
970 !defined(CONFIG_BLACKFIN)
971 reserve_video,
972 #endif
973 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
974 reserve_uboot,
975 #endif
976 #ifndef CONFIG_SPL_BUILD
977 reserve_malloc,
978 reserve_board,
979 #endif
980 setup_machine,
981 reserve_global_data,
982 reserve_fdt,
983 reserve_stacks,
984 setup_dram_config,
985 show_dram_config,
986 #ifdef CONFIG_PPC
987 setup_board_part1,
988 INIT_FUNC_WATCHDOG_RESET
989 setup_board_part2,
990 #endif
991 display_new_sp,
992 #ifdef CONFIG_SYS_EXTBDINFO
993 setup_board_extra,
994 #endif
995 INIT_FUNC_WATCHDOG_RESET
996 reloc_fdt,
997 setup_reloc,
998 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
999 jump_to_copy,
1000 #endif
1001 NULL,
1002 };
1003
1004 void board_init_f(ulong boot_flags)
1005 {
1006 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1007 /*
1008 * For some archtectures, global data is initialized and used before
1009 * calling this function. The data should be preserved. For others,
1010 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1011 * here to host global data until relocation.
1012 */
1013 gd_t data;
1014
1015 gd = &data;
1016
1017 /*
1018 * Clear global data before it is accessed at debug print
1019 * in initcall_run_list. Otherwise the debug print probably
1020 * get the wrong vaule of gd->have_console.
1021 */
1022 zero_global_data();
1023 #endif
1024
1025 gd->flags = boot_flags;
1026 gd->have_console = 0;
1027
1028 if (initcall_run_list(init_sequence_f))
1029 hang();
1030
1031 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1032 /* NOTREACHED - jump_to_copy() does not return */
1033 hang();
1034 #endif
1035 }
1036
1037 #ifdef CONFIG_X86
1038 /*
1039 * For now this code is only used on x86.
1040 *
1041 * init_sequence_f_r is the list of init functions which are run when
1042 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1043 * The following limitations must be considered when implementing an
1044 * '_f_r' function:
1045 * - 'static' variables are read-only
1046 * - Global Data (gd->xxx) is read/write
1047 *
1048 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1049 * supported). It _should_, if possible, copy global data to RAM and
1050 * initialise the CPU caches (to speed up the relocation process)
1051 *
1052 * NOTE: At present only x86 uses this route, but it is intended that
1053 * all archs will move to this when generic relocation is implemented.
1054 */
1055 static init_fnc_t init_sequence_f_r[] = {
1056 init_cache_f_r,
1057 copy_uboot_to_ram,
1058 clear_bss,
1059 do_elf_reloc_fixups,
1060
1061 NULL,
1062 };
1063
1064 void board_init_f_r(void)
1065 {
1066 if (initcall_run_list(init_sequence_f_r))
1067 hang();
1068
1069 /*
1070 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1071 * Transfer execution from Flash to RAM by calculating the address
1072 * of the in-RAM copy of board_init_r() and calling it
1073 */
1074 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1075
1076 /* NOTREACHED - board_init_r() does not return */
1077 hang();
1078 }
1079 #endif /* CONFIG_X86 */