common/board_f.c

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2002-2006
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Marius Groeger <mgroeger@sysgo.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #include <common.h>
  14 #include <linux/compiler.h>
  15 #include <version.h>
  16 #include <console.h>
  17 #include <environment.h>
  18 #include <dm.h>
  19 #include <fdtdec.h>
  20 #include <fs.h>
  21 #if defined(CONFIG_CMD_IDE)
  22 #include <ide.h>
  23 #endif
  24 #include <i2c.h>
  25 #include <initcall.h>
  26 #include <logbuff.h>
  27 #include <malloc.h>
  28 #include <mapmem.h>
  29
  30 /* TODO: Can we move these into arch/ headers? */
  31 #ifdef CONFIG_8xx
  32 #include <mpc8xx.h>
  33 #endif
  34 #ifdef CONFIG_5xx
  35 #include <mpc5xx.h>
  36 #endif
  37 #ifdef CONFIG_MPC5xxx
  38 #include <mpc5xxx.h>
  39 #endif
  40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  41 #include <asm/mp.h>
  42 #endif
  43
  44 #include <os.h>
  45 #include <post.h>
  46 #include <spi.h>
  47 #include <status_led.h>
  48 #include <timer.h>
  49 #include <trace.h>
  50 #include <video.h>
  51 #include <watchdog.h>
  52 #include <linux/errno.h>
  53 #include <asm/io.h>
  54 #include <asm/sections.h>
  55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  56 #include <asm/init_helpers.h>
  57 #endif
  58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
  59 #include <asm/relocate.h>
  60 #endif
  61 #ifdef CONFIG_SANDBOX
  62 #include <asm/state.h>
  63 #endif
  64 #include <dm/root.h>
  65 #include <linux/compiler.h>
  66
  67 /*
  68  * Pointer to initial global data area
  69  *
  70  * Here we initialize it if needed.
  71  */
  72 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  73 #undef  XTRN_DECLARE_GLOBAL_DATA_PTR
  74 #define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
  75 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  76 #else
  77 DECLARE_GLOBAL_DATA_PTR;
  78 #endif
  79
  80 /*
  81  * TODO(sjg@chromium.org): IMO this code should be
  82  * refactored to a single function, something like:
  83  *
  84  * void led_set_state(enum led_colour_t colour, int on);
  85  */
  86 /************************************************************************
  87  * Coloured LED functionality
  88  ************************************************************************
  89  * May be supplied by boards if desired
  90  */
  91 __weak void coloured_LED_init(void) {}
  92 __weak void red_led_on(void) {}
  93 __weak void red_led_off(void) {}
  94 __weak void green_led_on(void) {}
  95 __weak void green_led_off(void) {}
  96 __weak void yellow_led_on(void) {}
  97 __weak void yellow_led_off(void) {}
  98 __weak void blue_led_on(void) {}
  99 __weak void blue_led_off(void) {}
 100
 101 /*
 102  * Why is gd allocated a register? Prior to reloc it might be better to
 103  * just pass it around to each function in this file?
 104  *
 105  * After reloc one could argue that it is hardly used and doesn't need
 106  * to be in a register. Or if it is it should perhaps hold pointers to all
 107  * global data for all modules, so that post-reloc we can avoid the massive
 108  * literal pool we get on ARM. Or perhaps just encourage each module to use
 109  * a structure...
 110  */
 111
 112 /*
 113  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
 114  */
 115
 116 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
 117 static int init_func_watchdog_init(void)
 118 {
 119 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
 120         defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
 121         defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
 122         defined(CONFIG_DESIGNWARE_WATCHDOG) || \
 123         defined(CONFIG_IMX_WATCHDOG))
 124         hw_watchdog_init();
 125         puts("       Watchdog enabled\n");
 126 # endif
 127         WATCHDOG_RESET();
 128
 129         return 0;
 130 }
 131
 132 int init_func_watchdog_reset(void)
 133 {
 134         WATCHDOG_RESET();
 135
 136         return 0;
 137 }
 138 #endif /* CONFIG_WATCHDOG */
 139
 140 __weak void board_add_ram_info(int use_default)
 141 {
 142         /* please define platform specific board_add_ram_info() */
 143 }
 144
 145 static int init_baud_rate(void)
 146 {
 147         gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
 148         return 0;
 149 }
 150
 151 static int display_text_info(void)
 152 {
 153 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
 154         ulong bss_start, bss_end, text_base;
 155
 156         bss_start = (ulong)&__bss_start;
 157         bss_end = (ulong)&__bss_end;
 158
 159 #ifdef CONFIG_SYS_TEXT_BASE
 160         text_base = CONFIG_SYS_TEXT_BASE;
 161 #else
 162         text_base = CONFIG_SYS_MONITOR_BASE;
 163 #endif
 164
 165         debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 166                 text_base, bss_start, bss_end);
 167 #endif
 168
 169 #ifdef CONFIG_USE_IRQ
 170         debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
 171         debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
 172 #endif
 173
 174         return 0;
 175 }
 176
 177 static int announce_dram_init(void)
 178 {
 179         puts("DRAM:  ");
 180         return 0;
 181 }
 182
 183 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 184 static int init_func_ram(void)
 185 {
 186 #ifdef  CONFIG_BOARD_TYPES
 187         int board_type = gd->board_type;
 188 #else
 189         int board_type = 0;     /* use dummy arg */
 190 #endif
 191
 192         gd->ram_size = initdram(board_type);
 193
 194         if (gd->ram_size > 0)
 195                 return 0;
 196
 197         puts("*** failed ***\n");
 198         return 1;
 199 }
 200 #endif
 201
 202 static int show_dram_config(void)
 203 {
 204         unsigned long long size;
 205
 206 #ifdef CONFIG_NR_DRAM_BANKS
 207         int i;
 208
 209         debug("\nRAM Configuration:\n");
 210         for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 211                 size += gd->bd->bi_dram[i].size;
 212                 debug("Bank #%d: %llx ", i,
 213                       (unsigned long long)(gd->bd->bi_dram[i].start));
 214 #ifdef DEBUG
 215                 print_size(gd->bd->bi_dram[i].size, "\n");
 216 #endif
 217         }
 218         debug("\nDRAM:  ");
 219 #else
 220         size = gd->ram_size;
 221 #endif
 222
 223         print_size(size, "");
 224         board_add_ram_info(0);
 225         putc('\n');
 226
 227         return 0;
 228 }
 229
 230 __weak void dram_init_banksize(void)
 231 {
 232 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 233         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 234         gd->bd->bi_dram[0].size = get_effective_memsize();
 235 #endif
 236 }
 237
 238 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 239 static int init_func_i2c(void)
 240 {
 241         puts("I2C:   ");
 242 #ifdef CONFIG_SYS_I2C
 243         i2c_init_all();
 244 #else
 245         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 246 #endif
 247         puts("ready\n");
 248         return 0;
 249 }
 250 #endif
 251
 252 #if defined(CONFIG_HARD_SPI)
 253 static int init_func_spi(void)
 254 {
 255         puts("SPI:   ");
 256         spi_init();
 257         puts("ready\n");
 258         return 0;
 259 }
 260 #endif
 261
 262 __maybe_unused
 263 static int zero_global_data(void)
 264 {
 265         memset((void *)gd, '\0', sizeof(gd_t));
 266
 267         return 0;
 268 }
 269
 270 static int setup_mon_len(void)
 271 {
 272 #if defined(__ARM__) || defined(__MICROBLAZE__)
 273         gd->mon_len = (ulong)&__bss_end - (ulong)_start;
 274 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
 275         gd->mon_len = (ulong)&_end - (ulong)_init;
 276 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) || \
 277         defined(CONFIG_XTENSA)
 278         gd->mon_len = CONFIG_SYS_MONITOR_LEN;
 279 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
 280         gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 281 #elif defined(CONFIG_SYS_MONITOR_BASE)
 282         /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 283         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
 284 #endif
 285         return 0;
 286 }
 287
 288 __weak int arch_cpu_init(void)
 289 {
 290         return 0;
 291 }
 292
 293 __weak int mach_cpu_init(void)
 294 {
 295         return 0;
 296 }
 297
 298 #ifdef CONFIG_SANDBOX
 299 static int setup_ram_buf(void)
 300 {
 301         struct sandbox_state *state = state_get_current();
 302
 303         gd->arch.ram_buf = state->ram_buf;
 304         gd->ram_size = state->ram_size;
 305
 306         return 0;
 307 }
 308 #endif
 309
 310 /* Get the top of usable RAM */
 311 __weak ulong board_get_usable_ram_top(ulong total_size)
 312 {
 313 #ifdef CONFIG_SYS_SDRAM_BASE
 314         /*
 315          * Detect whether we have so much RAM that it goes past the end of our
 316          * 32-bit address space. If so, clip the usable RAM so it doesn't.
 317          */
 318         if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
 319                 /*
 320                  * Will wrap back to top of 32-bit space when reservations
 321                  * are made.
 322                  */
 323                 return 0;
 324 #endif
 325         return gd->ram_top;
 326 }
 327
 328 static int setup_dest_addr(void)
 329 {
 330         debug("Monitor len: %08lX\n", gd->mon_len);
 331         /*
 332          * Ram is setup, size stored in gd !!
 333          */
 334         debug("Ram size: %08lX\n", (ulong)gd->ram_size);
 335 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
 336         /*
 337          * Subtract specified amount of memory to hide so that it won't
 338          * get "touched" at all by U-Boot. By fixing up gd->ram_size
 339          * the Linux kernel should now get passed the now "corrected"
 340          * memory size and won't touch it either. This should work
 341          * for arch/ppc and arch/powerpc. Only Linux board ports in
 342          * arch/powerpc with bootwrapper support, that recalculate the
 343          * memory size from the SDRAM controller setup will have to
 344          * get fixed.
 345          */
 346         gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
 347 #endif
 348 #ifdef CONFIG_SYS_SDRAM_BASE
 349         gd->ram_top = CONFIG_SYS_SDRAM_BASE;
 350 #endif
 351         gd->ram_top += get_effective_memsize();
 352         gd->ram_top = board_get_usable_ram_top(gd->mon_len);
 353         gd->relocaddr = gd->ram_top;
 354         debug("Ram top: %08lX\n", (ulong)gd->ram_top);
 355 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 356         /*
 357          * We need to make sure the location we intend to put secondary core
 358          * boot code is reserved and not used by any part of u-boot
 359          */
 360         if (gd->relocaddr > determine_mp_bootpg(NULL)) {
 361                 gd->relocaddr = determine_mp_bootpg(NULL);
 362                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
 363         }
 364 #endif
 365         return 0;
 366 }
 367
 368 #if defined(CONFIG_SPARC)
 369 static int reserve_prom(void)
 370 {
 371         /* defined in arch/sparc/cpu/leon?/prom.c */
 372         extern void *__prom_start_reloc;
 373         int size = 8192; /* page table = 2k, prom = 6k */
 374         gd->relocaddr -= size;
 375         __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
 376         debug("Reserving %dk for PROM and page table at %08lx\n", size,
 377                 gd->relocaddr);
 378         return 0;
 379 }
 380 #endif
 381
 382 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 383 static int reserve_logbuffer(void)
 384 {
 385         /* reserve kernel log buffer */
 386         gd->relocaddr -= LOGBUFF_RESERVE;
 387         debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
 388                 gd->relocaddr);
 389         return 0;
 390 }
 391 #endif
 392
 393 #ifdef CONFIG_PRAM
 394 /* reserve protected RAM */
 395 static int reserve_pram(void)
 396 {
 397         ulong reg;
 398
 399         reg = getenv_ulong("pram", 10, CONFIG_PRAM);
 400         gd->relocaddr -= (reg << 10);           /* size is in kB */
 401         debug("Reserving %ldk for protected RAM at %08lx\n", reg,
 402               gd->relocaddr);
 403         return 0;
 404 }
 405 #endif /* CONFIG_PRAM */
 406
 407 /* Round memory pointer down to next 4 kB limit */
 408 static int reserve_round_4k(void)
 409 {
 410         gd->relocaddr &= ~(4096 - 1);
 411         return 0;
 412 }
 413
 414 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 415                 defined(CONFIG_ARM)
 416 static int reserve_mmu(void)
 417 {
 418         /* reserve TLB table */
 419         gd->arch.tlb_size = PGTABLE_SIZE;
 420         gd->relocaddr -= gd->arch.tlb_size;
 421
 422         /* round down to next 64 kB limit */
 423         gd->relocaddr &= ~(0x10000 - 1);
 424
 425         gd->arch.tlb_addr = gd->relocaddr;
 426         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 427               gd->arch.tlb_addr + gd->arch.tlb_size);
 428
 429 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
 430         /*
 431          * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
 432          * with location within secure ram.
 433          */
 434         gd->arch.tlb_allocated = gd->arch.tlb_addr;
 435 #endif
 436
 437         return 0;
 438 }
 439 #endif
 440
 441 #ifdef CONFIG_DM_VIDEO
 442 static int reserve_video(void)
 443 {
 444         ulong addr;
 445         int ret;
 446
 447         addr = gd->relocaddr;
 448         ret = video_reserve(&addr);
 449         if (ret)
 450                 return ret;
 451         gd->relocaddr = addr;
 452
 453         return 0;
 454 }
 455 #else
 456
 457 # ifdef CONFIG_LCD
 458 static int reserve_lcd(void)
 459 {
 460 #  ifdef CONFIG_FB_ADDR
 461         gd->fb_base = CONFIG_FB_ADDR;
 462 #  else
 463         /* reserve memory for LCD display (always full pages) */
 464         gd->relocaddr = lcd_setmem(gd->relocaddr);
 465         gd->fb_base = gd->relocaddr;
 466 #  endif /* CONFIG_FB_ADDR */
 467
 468         return 0;
 469 }
 470 # endif /* CONFIG_LCD */
 471
 472 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 473                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 474                 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
 475 static int reserve_legacy_video(void)
 476 {
 477         /* reserve memory for video display (always full pages) */
 478         gd->relocaddr = video_setmem(gd->relocaddr);
 479         gd->fb_base = gd->relocaddr;
 480
 481         return 0;
 482 }
 483 # endif
 484 #endif /* !CONFIG_DM_VIDEO */
 485
 486 static int reserve_trace(void)
 487 {
 488 #ifdef CONFIG_TRACE
 489         gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
 490         gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
 491         debug("Reserving %dk for trace data at: %08lx\n",
 492               CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
 493 #endif
 494
 495         return 0;
 496 }
 497
 498 static int reserve_uboot(void)
 499 {
 500         /*
 501          * reserve memory for U-Boot code, data & bss
 502          * round down to next 4 kB limit
 503          */
 504         gd->relocaddr -= gd->mon_len;
 505         gd->relocaddr &= ~(4096 - 1);
 506 #ifdef CONFIG_E500
 507         /* round down to next 64 kB limit so that IVPR stays aligned */
 508         gd->relocaddr &= ~(65536 - 1);
 509 #endif
 510
 511         debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
 512               gd->relocaddr);
 513
 514         gd->start_addr_sp = gd->relocaddr;
 515
 516         return 0;
 517 }
 518
 519 #ifndef CONFIG_SPL_BUILD
 520 /* reserve memory for malloc() area */
 521 static int reserve_malloc(void)
 522 {
 523         gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
 524         debug("Reserving %dk for malloc() at: %08lx\n",
 525                         TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
 526         return 0;
 527 }
 528
 529 /* (permanently) allocate a Board Info struct */
 530 static int reserve_board(void)
 531 {
 532         if (!gd->bd) {
 533                 gd->start_addr_sp -= sizeof(bd_t);
 534                 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 535                 memset(gd->bd, '\0', sizeof(bd_t));
 536                 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 537                       sizeof(bd_t), gd->start_addr_sp);
 538         }
 539         return 0;
 540 }
 541 #endif
 542
 543 static int setup_machine(void)
 544 {
 545 #ifdef CONFIG_MACH_TYPE
 546         gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
 547 #endif
 548         return 0;
 549 }
 550
 551 static int reserve_global_data(void)
 552 {
 553         gd->start_addr_sp -= sizeof(gd_t);
 554         gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
 555         debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 556                         sizeof(gd_t), gd->start_addr_sp);
 557         return 0;
 558 }
 559
 560 static int reserve_fdt(void)
 561 {
 562 #ifndef CONFIG_OF_EMBED
 563         /*
 564          * If the device tree is sitting immediately above our image then we
 565          * must relocate it. If it is embedded in the data section, then it
 566          * will be relocated with other data.
 567          */
 568         if (gd->fdt_blob) {
 569                 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
 570
 571                 gd->start_addr_sp -= gd->fdt_size;
 572                 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
 573                 debug("Reserving %lu Bytes for FDT at: %08lx\n",
 574                       gd->fdt_size, gd->start_addr_sp);
 575         }
 576 #endif
 577
 578         return 0;
 579 }
 580
 581 int arch_reserve_stacks(void)
 582 {
 583         return 0;
 584 }
 585
 586 static int reserve_stacks(void)
 587 {
 588         /* make stack pointer 16-byte aligned */
 589         gd->start_addr_sp -= 16;
 590         gd->start_addr_sp &= ~0xf;
 591
 592         /*
 593          * let the architecture-specific code tailor gd->start_addr_sp and
 594          * gd->irq_sp
 595          */
 596         return arch_reserve_stacks();
 597 }
 598
 599 static int display_new_sp(void)
 600 {
 601         debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
 602
 603         return 0;
 604 }
 605
 606 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 607         defined(CONFIG_SH)
 608 static int setup_board_part1(void)
 609 {
 610         bd_t *bd = gd->bd;
 611
 612         /*
 613          * Save local variables to board info struct
 614          */
 615         bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 616         bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 617
 618 #ifdef CONFIG_SYS_SRAM_BASE
 619         bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 620         bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 621 #endif
 622
 623 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
 624                 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 625         bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 626 #endif
 627 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
 628         bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 629 #endif
 630 #if defined(CONFIG_MPC83xx)
 631         bd->bi_immrbar = CONFIG_SYS_IMMR;
 632 #endif
 633
 634         return 0;
 635 }
 636 #endif
 637
 638 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 639 static int setup_board_part2(void)
 640 {
 641         bd_t *bd = gd->bd;
 642
 643         bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 644         bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 645 #if defined(CONFIG_CPM2)
 646         bd->bi_cpmfreq = gd->arch.cpm_clk;
 647         bd->bi_brgfreq = gd->arch.brg_clk;
 648         bd->bi_sccfreq = gd->arch.scc_clk;
 649         bd->bi_vco = gd->arch.vco_out;
 650 #endif /* CONFIG_CPM2 */
 651 #if defined(CONFIG_MPC512X)
 652         bd->bi_ipsfreq = gd->arch.ips_clk;
 653 #endif /* CONFIG_MPC512X */
 654 #if defined(CONFIG_MPC5xxx)
 655         bd->bi_ipbfreq = gd->arch.ipb_clk;
 656         bd->bi_pcifreq = gd->pci_clk;
 657 #endif /* CONFIG_MPC5xxx */
 658 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
 659         bd->bi_pcifreq = gd->pci_clk;
 660 #endif
 661 #if defined(CONFIG_EXTRA_CLOCK)
 662         bd->bi_inpfreq = gd->arch.inp_clk;      /* input Freq in Hz */
 663         bd->bi_vcofreq = gd->arch.vco_clk;      /* vco Freq in Hz */
 664         bd->bi_flbfreq = gd->arch.flb_clk;      /* flexbus Freq in Hz */
 665 #endif
 666
 667         return 0;
 668 }
 669 #endif
 670
 671 #ifdef CONFIG_SYS_EXTBDINFO
 672 static int setup_board_extra(void)
 673 {
 674         bd_t *bd = gd->bd;
 675
 676         strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
 677         strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
 678                 sizeof(bd->bi_r_version));
 679
 680         bd->bi_procfreq = gd->cpu_clk;  /* Processor Speed, In Hz */
 681         bd->bi_plb_busfreq = gd->bus_clk;
 682 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
 683                 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
 684                 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 685         bd->bi_pci_busfreq = get_PCI_freq();
 686         bd->bi_opbfreq = get_OPB_freq();
 687 #elif defined(CONFIG_XILINX_405)
 688         bd->bi_pci_busfreq = get_PCI_freq();
 689 #endif
 690
 691         return 0;
 692 }
 693 #endif
 694
 695 #ifdef CONFIG_POST
 696 static int init_post(void)
 697 {
 698         post_bootmode_init();
 699         post_run(NULL, POST_ROM | post_bootmode_get(0));
 700
 701         return 0;
 702 }
 703 #endif
 704
 705 static int setup_dram_config(void)
 706 {
 707         /* Ram is board specific, so move it to board code ... */
 708         dram_init_banksize();
 709
 710         return 0;
 711 }
 712
 713 static int reloc_fdt(void)
 714 {
 715 #ifndef CONFIG_OF_EMBED
 716         if (gd->flags & GD_FLG_SKIP_RELOC)
 717                 return 0;
 718         if (gd->new_fdt) {
 719                 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 720                 gd->fdt_blob = gd->new_fdt;
 721         }
 722 #endif
 723
 724         return 0;
 725 }
 726
 727 static int setup_reloc(void)
 728 {
 729         if (gd->flags & GD_FLG_SKIP_RELOC) {
 730                 debug("Skipping relocation due to flag\n");
 731                 return 0;
 732         }
 733
 734 #ifdef CONFIG_SYS_TEXT_BASE
 735         gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 736 #ifdef CONFIG_M68K
 737         /*
 738          * On all ColdFire arch cpu, monitor code starts always
 739          * just after the default vector table location, so at 0x400
 740          */
 741         gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
 742 #endif
 743 #endif
 744         memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 745
 746         debug("Relocation Offset is: %08lx\n", gd->reloc_off);
 747         debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 748               gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 749               gd->start_addr_sp);
 750
 751         return 0;
 752 }
 753
 754 /* ARM calls relocate_code from its crt0.S */
 755 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 756                 !CONFIG_IS_ENABLED(X86_64)
 757
 758 static int jump_to_copy(void)
 759 {
 760         if (gd->flags & GD_FLG_SKIP_RELOC)
 761                 return 0;
 762         /*
 763          * x86 is special, but in a nice way. It uses a trampoline which
 764          * enables the dcache if possible.
 765          *
 766          * For now, other archs use relocate_code(), which is implemented
 767          * similarly for all archs. When we do generic relocation, hopefully
 768          * we can make all archs enable the dcache prior to relocation.
 769          */
 770 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 771         /*
 772          * SDRAM and console are now initialised. The final stack can now
 773          * be setup in SDRAM. Code execution will continue in Flash, but
 774          * with the stack in SDRAM and Global Data in temporary memory
 775          * (CPU cache)
 776          */
 777         arch_setup_gd(gd->new_gd);
 778         board_init_f_r_trampoline(gd->start_addr_sp);
 779 #else
 780         relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 781 #endif
 782
 783         return 0;
 784 }
 785 #endif
 786
 787 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
 788 static int mark_bootstage(void)
 789 {
 790         bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
 791
 792         return 0;
 793 }
 794
 795 static int initf_console_record(void)
 796 {
 797 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
 798         return console_record_init();
 799 #else
 800         return 0;
 801 #endif
 802 }
 803
 804 static int initf_dm(void)
 805 {
 806 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
 807         int ret;
 808
 809         ret = dm_init_and_scan(true);
 810         if (ret)
 811                 return ret;
 812 #endif
 813 #ifdef CONFIG_TIMER_EARLY
 814         ret = dm_timer_init();
 815         if (ret)
 816                 return ret;
 817 #endif
 818
 819         return 0;
 820 }
 821
 822 /* Architecture-specific memory reservation */
 823 __weak int reserve_arch(void)
 824 {
 825         return 0;
 826 }
 827
 828 __weak int arch_cpu_init_dm(void)
 829 {
 830         return 0;
 831 }
 832
 833 static const init_fnc_t init_sequence_f[] = {
 834 #ifdef CONFIG_SANDBOX
 835         setup_ram_buf,
 836 #endif
 837         setup_mon_len,
 838 #ifdef CONFIG_OF_CONTROL
 839         fdtdec_setup,
 840 #endif
 841 #ifdef CONFIG_TRACE
 842         trace_early_init,
 843 #endif
 844         initf_malloc,
 845         initf_console_record,
 846 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
 847         x86_fsp_init,
 848 #endif
 849         arch_cpu_init,          /* basic arch cpu dependent setup */
 850         mach_cpu_init,          /* SoC/machine dependent CPU setup */
 851         initf_dm,
 852         arch_cpu_init_dm,
 853         mark_bootstage,         /* need timer, go after init dm */
 854 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 855         board_early_init_f,
 856 #endif
 857         /* TODO: can any of this go into arch_cpu_init()? */
 858 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
 859         get_clocks,             /* get CPU and bus clocks (etc.) */
 860 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
 861                 && !defined(CONFIG_TQM885D)
 862         adjust_sdram_tbs_8xx,
 863 #endif
 864         /* TODO: can we rename this to timer_init()? */
 865         init_timebase,
 866 #endif
 867 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
 868                 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
 869                 defined(CONFIG_SH) || defined(CONFIG_SPARC)
 870         timer_init,             /* initialize timer */
 871 #endif
 872 #if defined(CONFIG_BOARD_POSTCLK_INIT)
 873         board_postclk_init,
 874 #endif
 875 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
 876         get_clocks,
 877 #endif
 878         env_init,               /* initialize environment */
 879 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
 880         /* get CPU and bus clocks according to the environment variable */
 881         get_clocks_866,
 882         /* adjust sdram refresh rate according to the new clock */
 883         sdram_adjust_866,
 884         init_timebase,
 885 #endif
 886         init_baud_rate,         /* initialze baudrate settings */
 887         serial_init,            /* serial communications setup */
 888         console_init_f,         /* stage 1 init of console */
 889 #ifdef CONFIG_SANDBOX
 890         sandbox_early_getopt_check,
 891 #endif
 892         display_options,        /* say that we are here */
 893         display_text_info,      /* show debugging info if required */
 894 #if defined(CONFIG_MPC8260)
 895         prt_8260_rsr,
 896         prt_8260_clks,
 897 #endif /* CONFIG_MPC8260 */
 898 #if defined(CONFIG_MPC83xx)
 899         prt_83xx_rsr,
 900 #endif
 901 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH)
 902         checkcpu,
 903 #endif
 904 #if defined(CONFIG_DISPLAY_CPUINFO)
 905         print_cpuinfo,          /* display cpu info (and speed) */
 906 #endif
 907 #if defined(CONFIG_DISPLAY_BOARDINFO)
 908         show_board_info,
 909 #endif
 910         INIT_FUNC_WATCHDOG_INIT
 911 #if defined(CONFIG_MISC_INIT_F)
 912         misc_init_f,
 913 #endif
 914         INIT_FUNC_WATCHDOG_RESET
 915 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 916         init_func_i2c,
 917 #endif
 918 #if defined(CONFIG_HARD_SPI)
 919         init_func_spi,
 920 #endif
 921         announce_dram_init,
 922         /* TODO: unify all these dram functions? */
 923 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
 924                 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \
 925                 defined(CONFIG_SH)
 926         dram_init,              /* configure available RAM banks */
 927 #endif
 928 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 929         init_func_ram,
 930 #endif
 931 #ifdef CONFIG_POST
 932         post_init_f,
 933 #endif
 934         INIT_FUNC_WATCHDOG_RESET
 935 #if defined(CONFIG_SYS_DRAM_TEST)
 936         testdram,
 937 #endif /* CONFIG_SYS_DRAM_TEST */
 938         INIT_FUNC_WATCHDOG_RESET
 939
 940 #ifdef CONFIG_POST
 941         init_post,
 942 #endif
 943         INIT_FUNC_WATCHDOG_RESET
 944         /*
 945          * Now that we have DRAM mapped and working, we can
 946          * relocate the code and continue running from DRAM.
 947          *
 948          * Reserve memory at end of RAM for (top down in that order):
 949          *  - area that won't get touched by U-Boot and Linux (optional)
 950          *  - kernel log buffer
 951          *  - protected RAM
 952          *  - LCD framebuffer
 953          *  - monitor code
 954          *  - board info struct
 955          */
 956         setup_dest_addr,
 957 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_XTENSA)
 958         /* Blackfin u-boot monitor should be on top of the ram */
 959         reserve_uboot,
 960 #endif
 961 #if defined(CONFIG_SPARC)
 962         reserve_prom,
 963 #endif
 964 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 965         reserve_logbuffer,
 966 #endif
 967 #ifdef CONFIG_PRAM
 968         reserve_pram,
 969 #endif
 970         reserve_round_4k,
 971 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 972                 defined(CONFIG_ARM)
 973         reserve_mmu,
 974 #endif
 975 #ifdef CONFIG_DM_VIDEO
 976         reserve_video,
 977 #else
 978 # ifdef CONFIG_LCD
 979         reserve_lcd,
 980 # endif
 981         /* TODO: Why the dependency on CONFIG_8xx? */
 982 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 983                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 984                 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
 985         reserve_legacy_video,
 986 # endif
 987 #endif /* CONFIG_DM_VIDEO */
 988         reserve_trace,
 989 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_XTENSA)
 990         reserve_uboot,
 991 #endif
 992 #ifndef CONFIG_SPL_BUILD
 993         reserve_malloc,
 994         reserve_board,
 995 #endif
 996         setup_machine,
 997         reserve_global_data,
 998         reserve_fdt,
 999         reserve_arch,
1000         reserve_stacks,
1001         setup_dram_config,
1002         show_dram_config,
1003 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
1004         defined(CONFIG_SH)
1005         setup_board_part1,
1006 #endif
1007 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
1008         INIT_FUNC_WATCHDOG_RESET
1009         setup_board_part2,
1010 #endif
1011         display_new_sp,
1012 #ifdef CONFIG_SYS_EXTBDINFO
1013         setup_board_extra,
1014 #endif
1015         INIT_FUNC_WATCHDOG_RESET
1016         reloc_fdt,
1017         setup_reloc,
1018 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1019         copy_uboot_to_ram,
1020         do_elf_reloc_fixups,
1021         clear_bss,
1022 #endif
1023 #if defined(CONFIG_XTENSA)
1024         clear_bss,
1025 #endif
1026 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1027                 !CONFIG_IS_ENABLED(X86_64)
1028         jump_to_copy,
1029 #endif
1030         NULL,
1031 };
1032
1033 void board_init_f(ulong boot_flags)
1034 {
1035 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1036         /*
1037          * For some architectures, global data is initialized and used before
1038          * calling this function. The data should be preserved. For others,
1039          * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1040          * here to host global data until relocation.
1041          */
1042         gd_t data;
1043
1044         gd = &data;
1045
1046         /*
1047          * Clear global data before it is accessed at debug print
1048          * in initcall_run_list. Otherwise the debug print probably
1049          * get the wrong value of gd->have_console.
1050          */
1051         zero_global_data();
1052 #endif
1053
1054         gd->flags = boot_flags;
1055         gd->have_console = 0;
1056
1057         if (initcall_run_list(init_sequence_f))
1058                 hang();
1059
1060 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1061                 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
1062         /* NOTREACHED - jump_to_copy() does not return */
1063         hang();
1064 #endif
1065 }
1066
1067 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1068 /*
1069  * For now this code is only used on x86.
1070  *
1071  * init_sequence_f_r is the list of init functions which are run when
1072  * U-Boot is executing from Flash with a semi-limited 'C' environment.
1073  * The following limitations must be considered when implementing an
1074  * '_f_r' function:
1075  *  - 'static' variables are read-only
1076  *  - Global Data (gd->xxx) is read/write
1077  *
1078  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1079  * supported).  It _should_, if possible, copy global data to RAM and
1080  * initialise the CPU caches (to speed up the relocation process)
1081  *
1082  * NOTE: At present only x86 uses this route, but it is intended that
1083  * all archs will move to this when generic relocation is implemented.
1084  */
1085 static const init_fnc_t init_sequence_f_r[] = {
1086 #if !CONFIG_IS_ENABLED(X86_64)
1087         init_cache_f_r,
1088 #endif
1089
1090         NULL,
1091 };
1092
1093 void board_init_f_r(void)
1094 {
1095         if (initcall_run_list(init_sequence_f_r))
1096                 hang();
1097
1098         /*
1099          * The pre-relocation drivers may be using memory that has now gone
1100          * away. Mark serial as unavailable - this will fall back to the debug
1101          * UART if available.
1102          */
1103         gd->flags &= ~GD_FLG_SERIAL_READY;
1104
1105         /*
1106          * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1107          * Transfer execution from Flash to RAM by calculating the address
1108          * of the in-RAM copy of board_init_r() and calling it
1109          */
1110         (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1111
1112         /* NOTREACHED - board_init_r() does not return */
1113         hang();
1114 }
1115 #endif /* CONFIG_X86 */