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powerpc: Drop CONFIG_SYS_ALLOC_DPRAM
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1 /*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13 #include <common.h>
14 #include <linux/compiler.h>
15 #include <version.h>
16 #include <console.h>
17 #include <environment.h>
18 #include <dm.h>
19 #include <fdtdec.h>
20 #include <fs.h>
21 #if defined(CONFIG_CMD_IDE)
22 #include <ide.h>
23 #endif
24 #include <i2c.h>
25 #include <initcall.h>
26 #include <logbuff.h>
27 #include <malloc.h>
28 #include <mapmem.h>
29
30 /* TODO: Can we move these into arch/ headers? */
31 #ifdef CONFIG_8xx
32 #include <mpc8xx.h>
33 #endif
34 #ifdef CONFIG_5xx
35 #include <mpc5xx.h>
36 #endif
37 #ifdef CONFIG_MPC5xxx
38 #include <mpc5xxx.h>
39 #endif
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
41 #include <asm/mp.h>
42 #endif
43
44 #include <os.h>
45 #include <post.h>
46 #include <spi.h>
47 #include <status_led.h>
48 #include <timer.h>
49 #include <trace.h>
50 #include <video.h>
51 #include <watchdog.h>
52 #include <linux/errno.h>
53 #include <asm/io.h>
54 #include <asm/sections.h>
55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
56 #include <asm/init_helpers.h>
57 #endif
58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
59 #include <asm/relocate.h>
60 #endif
61 #ifdef CONFIG_SANDBOX
62 #include <asm/state.h>
63 #endif
64 #include <dm/root.h>
65 #include <linux/compiler.h>
66
67 /*
68 * Pointer to initial global data area
69 *
70 * Here we initialize it if needed.
71 */
72 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
73 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
74 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
75 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
76 #else
77 DECLARE_GLOBAL_DATA_PTR;
78 #endif
79
80 /*
81 * TODO(sjg@chromium.org): IMO this code should be
82 * refactored to a single function, something like:
83 *
84 * void led_set_state(enum led_colour_t colour, int on);
85 */
86 /************************************************************************
87 * Coloured LED functionality
88 ************************************************************************
89 * May be supplied by boards if desired
90 */
91 __weak void coloured_LED_init(void) {}
92 __weak void red_led_on(void) {}
93 __weak void red_led_off(void) {}
94 __weak void green_led_on(void) {}
95 __weak void green_led_off(void) {}
96 __weak void yellow_led_on(void) {}
97 __weak void yellow_led_off(void) {}
98 __weak void blue_led_on(void) {}
99 __weak void blue_led_off(void) {}
100
101 /*
102 * Why is gd allocated a register? Prior to reloc it might be better to
103 * just pass it around to each function in this file?
104 *
105 * After reloc one could argue that it is hardly used and doesn't need
106 * to be in a register. Or if it is it should perhaps hold pointers to all
107 * global data for all modules, so that post-reloc we can avoid the massive
108 * literal pool we get on ARM. Or perhaps just encourage each module to use
109 * a structure...
110 */
111
112 /*
113 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
114 */
115
116 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
117 static int init_func_watchdog_init(void)
118 {
119 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
120 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
121 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
122 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
123 defined(CONFIG_IMX_WATCHDOG))
124 hw_watchdog_init();
125 puts(" Watchdog enabled\n");
126 # endif
127 WATCHDOG_RESET();
128
129 return 0;
130 }
131
132 int init_func_watchdog_reset(void)
133 {
134 WATCHDOG_RESET();
135
136 return 0;
137 }
138 #endif /* CONFIG_WATCHDOG */
139
140 __weak void board_add_ram_info(int use_default)
141 {
142 /* please define platform specific board_add_ram_info() */
143 }
144
145 static int init_baud_rate(void)
146 {
147 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
148 return 0;
149 }
150
151 static int display_text_info(void)
152 {
153 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
154 ulong bss_start, bss_end, text_base;
155
156 bss_start = (ulong)&__bss_start;
157 bss_end = (ulong)&__bss_end;
158
159 #ifdef CONFIG_SYS_TEXT_BASE
160 text_base = CONFIG_SYS_TEXT_BASE;
161 #else
162 text_base = CONFIG_SYS_MONITOR_BASE;
163 #endif
164
165 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
166 text_base, bss_start, bss_end);
167 #endif
168
169 #ifdef CONFIG_USE_IRQ
170 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
171 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
172 #endif
173
174 return 0;
175 }
176
177 static int announce_dram_init(void)
178 {
179 puts("DRAM: ");
180 return 0;
181 }
182
183 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
184 static int init_func_ram(void)
185 {
186 #ifdef CONFIG_BOARD_TYPES
187 int board_type = gd->board_type;
188 #else
189 int board_type = 0; /* use dummy arg */
190 #endif
191
192 gd->ram_size = initdram(board_type);
193
194 if (gd->ram_size > 0)
195 return 0;
196
197 puts("*** failed ***\n");
198 return 1;
199 }
200 #endif
201
202 static int show_dram_config(void)
203 {
204 unsigned long long size;
205
206 #ifdef CONFIG_NR_DRAM_BANKS
207 int i;
208
209 debug("\nRAM Configuration:\n");
210 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
211 size += gd->bd->bi_dram[i].size;
212 debug("Bank #%d: %llx ", i,
213 (unsigned long long)(gd->bd->bi_dram[i].start));
214 #ifdef DEBUG
215 print_size(gd->bd->bi_dram[i].size, "\n");
216 #endif
217 }
218 debug("\nDRAM: ");
219 #else
220 size = gd->ram_size;
221 #endif
222
223 print_size(size, "");
224 board_add_ram_info(0);
225 putc('\n');
226
227 return 0;
228 }
229
230 __weak void dram_init_banksize(void)
231 {
232 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
233 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
234 gd->bd->bi_dram[0].size = get_effective_memsize();
235 #endif
236 }
237
238 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
239 static int init_func_i2c(void)
240 {
241 puts("I2C: ");
242 #ifdef CONFIG_SYS_I2C
243 i2c_init_all();
244 #else
245 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
246 #endif
247 puts("ready\n");
248 return 0;
249 }
250 #endif
251
252 #if defined(CONFIG_HARD_SPI)
253 static int init_func_spi(void)
254 {
255 puts("SPI: ");
256 spi_init();
257 puts("ready\n");
258 return 0;
259 }
260 #endif
261
262 __maybe_unused
263 static int zero_global_data(void)
264 {
265 memset((void *)gd, '\0', sizeof(gd_t));
266
267 return 0;
268 }
269
270 static int setup_mon_len(void)
271 {
272 #if defined(__ARM__) || defined(__MICROBLAZE__)
273 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
274 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
275 gd->mon_len = (ulong)&_end - (ulong)_init;
276 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) || \
277 defined(CONFIG_XTENSA)
278 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
279 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
280 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
281 #elif defined(CONFIG_SYS_MONITOR_BASE)
282 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
283 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
284 #endif
285 return 0;
286 }
287
288 __weak int arch_cpu_init(void)
289 {
290 return 0;
291 }
292
293 __weak int mach_cpu_init(void)
294 {
295 return 0;
296 }
297
298 #ifdef CONFIG_SANDBOX
299 static int setup_ram_buf(void)
300 {
301 struct sandbox_state *state = state_get_current();
302
303 gd->arch.ram_buf = state->ram_buf;
304 gd->ram_size = state->ram_size;
305
306 return 0;
307 }
308 #endif
309
310 /* Get the top of usable RAM */
311 __weak ulong board_get_usable_ram_top(ulong total_size)
312 {
313 #ifdef CONFIG_SYS_SDRAM_BASE
314 /*
315 * Detect whether we have so much RAM that it goes past the end of our
316 * 32-bit address space. If so, clip the usable RAM so it doesn't.
317 */
318 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
319 /*
320 * Will wrap back to top of 32-bit space when reservations
321 * are made.
322 */
323 return 0;
324 #endif
325 return gd->ram_top;
326 }
327
328 __weak phys_size_t board_reserve_ram_top(phys_size_t ram_size)
329 {
330 #ifdef CONFIG_SYS_MEM_TOP_HIDE
331 return ram_size - CONFIG_SYS_MEM_TOP_HIDE;
332 #else
333 return ram_size;
334 #endif
335 }
336
337 static int setup_dest_addr(void)
338 {
339 debug("Monitor len: %08lX\n", gd->mon_len);
340 /*
341 * Ram is setup, size stored in gd !!
342 */
343 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
344 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
345 /* Reserve memory for secure MMU tables, and/or security monitor */
346 gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
347 /*
348 * Record secure memory location. Need recalcuate if memory splits
349 * into banks, or the ram base is not zero.
350 */
351 gd->arch.secure_ram = gd->ram_size;
352 #endif
353 /*
354 * Subtract specified amount of memory to hide so that it won't
355 * get "touched" at all by U-Boot. By fixing up gd->ram_size
356 * the Linux kernel should now get passed the now "corrected"
357 * memory size and won't touch it either. This has been used
358 * by arch/powerpc exclusively. Now ARMv8 takes advantage of
359 * thie mechanism. If memory is split into banks, addresses
360 * need to be calculated.
361 */
362 gd->ram_size = board_reserve_ram_top(gd->ram_size);
363
364 #ifdef CONFIG_SYS_SDRAM_BASE
365 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
366 #endif
367 gd->ram_top += get_effective_memsize();
368 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
369 gd->relocaddr = gd->ram_top;
370 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
371 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
372 /*
373 * We need to make sure the location we intend to put secondary core
374 * boot code is reserved and not used by any part of u-boot
375 */
376 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
377 gd->relocaddr = determine_mp_bootpg(NULL);
378 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
379 }
380 #endif
381 return 0;
382 }
383
384 #if defined(CONFIG_SPARC)
385 static int reserve_prom(void)
386 {
387 /* defined in arch/sparc/cpu/leon?/prom.c */
388 extern void *__prom_start_reloc;
389 int size = 8192; /* page table = 2k, prom = 6k */
390 gd->relocaddr -= size;
391 __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
392 debug("Reserving %dk for PROM and page table at %08lx\n", size,
393 gd->relocaddr);
394 return 0;
395 }
396 #endif
397
398 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
399 static int reserve_logbuffer(void)
400 {
401 /* reserve kernel log buffer */
402 gd->relocaddr -= LOGBUFF_RESERVE;
403 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
404 gd->relocaddr);
405 return 0;
406 }
407 #endif
408
409 #ifdef CONFIG_PRAM
410 /* reserve protected RAM */
411 static int reserve_pram(void)
412 {
413 ulong reg;
414
415 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
416 gd->relocaddr -= (reg << 10); /* size is in kB */
417 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
418 gd->relocaddr);
419 return 0;
420 }
421 #endif /* CONFIG_PRAM */
422
423 /* Round memory pointer down to next 4 kB limit */
424 static int reserve_round_4k(void)
425 {
426 gd->relocaddr &= ~(4096 - 1);
427 return 0;
428 }
429
430 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
431 defined(CONFIG_ARM)
432 static int reserve_mmu(void)
433 {
434 /* reserve TLB table */
435 gd->arch.tlb_size = PGTABLE_SIZE;
436 gd->relocaddr -= gd->arch.tlb_size;
437
438 /* round down to next 64 kB limit */
439 gd->relocaddr &= ~(0x10000 - 1);
440
441 gd->arch.tlb_addr = gd->relocaddr;
442 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
443 gd->arch.tlb_addr + gd->arch.tlb_size);
444
445 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
446 /*
447 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
448 * with location within secure ram.
449 */
450 gd->arch.tlb_allocated = gd->arch.tlb_addr;
451 #endif
452
453 return 0;
454 }
455 #endif
456
457 #ifdef CONFIG_DM_VIDEO
458 static int reserve_video(void)
459 {
460 ulong addr;
461 int ret;
462
463 addr = gd->relocaddr;
464 ret = video_reserve(&addr);
465 if (ret)
466 return ret;
467 gd->relocaddr = addr;
468
469 return 0;
470 }
471 #else
472
473 # ifdef CONFIG_LCD
474 static int reserve_lcd(void)
475 {
476 # ifdef CONFIG_FB_ADDR
477 gd->fb_base = CONFIG_FB_ADDR;
478 # else
479 /* reserve memory for LCD display (always full pages) */
480 gd->relocaddr = lcd_setmem(gd->relocaddr);
481 gd->fb_base = gd->relocaddr;
482 # endif /* CONFIG_FB_ADDR */
483
484 return 0;
485 }
486 # endif /* CONFIG_LCD */
487
488 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
489 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
490 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
491 static int reserve_legacy_video(void)
492 {
493 /* reserve memory for video display (always full pages) */
494 gd->relocaddr = video_setmem(gd->relocaddr);
495 gd->fb_base = gd->relocaddr;
496
497 return 0;
498 }
499 # endif
500 #endif /* !CONFIG_DM_VIDEO */
501
502 static int reserve_trace(void)
503 {
504 #ifdef CONFIG_TRACE
505 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
506 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
507 debug("Reserving %dk for trace data at: %08lx\n",
508 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
509 #endif
510
511 return 0;
512 }
513
514 static int reserve_uboot(void)
515 {
516 /*
517 * reserve memory for U-Boot code, data & bss
518 * round down to next 4 kB limit
519 */
520 gd->relocaddr -= gd->mon_len;
521 gd->relocaddr &= ~(4096 - 1);
522 #ifdef CONFIG_E500
523 /* round down to next 64 kB limit so that IVPR stays aligned */
524 gd->relocaddr &= ~(65536 - 1);
525 #endif
526
527 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
528 gd->relocaddr);
529
530 gd->start_addr_sp = gd->relocaddr;
531
532 return 0;
533 }
534
535 #ifndef CONFIG_SPL_BUILD
536 /* reserve memory for malloc() area */
537 static int reserve_malloc(void)
538 {
539 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
540 debug("Reserving %dk for malloc() at: %08lx\n",
541 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
542 return 0;
543 }
544
545 /* (permanently) allocate a Board Info struct */
546 static int reserve_board(void)
547 {
548 if (!gd->bd) {
549 gd->start_addr_sp -= sizeof(bd_t);
550 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
551 memset(gd->bd, '\0', sizeof(bd_t));
552 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
553 sizeof(bd_t), gd->start_addr_sp);
554 }
555 return 0;
556 }
557 #endif
558
559 static int setup_machine(void)
560 {
561 #ifdef CONFIG_MACH_TYPE
562 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
563 #endif
564 return 0;
565 }
566
567 static int reserve_global_data(void)
568 {
569 gd->start_addr_sp -= sizeof(gd_t);
570 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
571 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
572 sizeof(gd_t), gd->start_addr_sp);
573 return 0;
574 }
575
576 static int reserve_fdt(void)
577 {
578 #ifndef CONFIG_OF_EMBED
579 /*
580 * If the device tree is sitting immediately above our image then we
581 * must relocate it. If it is embedded in the data section, then it
582 * will be relocated with other data.
583 */
584 if (gd->fdt_blob) {
585 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
586
587 gd->start_addr_sp -= gd->fdt_size;
588 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
589 debug("Reserving %lu Bytes for FDT at: %08lx\n",
590 gd->fdt_size, gd->start_addr_sp);
591 }
592 #endif
593
594 return 0;
595 }
596
597 int arch_reserve_stacks(void)
598 {
599 return 0;
600 }
601
602 static int reserve_stacks(void)
603 {
604 /* make stack pointer 16-byte aligned */
605 gd->start_addr_sp -= 16;
606 gd->start_addr_sp &= ~0xf;
607
608 /*
609 * let the architecture-specific code tailor gd->start_addr_sp and
610 * gd->irq_sp
611 */
612 return arch_reserve_stacks();
613 }
614
615 static int display_new_sp(void)
616 {
617 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
618
619 return 0;
620 }
621
622 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
623 defined(CONFIG_SH)
624 static int setup_board_part1(void)
625 {
626 bd_t *bd = gd->bd;
627
628 /*
629 * Save local variables to board info struct
630 */
631 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
632 bd->bi_memsize = gd->ram_size; /* size in bytes */
633
634 #ifdef CONFIG_SYS_SRAM_BASE
635 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
636 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
637 #endif
638
639 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
640 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
641 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
642 #endif
643 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
644 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
645 #endif
646 #if defined(CONFIG_MPC83xx)
647 bd->bi_immrbar = CONFIG_SYS_IMMR;
648 #endif
649
650 return 0;
651 }
652 #endif
653
654 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
655 static int setup_board_part2(void)
656 {
657 bd_t *bd = gd->bd;
658
659 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
660 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
661 #if defined(CONFIG_CPM2)
662 bd->bi_cpmfreq = gd->arch.cpm_clk;
663 bd->bi_brgfreq = gd->arch.brg_clk;
664 bd->bi_sccfreq = gd->arch.scc_clk;
665 bd->bi_vco = gd->arch.vco_out;
666 #endif /* CONFIG_CPM2 */
667 #if defined(CONFIG_MPC512X)
668 bd->bi_ipsfreq = gd->arch.ips_clk;
669 #endif /* CONFIG_MPC512X */
670 #if defined(CONFIG_MPC5xxx)
671 bd->bi_ipbfreq = gd->arch.ipb_clk;
672 bd->bi_pcifreq = gd->pci_clk;
673 #endif /* CONFIG_MPC5xxx */
674 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
675 bd->bi_pcifreq = gd->pci_clk;
676 #endif
677 #if defined(CONFIG_EXTRA_CLOCK)
678 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
679 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
680 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
681 #endif
682
683 return 0;
684 }
685 #endif
686
687 #ifdef CONFIG_SYS_EXTBDINFO
688 static int setup_board_extra(void)
689 {
690 bd_t *bd = gd->bd;
691
692 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
693 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
694 sizeof(bd->bi_r_version));
695
696 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
697 bd->bi_plb_busfreq = gd->bus_clk;
698 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
699 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
700 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
701 bd->bi_pci_busfreq = get_PCI_freq();
702 bd->bi_opbfreq = get_OPB_freq();
703 #elif defined(CONFIG_XILINX_405)
704 bd->bi_pci_busfreq = get_PCI_freq();
705 #endif
706
707 return 0;
708 }
709 #endif
710
711 #ifdef CONFIG_POST
712 static int init_post(void)
713 {
714 post_bootmode_init();
715 post_run(NULL, POST_ROM | post_bootmode_get(0));
716
717 return 0;
718 }
719 #endif
720
721 static int setup_dram_config(void)
722 {
723 /* Ram is board specific, so move it to board code ... */
724 dram_init_banksize();
725
726 return 0;
727 }
728
729 static int reloc_fdt(void)
730 {
731 #ifndef CONFIG_OF_EMBED
732 if (gd->flags & GD_FLG_SKIP_RELOC)
733 return 0;
734 if (gd->new_fdt) {
735 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
736 gd->fdt_blob = gd->new_fdt;
737 }
738 #endif
739
740 return 0;
741 }
742
743 static int setup_reloc(void)
744 {
745 if (gd->flags & GD_FLG_SKIP_RELOC) {
746 debug("Skipping relocation due to flag\n");
747 return 0;
748 }
749
750 #ifdef CONFIG_SYS_TEXT_BASE
751 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
752 #ifdef CONFIG_M68K
753 /*
754 * On all ColdFire arch cpu, monitor code starts always
755 * just after the default vector table location, so at 0x400
756 */
757 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
758 #endif
759 #endif
760 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
761
762 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
763 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
764 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
765 gd->start_addr_sp);
766
767 return 0;
768 }
769
770 /* ARM calls relocate_code from its crt0.S */
771 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
772
773 static int jump_to_copy(void)
774 {
775 if (gd->flags & GD_FLG_SKIP_RELOC)
776 return 0;
777 /*
778 * x86 is special, but in a nice way. It uses a trampoline which
779 * enables the dcache if possible.
780 *
781 * For now, other archs use relocate_code(), which is implemented
782 * similarly for all archs. When we do generic relocation, hopefully
783 * we can make all archs enable the dcache prior to relocation.
784 */
785 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
786 /*
787 * SDRAM and console are now initialised. The final stack can now
788 * be setup in SDRAM. Code execution will continue in Flash, but
789 * with the stack in SDRAM and Global Data in temporary memory
790 * (CPU cache)
791 */
792 arch_setup_gd(gd->new_gd);
793 board_init_f_r_trampoline(gd->start_addr_sp);
794 #else
795 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
796 #endif
797
798 return 0;
799 }
800 #endif
801
802 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
803 static int mark_bootstage(void)
804 {
805 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
806
807 return 0;
808 }
809
810 static int initf_console_record(void)
811 {
812 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
813 return console_record_init();
814 #else
815 return 0;
816 #endif
817 }
818
819 static int initf_dm(void)
820 {
821 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
822 int ret;
823
824 ret = dm_init_and_scan(true);
825 if (ret)
826 return ret;
827 #endif
828 #ifdef CONFIG_TIMER_EARLY
829 ret = dm_timer_init();
830 if (ret)
831 return ret;
832 #endif
833
834 return 0;
835 }
836
837 /* Architecture-specific memory reservation */
838 __weak int reserve_arch(void)
839 {
840 return 0;
841 }
842
843 __weak int arch_cpu_init_dm(void)
844 {
845 return 0;
846 }
847
848 static init_fnc_t init_sequence_f[] = {
849 #ifdef CONFIG_SANDBOX
850 setup_ram_buf,
851 #endif
852 setup_mon_len,
853 #ifdef CONFIG_OF_CONTROL
854 fdtdec_setup,
855 #endif
856 #ifdef CONFIG_TRACE
857 trace_early_init,
858 #endif
859 initf_malloc,
860 initf_console_record,
861 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
862 x86_fsp_init,
863 #endif
864 arch_cpu_init, /* basic arch cpu dependent setup */
865 mach_cpu_init, /* SoC/machine dependent CPU setup */
866 initf_dm,
867 arch_cpu_init_dm,
868 mark_bootstage, /* need timer, go after init dm */
869 #if defined(CONFIG_BOARD_EARLY_INIT_F)
870 board_early_init_f,
871 #endif
872 /* TODO: can any of this go into arch_cpu_init()? */
873 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
874 get_clocks, /* get CPU and bus clocks (etc.) */
875 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
876 && !defined(CONFIG_TQM885D)
877 adjust_sdram_tbs_8xx,
878 #endif
879 /* TODO: can we rename this to timer_init()? */
880 init_timebase,
881 #endif
882 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
883 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
884 defined(CONFIG_SH) || defined(CONFIG_SPARC)
885 timer_init, /* initialize timer */
886 #endif
887 #if defined(CONFIG_BOARD_POSTCLK_INIT)
888 board_postclk_init,
889 #endif
890 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
891 get_clocks,
892 #endif
893 env_init, /* initialize environment */
894 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
895 /* get CPU and bus clocks according to the environment variable */
896 get_clocks_866,
897 /* adjust sdram refresh rate according to the new clock */
898 sdram_adjust_866,
899 init_timebase,
900 #endif
901 init_baud_rate, /* initialze baudrate settings */
902 serial_init, /* serial communications setup */
903 console_init_f, /* stage 1 init of console */
904 #ifdef CONFIG_SANDBOX
905 sandbox_early_getopt_check,
906 #endif
907 display_options, /* say that we are here */
908 display_text_info, /* show debugging info if required */
909 #if defined(CONFIG_MPC8260)
910 prt_8260_rsr,
911 prt_8260_clks,
912 #endif /* CONFIG_MPC8260 */
913 #if defined(CONFIG_MPC83xx)
914 prt_83xx_rsr,
915 #endif
916 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH)
917 checkcpu,
918 #endif
919 print_cpuinfo, /* display cpu info (and speed) */
920 #if defined(CONFIG_MPC5xxx)
921 prt_mpc5xxx_clks,
922 #endif /* CONFIG_MPC5xxx */
923 #if defined(CONFIG_DISPLAY_BOARDINFO)
924 show_board_info,
925 #endif
926 INIT_FUNC_WATCHDOG_INIT
927 #if defined(CONFIG_MISC_INIT_F)
928 misc_init_f,
929 #endif
930 INIT_FUNC_WATCHDOG_RESET
931 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
932 init_func_i2c,
933 #endif
934 #if defined(CONFIG_HARD_SPI)
935 init_func_spi,
936 #endif
937 announce_dram_init,
938 /* TODO: unify all these dram functions? */
939 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
940 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \
941 defined(CONFIG_SH)
942 dram_init, /* configure available RAM banks */
943 #endif
944 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
945 init_func_ram,
946 #endif
947 #ifdef CONFIG_POST
948 post_init_f,
949 #endif
950 INIT_FUNC_WATCHDOG_RESET
951 #if defined(CONFIG_SYS_DRAM_TEST)
952 testdram,
953 #endif /* CONFIG_SYS_DRAM_TEST */
954 INIT_FUNC_WATCHDOG_RESET
955
956 #ifdef CONFIG_POST
957 init_post,
958 #endif
959 INIT_FUNC_WATCHDOG_RESET
960 /*
961 * Now that we have DRAM mapped and working, we can
962 * relocate the code and continue running from DRAM.
963 *
964 * Reserve memory at end of RAM for (top down in that order):
965 * - area that won't get touched by U-Boot and Linux (optional)
966 * - kernel log buffer
967 * - protected RAM
968 * - LCD framebuffer
969 * - monitor code
970 * - board info struct
971 */
972 setup_dest_addr,
973 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_XTENSA)
974 /* Blackfin u-boot monitor should be on top of the ram */
975 reserve_uboot,
976 #endif
977 #if defined(CONFIG_SPARC)
978 reserve_prom,
979 #endif
980 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
981 reserve_logbuffer,
982 #endif
983 #ifdef CONFIG_PRAM
984 reserve_pram,
985 #endif
986 reserve_round_4k,
987 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
988 defined(CONFIG_ARM)
989 reserve_mmu,
990 #endif
991 #ifdef CONFIG_DM_VIDEO
992 reserve_video,
993 #else
994 # ifdef CONFIG_LCD
995 reserve_lcd,
996 # endif
997 /* TODO: Why the dependency on CONFIG_8xx? */
998 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
999 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
1000 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
1001 reserve_legacy_video,
1002 # endif
1003 #endif /* CONFIG_DM_VIDEO */
1004 reserve_trace,
1005 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_XTENSA)
1006 reserve_uboot,
1007 #endif
1008 #ifndef CONFIG_SPL_BUILD
1009 reserve_malloc,
1010 reserve_board,
1011 #endif
1012 setup_machine,
1013 reserve_global_data,
1014 reserve_fdt,
1015 reserve_arch,
1016 reserve_stacks,
1017 setup_dram_config,
1018 show_dram_config,
1019 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
1020 defined(CONFIG_SH)
1021 setup_board_part1,
1022 #endif
1023 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
1024 INIT_FUNC_WATCHDOG_RESET
1025 setup_board_part2,
1026 #endif
1027 display_new_sp,
1028 #ifdef CONFIG_SYS_EXTBDINFO
1029 setup_board_extra,
1030 #endif
1031 INIT_FUNC_WATCHDOG_RESET
1032 reloc_fdt,
1033 setup_reloc,
1034 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1035 copy_uboot_to_ram,
1036 clear_bss,
1037 do_elf_reloc_fixups,
1038 #endif
1039 #if defined(CONFIG_XTENSA)
1040 clear_bss,
1041 #endif
1042 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1043 jump_to_copy,
1044 #endif
1045 NULL,
1046 };
1047
1048 void board_init_f(ulong boot_flags)
1049 {
1050 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1051 /*
1052 * For some architectures, global data is initialized and used before
1053 * calling this function. The data should be preserved. For others,
1054 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1055 * here to host global data until relocation.
1056 */
1057 gd_t data;
1058
1059 gd = &data;
1060
1061 /*
1062 * Clear global data before it is accessed at debug print
1063 * in initcall_run_list. Otherwise the debug print probably
1064 * get the wrong value of gd->have_console.
1065 */
1066 zero_global_data();
1067 #endif
1068
1069 gd->flags = boot_flags;
1070 gd->have_console = 0;
1071
1072 if (initcall_run_list(init_sequence_f))
1073 hang();
1074
1075 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1076 !defined(CONFIG_EFI_APP)
1077 /* NOTREACHED - jump_to_copy() does not return */
1078 hang();
1079 #endif
1080 }
1081
1082 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1083 /*
1084 * For now this code is only used on x86.
1085 *
1086 * init_sequence_f_r is the list of init functions which are run when
1087 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1088 * The following limitations must be considered when implementing an
1089 * '_f_r' function:
1090 * - 'static' variables are read-only
1091 * - Global Data (gd->xxx) is read/write
1092 *
1093 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1094 * supported). It _should_, if possible, copy global data to RAM and
1095 * initialise the CPU caches (to speed up the relocation process)
1096 *
1097 * NOTE: At present only x86 uses this route, but it is intended that
1098 * all archs will move to this when generic relocation is implemented.
1099 */
1100 static init_fnc_t init_sequence_f_r[] = {
1101 init_cache_f_r,
1102
1103 NULL,
1104 };
1105
1106 void board_init_f_r(void)
1107 {
1108 if (initcall_run_list(init_sequence_f_r))
1109 hang();
1110
1111 /*
1112 * The pre-relocation drivers may be using memory that has now gone
1113 * away. Mark serial as unavailable - this will fall back to the debug
1114 * UART if available.
1115 */
1116 gd->flags &= ~GD_FLG_SERIAL_READY;
1117
1118 /*
1119 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1120 * Transfer execution from Flash to RAM by calculating the address
1121 * of the in-RAM copy of board_init_r() and calling it
1122 */
1123 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1124
1125 /* NOTREACHED - board_init_r() does not return */
1126 hang();
1127 }
1128 #endif /* CONFIG_X86 */