common/board_f.c

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2002-2006
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Marius Groeger <mgroeger@sysgo.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #include <common.h>
  14 #include <linux/compiler.h>
  15 #include <version.h>
  16 #include <console.h>
  17 #include <environment.h>
  18 #include <dm.h>
  19 #include <fdtdec.h>
  20 #include <fs.h>
  21 #if defined(CONFIG_CMD_IDE)
  22 #include <ide.h>
  23 #endif
  24 #include <i2c.h>
  25 #include <initcall.h>
  26 #include <logbuff.h>
  27 #include <malloc.h>
  28 #include <mapmem.h>
  29
  30 /* TODO: Can we move these into arch/ headers? */
  31 #ifdef CONFIG_8xx
  32 #include <mpc8xx.h>
  33 #endif
  34 #ifdef CONFIG_5xx
  35 #include <mpc5xx.h>
  36 #endif
  37 #ifdef CONFIG_MPC5xxx
  38 #include <mpc5xxx.h>
  39 #endif
  40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  41 #include <asm/mp.h>
  42 #endif
  43
  44 #include <os.h>
  45 #include <post.h>
  46 #include <spi.h>
  47 #include <status_led.h>
  48 #include <timer.h>
  49 #include <trace.h>
  50 #include <video.h>
  51 #include <watchdog.h>
  52 #include <asm/errno.h>
  53 #include <asm/io.h>
  54 #include <asm/sections.h>
  55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  56 #include <asm/init_helpers.h>
  57 #include <asm/relocate.h>
  58 #endif
  59 #ifdef CONFIG_SANDBOX
  60 #include <asm/state.h>
  61 #endif
  62 #include <dm/root.h>
  63 #include <linux/compiler.h>
  64
  65 /*
  66  * Pointer to initial global data area
  67  *
  68  * Here we initialize it if needed.
  69  */
  70 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  71 #undef  XTRN_DECLARE_GLOBAL_DATA_PTR
  72 #define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
  73 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  74 #else
  75 DECLARE_GLOBAL_DATA_PTR;
  76 #endif
  77
  78 /*
  79  * TODO(sjg@chromium.org): IMO this code should be
  80  * refactored to a single function, something like:
  81  *
  82  * void led_set_state(enum led_colour_t colour, int on);
  83  */
  84 /************************************************************************
  85  * Coloured LED functionality
  86  ************************************************************************
  87  * May be supplied by boards if desired
  88  */
  89 __weak void coloured_LED_init(void) {}
  90 __weak void red_led_on(void) {}
  91 __weak void red_led_off(void) {}
  92 __weak void green_led_on(void) {}
  93 __weak void green_led_off(void) {}
  94 __weak void yellow_led_on(void) {}
  95 __weak void yellow_led_off(void) {}
  96 __weak void blue_led_on(void) {}
  97 __weak void blue_led_off(void) {}
  98
  99 /*
 100  * Why is gd allocated a register? Prior to reloc it might be better to
 101  * just pass it around to each function in this file?
 102  *
 103  * After reloc one could argue that it is hardly used and doesn't need
 104  * to be in a register. Or if it is it should perhaps hold pointers to all
 105  * global data for all modules, so that post-reloc we can avoid the massive
 106  * literal pool we get on ARM. Or perhaps just encourage each module to use
 107  * a structure...
 108  */
 109
 110 /*
 111  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
 112  */
 113
 114 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
 115 static int init_func_watchdog_init(void)
 116 {
 117 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
 118         defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
 119         defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
 120         defined(CONFIG_IMX_WATCHDOG))
 121         hw_watchdog_init();
 122 # endif
 123         puts("       Watchdog enabled\n");
 124         WATCHDOG_RESET();
 125
 126         return 0;
 127 }
 128
 129 int init_func_watchdog_reset(void)
 130 {
 131         WATCHDOG_RESET();
 132
 133         return 0;
 134 }
 135 #endif /* CONFIG_WATCHDOG */
 136
 137 __weak void board_add_ram_info(int use_default)
 138 {
 139         /* please define platform specific board_add_ram_info() */
 140 }
 141
 142 static int init_baud_rate(void)
 143 {
 144         gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
 145         return 0;
 146 }
 147
 148 static int display_text_info(void)
 149 {
 150 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
 151         ulong bss_start, bss_end, text_base;
 152
 153         bss_start = (ulong)&__bss_start;
 154         bss_end = (ulong)&__bss_end;
 155
 156 #ifdef CONFIG_SYS_TEXT_BASE
 157         text_base = CONFIG_SYS_TEXT_BASE;
 158 #else
 159         text_base = CONFIG_SYS_MONITOR_BASE;
 160 #endif
 161
 162         debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 163                 text_base, bss_start, bss_end);
 164 #endif
 165
 166 #ifdef CONFIG_USE_IRQ
 167         debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
 168         debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
 169 #endif
 170
 171         return 0;
 172 }
 173
 174 static int announce_dram_init(void)
 175 {
 176         puts("DRAM:  ");
 177         return 0;
 178 }
 179
 180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 181 static int init_func_ram(void)
 182 {
 183 #ifdef  CONFIG_BOARD_TYPES
 184         int board_type = gd->board_type;
 185 #else
 186         int board_type = 0;     /* use dummy arg */
 187 #endif
 188
 189         gd->ram_size = initdram(board_type);
 190
 191         if (gd->ram_size > 0)
 192                 return 0;
 193
 194         puts("*** failed ***\n");
 195         return 1;
 196 }
 197 #endif
 198
 199 static int show_dram_config(void)
 200 {
 201         unsigned long long size;
 202
 203 #ifdef CONFIG_NR_DRAM_BANKS
 204         int i;
 205
 206         debug("\nRAM Configuration:\n");
 207         for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 208                 size += gd->bd->bi_dram[i].size;
 209                 debug("Bank #%d: %llx ", i,
 210                       (unsigned long long)(gd->bd->bi_dram[i].start));
 211 #ifdef DEBUG
 212                 print_size(gd->bd->bi_dram[i].size, "\n");
 213 #endif
 214         }
 215         debug("\nDRAM:  ");
 216 #else
 217         size = gd->ram_size;
 218 #endif
 219
 220         print_size(size, "");
 221         board_add_ram_info(0);
 222         putc('\n');
 223
 224         return 0;
 225 }
 226
 227 __weak void dram_init_banksize(void)
 228 {
 229 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 230         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 231         gd->bd->bi_dram[0].size = get_effective_memsize();
 232 #endif
 233 }
 234
 235 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 236 static int init_func_i2c(void)
 237 {
 238         puts("I2C:   ");
 239 #ifdef CONFIG_SYS_I2C
 240         i2c_init_all();
 241 #else
 242         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 243 #endif
 244         puts("ready\n");
 245         return 0;
 246 }
 247 #endif
 248
 249 #if defined(CONFIG_HARD_SPI)
 250 static int init_func_spi(void)
 251 {
 252         puts("SPI:   ");
 253         spi_init();
 254         puts("ready\n");
 255         return 0;
 256 }
 257 #endif
 258
 259 __maybe_unused
 260 static int zero_global_data(void)
 261 {
 262         memset((void *)gd, '\0', sizeof(gd_t));
 263
 264         return 0;
 265 }
 266
 267 static int setup_mon_len(void)
 268 {
 269 #if defined(__ARM__) || defined(__MICROBLAZE__)
 270         gd->mon_len = (ulong)&__bss_end - (ulong)_start;
 271 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
 272         gd->mon_len = (ulong)&_end - (ulong)_init;
 273 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
 274         gd->mon_len = CONFIG_SYS_MONITOR_LEN;
 275 #elif defined(CONFIG_NDS32)
 276         gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 277 #elif defined(CONFIG_SYS_MONITOR_BASE)
 278         /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 279         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
 280 #endif
 281         return 0;
 282 }
 283
 284 __weak int arch_cpu_init(void)
 285 {
 286         return 0;
 287 }
 288
 289 #ifdef CONFIG_SANDBOX
 290 static int setup_ram_buf(void)
 291 {
 292         struct sandbox_state *state = state_get_current();
 293
 294         gd->arch.ram_buf = state->ram_buf;
 295         gd->ram_size = state->ram_size;
 296
 297         return 0;
 298 }
 299 #endif
 300
 301 /* Get the top of usable RAM */
 302 __weak ulong board_get_usable_ram_top(ulong total_size)
 303 {
 304 #ifdef CONFIG_SYS_SDRAM_BASE
 305         /*
 306          * Detect whether we have so much RAM that it goes past the end of our
 307          * 32-bit address space. If so, clip the usable RAM so it doesn't.
 308          */
 309         if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
 310                 /*
 311                  * Will wrap back to top of 32-bit space when reservations
 312                  * are made.
 313                  */
 314                 return 0;
 315 #endif
 316         return gd->ram_top;
 317 }
 318
 319 __weak phys_size_t board_reserve_ram_top(phys_size_t ram_size)
 320 {
 321 #ifdef CONFIG_SYS_MEM_TOP_HIDE
 322         return ram_size - CONFIG_SYS_MEM_TOP_HIDE;
 323 #else
 324         return ram_size;
 325 #endif
 326 }
 327
 328 static int setup_dest_addr(void)
 329 {
 330         debug("Monitor len: %08lX\n", gd->mon_len);
 331         /*
 332          * Ram is setup, size stored in gd !!
 333          */
 334         debug("Ram size: %08lX\n", (ulong)gd->ram_size);
 335 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
 336         /* Reserve memory for secure MMU tables, and/or security monitor */
 337         gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
 338         /*
 339          * Record secure memory location. Need recalcuate if memory splits
 340          * into banks, or the ram base is not zero.
 341          */
 342         gd->secure_ram = gd->ram_size;
 343 #endif
 344         /*
 345          * Subtract specified amount of memory to hide so that it won't
 346          * get "touched" at all by U-Boot. By fixing up gd->ram_size
 347          * the Linux kernel should now get passed the now "corrected"
 348          * memory size and won't touch it either. This has been used
 349          * by arch/powerpc exclusively. Now ARMv8 takes advantage of
 350          * thie mechanism. If memory is split into banks, addresses
 351          * need to be calculated.
 352          */
 353         gd->ram_size = board_reserve_ram_top(gd->ram_size);
 354
 355 #ifdef CONFIG_SYS_SDRAM_BASE
 356         gd->ram_top = CONFIG_SYS_SDRAM_BASE;
 357 #endif
 358         gd->ram_top += get_effective_memsize();
 359         gd->ram_top = board_get_usable_ram_top(gd->mon_len);
 360         gd->relocaddr = gd->ram_top;
 361         debug("Ram top: %08lX\n", (ulong)gd->ram_top);
 362 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 363         /*
 364          * We need to make sure the location we intend to put secondary core
 365          * boot code is reserved and not used by any part of u-boot
 366          */
 367         if (gd->relocaddr > determine_mp_bootpg(NULL)) {
 368                 gd->relocaddr = determine_mp_bootpg(NULL);
 369                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
 370         }
 371 #endif
 372         return 0;
 373 }
 374
 375 #if defined(CONFIG_SPARC)
 376 static int reserve_prom(void)
 377 {
 378         /* defined in arch/sparc/cpu/leon?/prom.c */
 379         extern void *__prom_start_reloc;
 380         int size = 8192; /* page table = 2k, prom = 6k */
 381         gd->relocaddr -= size;
 382         __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
 383         debug("Reserving %dk for PROM and page table at %08lx\n", size,
 384                 gd->relocaddr);
 385         return 0;
 386 }
 387 #endif
 388
 389 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 390 static int reserve_logbuffer(void)
 391 {
 392         /* reserve kernel log buffer */
 393         gd->relocaddr -= LOGBUFF_RESERVE;
 394         debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
 395                 gd->relocaddr);
 396         return 0;
 397 }
 398 #endif
 399
 400 #ifdef CONFIG_PRAM
 401 /* reserve protected RAM */
 402 static int reserve_pram(void)
 403 {
 404         ulong reg;
 405
 406         reg = getenv_ulong("pram", 10, CONFIG_PRAM);
 407         gd->relocaddr -= (reg << 10);           /* size is in kB */
 408         debug("Reserving %ldk for protected RAM at %08lx\n", reg,
 409               gd->relocaddr);
 410         return 0;
 411 }
 412 #endif /* CONFIG_PRAM */
 413
 414 /* Round memory pointer down to next 4 kB limit */
 415 static int reserve_round_4k(void)
 416 {
 417         gd->relocaddr &= ~(4096 - 1);
 418         return 0;
 419 }
 420
 421 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 422                 defined(CONFIG_ARM)
 423 static int reserve_mmu(void)
 424 {
 425         /* reserve TLB table */
 426         gd->arch.tlb_size = PGTABLE_SIZE;
 427         gd->relocaddr -= gd->arch.tlb_size;
 428
 429         /* round down to next 64 kB limit */
 430         gd->relocaddr &= ~(0x10000 - 1);
 431
 432         gd->arch.tlb_addr = gd->relocaddr;
 433         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 434               gd->arch.tlb_addr + gd->arch.tlb_size);
 435         return 0;
 436 }
 437 #endif
 438
 439 #ifdef CONFIG_DM_VIDEO
 440 static int reserve_video(void)
 441 {
 442         ulong addr;
 443         int ret;
 444
 445         addr = gd->relocaddr;
 446         ret = video_reserve(&addr);
 447         if (ret)
 448                 return ret;
 449         gd->relocaddr = addr;
 450
 451         return 0;
 452 }
 453 #else
 454
 455 # ifdef CONFIG_LCD
 456 static int reserve_lcd(void)
 457 {
 458 #  ifdef CONFIG_FB_ADDR
 459         gd->fb_base = CONFIG_FB_ADDR;
 460 #  else
 461         /* reserve memory for LCD display (always full pages) */
 462         gd->relocaddr = lcd_setmem(gd->relocaddr);
 463         gd->fb_base = gd->relocaddr;
 464 #  endif /* CONFIG_FB_ADDR */
 465
 466         return 0;
 467 }
 468 # endif /* CONFIG_LCD */
 469
 470 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 471                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 472                 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
 473 static int reserve_legacy_video(void)
 474 {
 475         /* reserve memory for video display (always full pages) */
 476         gd->relocaddr = video_setmem(gd->relocaddr);
 477         gd->fb_base = gd->relocaddr;
 478
 479         return 0;
 480 }
 481 # endif
 482 #endif /* !CONFIG_DM_VIDEO */
 483
 484 static int reserve_trace(void)
 485 {
 486 #ifdef CONFIG_TRACE
 487         gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
 488         gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
 489         debug("Reserving %dk for trace data at: %08lx\n",
 490               CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
 491 #endif
 492
 493         return 0;
 494 }
 495
 496 static int reserve_uboot(void)
 497 {
 498         /*
 499          * reserve memory for U-Boot code, data & bss
 500          * round down to next 4 kB limit
 501          */
 502         gd->relocaddr -= gd->mon_len;
 503         gd->relocaddr &= ~(4096 - 1);
 504 #ifdef CONFIG_E500
 505         /* round down to next 64 kB limit so that IVPR stays aligned */
 506         gd->relocaddr &= ~(65536 - 1);
 507 #endif
 508
 509         debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
 510               gd->relocaddr);
 511
 512         gd->start_addr_sp = gd->relocaddr;
 513
 514         return 0;
 515 }
 516
 517 #ifndef CONFIG_SPL_BUILD
 518 /* reserve memory for malloc() area */
 519 static int reserve_malloc(void)
 520 {
 521         gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
 522         debug("Reserving %dk for malloc() at: %08lx\n",
 523                         TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
 524         return 0;
 525 }
 526
 527 /* (permanently) allocate a Board Info struct */
 528 static int reserve_board(void)
 529 {
 530         if (!gd->bd) {
 531                 gd->start_addr_sp -= sizeof(bd_t);
 532                 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 533                 memset(gd->bd, '\0', sizeof(bd_t));
 534                 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 535                       sizeof(bd_t), gd->start_addr_sp);
 536         }
 537         return 0;
 538 }
 539 #endif
 540
 541 static int setup_machine(void)
 542 {
 543 #ifdef CONFIG_MACH_TYPE
 544         gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
 545 #endif
 546         return 0;
 547 }
 548
 549 static int reserve_global_data(void)
 550 {
 551         gd->start_addr_sp -= sizeof(gd_t);
 552         gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
 553         debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 554                         sizeof(gd_t), gd->start_addr_sp);
 555         return 0;
 556 }
 557
 558 static int reserve_fdt(void)
 559 {
 560 #ifndef CONFIG_OF_EMBED
 561         /*
 562          * If the device tree is sitting immediately above our image then we
 563          * must relocate it. If it is embedded in the data section, then it
 564          * will be relocated with other data.
 565          */
 566         if (gd->fdt_blob) {
 567                 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
 568
 569                 gd->start_addr_sp -= gd->fdt_size;
 570                 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
 571                 debug("Reserving %lu Bytes for FDT at: %08lx\n",
 572                       gd->fdt_size, gd->start_addr_sp);
 573         }
 574 #endif
 575
 576         return 0;
 577 }
 578
 579 int arch_reserve_stacks(void)
 580 {
 581         return 0;
 582 }
 583
 584 static int reserve_stacks(void)
 585 {
 586         /* make stack pointer 16-byte aligned */
 587         gd->start_addr_sp -= 16;
 588         gd->start_addr_sp &= ~0xf;
 589
 590         /*
 591          * let the architecture-specific code tailor gd->start_addr_sp and
 592          * gd->irq_sp
 593          */
 594         return arch_reserve_stacks();
 595 }
 596
 597 static int display_new_sp(void)
 598 {
 599         debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
 600
 601         return 0;
 602 }
 603
 604 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
 605 static int setup_board_part1(void)
 606 {
 607         bd_t *bd = gd->bd;
 608
 609         /*
 610          * Save local variables to board info struct
 611          */
 612         bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 613         bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 614
 615 #ifdef CONFIG_SYS_SRAM_BASE
 616         bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 617         bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 618 #endif
 619
 620 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
 621                 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 622         bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 623 #endif
 624 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
 625         bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 626 #endif
 627 #if defined(CONFIG_MPC83xx)
 628         bd->bi_immrbar = CONFIG_SYS_IMMR;
 629 #endif
 630
 631         return 0;
 632 }
 633 #endif
 634
 635 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 636 static int setup_board_part2(void)
 637 {
 638         bd_t *bd = gd->bd;
 639
 640         bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 641         bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 642 #if defined(CONFIG_CPM2)
 643         bd->bi_cpmfreq = gd->arch.cpm_clk;
 644         bd->bi_brgfreq = gd->arch.brg_clk;
 645         bd->bi_sccfreq = gd->arch.scc_clk;
 646         bd->bi_vco = gd->arch.vco_out;
 647 #endif /* CONFIG_CPM2 */
 648 #if defined(CONFIG_MPC512X)
 649         bd->bi_ipsfreq = gd->arch.ips_clk;
 650 #endif /* CONFIG_MPC512X */
 651 #if defined(CONFIG_MPC5xxx)
 652         bd->bi_ipbfreq = gd->arch.ipb_clk;
 653         bd->bi_pcifreq = gd->pci_clk;
 654 #endif /* CONFIG_MPC5xxx */
 655 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
 656         bd->bi_pcifreq = gd->pci_clk;
 657 #endif
 658 #if defined(CONFIG_EXTRA_CLOCK)
 659         bd->bi_inpfreq = gd->arch.inp_clk;      /* input Freq in Hz */
 660         bd->bi_vcofreq = gd->arch.vco_clk;      /* vco Freq in Hz */
 661         bd->bi_flbfreq = gd->arch.flb_clk;      /* flexbus Freq in Hz */
 662 #endif
 663
 664         return 0;
 665 }
 666 #endif
 667
 668 #ifdef CONFIG_SYS_EXTBDINFO
 669 static int setup_board_extra(void)
 670 {
 671         bd_t *bd = gd->bd;
 672
 673         strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
 674         strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
 675                 sizeof(bd->bi_r_version));
 676
 677         bd->bi_procfreq = gd->cpu_clk;  /* Processor Speed, In Hz */
 678         bd->bi_plb_busfreq = gd->bus_clk;
 679 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
 680                 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
 681                 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 682         bd->bi_pci_busfreq = get_PCI_freq();
 683         bd->bi_opbfreq = get_OPB_freq();
 684 #elif defined(CONFIG_XILINX_405)
 685         bd->bi_pci_busfreq = get_PCI_freq();
 686 #endif
 687
 688         return 0;
 689 }
 690 #endif
 691
 692 #ifdef CONFIG_POST
 693 static int init_post(void)
 694 {
 695         post_bootmode_init();
 696         post_run(NULL, POST_ROM | post_bootmode_get(0));
 697
 698         return 0;
 699 }
 700 #endif
 701
 702 static int setup_dram_config(void)
 703 {
 704         /* Ram is board specific, so move it to board code ... */
 705         dram_init_banksize();
 706
 707         return 0;
 708 }
 709
 710 static int reloc_fdt(void)
 711 {
 712 #ifndef CONFIG_OF_EMBED
 713         if (gd->flags & GD_FLG_SKIP_RELOC)
 714                 return 0;
 715         if (gd->new_fdt) {
 716                 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 717                 gd->fdt_blob = gd->new_fdt;
 718         }
 719 #endif
 720
 721         return 0;
 722 }
 723
 724 static int setup_reloc(void)
 725 {
 726         if (gd->flags & GD_FLG_SKIP_RELOC) {
 727                 debug("Skipping relocation due to flag\n");
 728                 return 0;
 729         }
 730
 731 #ifdef CONFIG_SYS_TEXT_BASE
 732         gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 733 #ifdef CONFIG_M68K
 734         /*
 735          * On all ColdFire arch cpu, monitor code starts always
 736          * just after the default vector table location, so at 0x400
 737          */
 738         gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
 739 #endif
 740 #endif
 741         memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 742
 743         debug("Relocation Offset is: %08lx\n", gd->reloc_off);
 744         debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 745               gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 746               gd->start_addr_sp);
 747
 748         return 0;
 749 }
 750
 751 /* ARM calls relocate_code from its crt0.S */
 752 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
 753
 754 static int jump_to_copy(void)
 755 {
 756         if (gd->flags & GD_FLG_SKIP_RELOC)
 757                 return 0;
 758         /*
 759          * x86 is special, but in a nice way. It uses a trampoline which
 760          * enables the dcache if possible.
 761          *
 762          * For now, other archs use relocate_code(), which is implemented
 763          * similarly for all archs. When we do generic relocation, hopefully
 764          * we can make all archs enable the dcache prior to relocation.
 765          */
 766 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 767         /*
 768          * SDRAM and console are now initialised. The final stack can now
 769          * be setup in SDRAM. Code execution will continue in Flash, but
 770          * with the stack in SDRAM and Global Data in temporary memory
 771          * (CPU cache)
 772          */
 773         arch_setup_gd(gd->new_gd);
 774         board_init_f_r_trampoline(gd->start_addr_sp);
 775 #else
 776         relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 777 #endif
 778
 779         return 0;
 780 }
 781 #endif
 782
 783 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
 784 static int mark_bootstage(void)
 785 {
 786         bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
 787
 788         return 0;
 789 }
 790
 791 static int initf_console_record(void)
 792 {
 793 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
 794         return console_record_init();
 795 #else
 796         return 0;
 797 #endif
 798 }
 799
 800 static int initf_dm(void)
 801 {
 802 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
 803         int ret;
 804
 805         ret = dm_init_and_scan(true);
 806         if (ret)
 807                 return ret;
 808 #endif
 809 #ifdef CONFIG_TIMER_EARLY
 810         ret = dm_timer_init();
 811         if (ret)
 812                 return ret;
 813 #endif
 814
 815         return 0;
 816 }
 817
 818 /* Architecture-specific memory reservation */
 819 __weak int reserve_arch(void)
 820 {
 821         return 0;
 822 }
 823
 824 __weak int arch_cpu_init_dm(void)
 825 {
 826         return 0;
 827 }
 828
 829 static init_fnc_t init_sequence_f[] = {
 830 #ifdef CONFIG_SANDBOX
 831         setup_ram_buf,
 832 #endif
 833         setup_mon_len,
 834 #ifdef CONFIG_OF_CONTROL
 835         fdtdec_setup,
 836 #endif
 837 #ifdef CONFIG_TRACE
 838         trace_early_init,
 839 #endif
 840         initf_malloc,
 841         initf_console_record,
 842 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 843         /* TODO: can this go into arch_cpu_init()? */
 844         probecpu,
 845 #endif
 846 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
 847         x86_fsp_init,
 848 #endif
 849         arch_cpu_init,          /* basic arch cpu dependent setup */
 850         initf_dm,
 851         arch_cpu_init_dm,
 852         mark_bootstage,         /* need timer, go after init dm */
 853 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 854         board_early_init_f,
 855 #endif
 856         /* TODO: can any of this go into arch_cpu_init()? */
 857 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
 858         get_clocks,             /* get CPU and bus clocks (etc.) */
 859 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
 860                 && !defined(CONFIG_TQM885D)
 861         adjust_sdram_tbs_8xx,
 862 #endif
 863         /* TODO: can we rename this to timer_init()? */
 864         init_timebase,
 865 #endif
 866 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
 867                 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
 868                 defined(CONFIG_SPARC)
 869         timer_init,             /* initialize timer */
 870 #endif
 871 #ifdef CONFIG_SYS_ALLOC_DPRAM
 872 #if !defined(CONFIG_CPM2)
 873         dpram_init,
 874 #endif
 875 #endif
 876 #if defined(CONFIG_BOARD_POSTCLK_INIT)
 877         board_postclk_init,
 878 #endif
 879 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
 880         get_clocks,
 881 #endif
 882         env_init,               /* initialize environment */
 883 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
 884         /* get CPU and bus clocks according to the environment variable */
 885         get_clocks_866,
 886         /* adjust sdram refresh rate according to the new clock */
 887         sdram_adjust_866,
 888         init_timebase,
 889 #endif
 890         init_baud_rate,         /* initialze baudrate settings */
 891         serial_init,            /* serial communications setup */
 892         console_init_f,         /* stage 1 init of console */
 893 #ifdef CONFIG_SANDBOX
 894         sandbox_early_getopt_check,
 895 #endif
 896 #ifdef CONFIG_OF_CONTROL
 897         fdtdec_prepare_fdt,
 898 #endif
 899         display_options,        /* say that we are here */
 900         display_text_info,      /* show debugging info if required */
 901 #if defined(CONFIG_MPC8260)
 902         prt_8260_rsr,
 903         prt_8260_clks,
 904 #endif /* CONFIG_MPC8260 */
 905 #if defined(CONFIG_MPC83xx)
 906         prt_83xx_rsr,
 907 #endif
 908 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 909         checkcpu,
 910 #endif
 911         print_cpuinfo,          /* display cpu info (and speed) */
 912 #if defined(CONFIG_MPC5xxx)
 913         prt_mpc5xxx_clks,
 914 #endif /* CONFIG_MPC5xxx */
 915 #if defined(CONFIG_DISPLAY_BOARDINFO)
 916         show_board_info,
 917 #endif
 918         INIT_FUNC_WATCHDOG_INIT
 919 #if defined(CONFIG_MISC_INIT_F)
 920         misc_init_f,
 921 #endif
 922         INIT_FUNC_WATCHDOG_RESET
 923 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
 924         init_func_i2c,
 925 #endif
 926 #if defined(CONFIG_HARD_SPI)
 927         init_func_spi,
 928 #endif
 929         announce_dram_init,
 930         /* TODO: unify all these dram functions? */
 931 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
 932                 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
 933         dram_init,              /* configure available RAM banks */
 934 #endif
 935 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
 936         init_func_ram,
 937 #endif
 938 #ifdef CONFIG_POST
 939         post_init_f,
 940 #endif
 941         INIT_FUNC_WATCHDOG_RESET
 942 #if defined(CONFIG_SYS_DRAM_TEST)
 943         testdram,
 944 #endif /* CONFIG_SYS_DRAM_TEST */
 945         INIT_FUNC_WATCHDOG_RESET
 946
 947 #ifdef CONFIG_POST
 948         init_post,
 949 #endif
 950         INIT_FUNC_WATCHDOG_RESET
 951         /*
 952          * Now that we have DRAM mapped and working, we can
 953          * relocate the code and continue running from DRAM.
 954          *
 955          * Reserve memory at end of RAM for (top down in that order):
 956          *  - area that won't get touched by U-Boot and Linux (optional)
 957          *  - kernel log buffer
 958          *  - protected RAM
 959          *  - LCD framebuffer
 960          *  - monitor code
 961          *  - board info struct
 962          */
 963         setup_dest_addr,
 964 #if defined(CONFIG_BLACKFIN)
 965         /* Blackfin u-boot monitor should be on top of the ram */
 966         reserve_uboot,
 967 #endif
 968 #if defined(CONFIG_SPARC)
 969         reserve_prom,
 970 #endif
 971 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 972         reserve_logbuffer,
 973 #endif
 974 #ifdef CONFIG_PRAM
 975         reserve_pram,
 976 #endif
 977         reserve_round_4k,
 978 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
 979                 defined(CONFIG_ARM)
 980         reserve_mmu,
 981 #endif
 982 #ifdef CONFIG_DM_VIDEO
 983         reserve_video,
 984 #else
 985 # ifdef CONFIG_LCD
 986         reserve_lcd,
 987 # endif
 988         /* TODO: Why the dependency on CONFIG_8xx? */
 989 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
 990                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 991                 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
 992         reserve_legacy_video,
 993 # endif
 994 #endif /* CONFIG_DM_VIDEO */
 995         reserve_trace,
 996 #if !defined(CONFIG_BLACKFIN)
 997         reserve_uboot,
 998 #endif
 999 #ifndef CONFIG_SPL_BUILD
1000         reserve_malloc,
1001         reserve_board,
1002 #endif
1003         setup_machine,
1004         reserve_global_data,
1005         reserve_fdt,
1006         reserve_arch,
1007         reserve_stacks,
1008         setup_dram_config,
1009         show_dram_config,
1010 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
1011         setup_board_part1,
1012 #endif
1013 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
1014         INIT_FUNC_WATCHDOG_RESET
1015         setup_board_part2,
1016 #endif
1017         display_new_sp,
1018 #ifdef CONFIG_SYS_EXTBDINFO
1019         setup_board_extra,
1020 #endif
1021         INIT_FUNC_WATCHDOG_RESET
1022         reloc_fdt,
1023         setup_reloc,
1024 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1025         copy_uboot_to_ram,
1026         clear_bss,
1027         do_elf_reloc_fixups,
1028 #endif
1029 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1030         jump_to_copy,
1031 #endif
1032         NULL,
1033 };
1034
1035 void board_init_f(ulong boot_flags)
1036 {
1037 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1038         /*
1039          * For some archtectures, global data is initialized and used before
1040          * calling this function. The data should be preserved. For others,
1041          * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1042          * here to host global data until relocation.
1043          */
1044         gd_t data;
1045
1046         gd = &data;
1047
1048         /*
1049          * Clear global data before it is accessed at debug print
1050          * in initcall_run_list. Otherwise the debug print probably
1051          * get the wrong vaule of gd->have_console.
1052          */
1053         zero_global_data();
1054 #endif
1055
1056         gd->flags = boot_flags;
1057         gd->have_console = 0;
1058
1059         if (initcall_run_list(init_sequence_f))
1060                 hang();
1061
1062 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1063                 !defined(CONFIG_EFI_APP)
1064         /* NOTREACHED - jump_to_copy() does not return */
1065         hang();
1066 #endif
1067 }
1068
1069 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1070 /*
1071  * For now this code is only used on x86.
1072  *
1073  * init_sequence_f_r is the list of init functions which are run when
1074  * U-Boot is executing from Flash with a semi-limited 'C' environment.
1075  * The following limitations must be considered when implementing an
1076  * '_f_r' function:
1077  *  - 'static' variables are read-only
1078  *  - Global Data (gd->xxx) is read/write
1079  *
1080  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1081  * supported).  It _should_, if possible, copy global data to RAM and
1082  * initialise the CPU caches (to speed up the relocation process)
1083  *
1084  * NOTE: At present only x86 uses this route, but it is intended that
1085  * all archs will move to this when generic relocation is implemented.
1086  */
1087 static init_fnc_t init_sequence_f_r[] = {
1088         init_cache_f_r,
1089
1090         NULL,
1091 };
1092
1093 void board_init_f_r(void)
1094 {
1095         if (initcall_run_list(init_sequence_f_r))
1096                 hang();
1097
1098         /*
1099          * The pre-relocation drivers may be using memory that has now gone
1100          * away. Mark serial as unavailable - this will fall back to the debug
1101          * UART if available.
1102          */
1103         gd->flags &= ~GD_FLG_SERIAL_READY;
1104
1105         /*
1106          * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1107          * Transfer execution from Flash to RAM by calculating the address
1108          * of the in-RAM copy of board_init_r() and calling it
1109          */
1110         (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1111
1112         /* NOTREACHED - board_init_r() does not return */
1113         hang();
1114 }
1115 #endif /* CONFIG_X86 */