common/board_f.c

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2002-2006
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Marius Groeger <mgroeger@sysgo.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #include <common.h>
  14 #include <console.h>
  15 #include <environment.h>
  16 #include <dm.h>
  17 #include <fdtdec.h>
  18 #include <fs.h>
  19 #include <i2c.h>
  20 #include <initcall.h>
  21 #include <init_helpers.h>
  22 #include <malloc.h>
  23 #include <mapmem.h>
  24 #include <os.h>
  25 #include <post.h>
  26 #include <relocate.h>
  27 #include <spi.h>
  28 #include <status_led.h>
  29 #include <timer.h>
  30 #include <trace.h>
  31 #include <video.h>
  32 #include <watchdog.h>
  33 #ifdef CONFIG_MACH_TYPE
  34 #include <asm/mach-types.h>
  35 #endif
  36 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  37 #include <asm/mp.h>
  38 #endif
  39 #include <asm/io.h>
  40 #include <asm/sections.h>
  41 #include <dm/root.h>
  42 #include <linux/errno.h>
  43
  44 /*
  45  * Pointer to initial global data area
  46  *
  47  * Here we initialize it if needed.
  48  */
  49 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  50 #undef  XTRN_DECLARE_GLOBAL_DATA_PTR
  51 #define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
  52 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  53 #else
  54 DECLARE_GLOBAL_DATA_PTR;
  55 #endif
  56
  57 /*
  58  * TODO(sjg@chromium.org): IMO this code should be
  59  * refactored to a single function, something like:
  60  *
  61  * void led_set_state(enum led_colour_t colour, int on);
  62  */
  63 /************************************************************************
  64  * Coloured LED functionality
  65  ************************************************************************
  66  * May be supplied by boards if desired
  67  */
  68 __weak void coloured_LED_init(void) {}
  69 __weak void red_led_on(void) {}
  70 __weak void red_led_off(void) {}
  71 __weak void green_led_on(void) {}
  72 __weak void green_led_off(void) {}
  73 __weak void yellow_led_on(void) {}
  74 __weak void yellow_led_off(void) {}
  75 __weak void blue_led_on(void) {}
  76 __weak void blue_led_off(void) {}
  77
  78 /*
  79  * Why is gd allocated a register? Prior to reloc it might be better to
  80  * just pass it around to each function in this file?
  81  *
  82  * After reloc one could argue that it is hardly used and doesn't need
  83  * to be in a register. Or if it is it should perhaps hold pointers to all
  84  * global data for all modules, so that post-reloc we can avoid the massive
  85  * literal pool we get on ARM. Or perhaps just encourage each module to use
  86  * a structure...
  87  */
  88
  89 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  90 static int init_func_watchdog_init(void)
  91 {
  92 # if defined(CONFIG_HW_WATCHDOG) && \
  93         (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  94         defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
  95         defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  96         defined(CONFIG_IMX_WATCHDOG))
  97         hw_watchdog_init();
  98         puts("       Watchdog enabled\n");
  99 # endif
 100         WATCHDOG_RESET();
 101
 102         return 0;
 103 }
 104
 105 int init_func_watchdog_reset(void)
 106 {
 107         WATCHDOG_RESET();
 108
 109         return 0;
 110 }
 111 #endif /* CONFIG_WATCHDOG */
 112
 113 __weak void board_add_ram_info(int use_default)
 114 {
 115         /* please define platform specific board_add_ram_info() */
 116 }
 117
 118 static int init_baud_rate(void)
 119 {
 120         gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
 121         return 0;
 122 }
 123
 124 static int display_text_info(void)
 125 {
 126 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
 127         ulong bss_start, bss_end, text_base;
 128
 129         bss_start = (ulong)&__bss_start;
 130         bss_end = (ulong)&__bss_end;
 131
 132 #ifdef CONFIG_SYS_TEXT_BASE
 133         text_base = CONFIG_SYS_TEXT_BASE;
 134 #else
 135         text_base = CONFIG_SYS_MONITOR_BASE;
 136 #endif
 137
 138         debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 139                 text_base, bss_start, bss_end);
 140 #endif
 141
 142         return 0;
 143 }
 144
 145 static int announce_dram_init(void)
 146 {
 147         puts("DRAM:  ");
 148         return 0;
 149 }
 150
 151 static int show_dram_config(void)
 152 {
 153         unsigned long long size;
 154
 155 #ifdef CONFIG_NR_DRAM_BANKS
 156         int i;
 157
 158         debug("\nRAM Configuration:\n");
 159         for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 160                 size += gd->bd->bi_dram[i].size;
 161                 debug("Bank #%d: %llx ", i,
 162                       (unsigned long long)(gd->bd->bi_dram[i].start));
 163 #ifdef DEBUG
 164                 print_size(gd->bd->bi_dram[i].size, "\n");
 165 #endif
 166         }
 167         debug("\nDRAM:  ");
 168 #else
 169         size = gd->ram_size;
 170 #endif
 171
 172         print_size(size, "");
 173         board_add_ram_info(0);
 174         putc('\n');
 175
 176         return 0;
 177 }
 178
 179 __weak int dram_init_banksize(void)
 180 {
 181 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 182         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 183         gd->bd->bi_dram[0].size = get_effective_memsize();
 184 #endif
 185
 186         return 0;
 187 }
 188
 189 #if defined(CONFIG_SYS_I2C)
 190 static int init_func_i2c(void)
 191 {
 192         puts("I2C:   ");
 193 #ifdef CONFIG_SYS_I2C
 194         i2c_init_all();
 195 #else
 196         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 197 #endif
 198         puts("ready\n");
 199         return 0;
 200 }
 201 #endif
 202
 203 #if defined(CONFIG_HARD_SPI)
 204 static int init_func_spi(void)
 205 {
 206         puts("SPI:   ");
 207         spi_init();
 208         puts("ready\n");
 209         return 0;
 210 }
 211 #endif
 212
 213 static int setup_mon_len(void)
 214 {
 215 #if defined(__ARM__) || defined(__MICROBLAZE__)
 216         gd->mon_len = (ulong)&__bss_end - (ulong)_start;
 217 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
 218         gd->mon_len = (ulong)&_end - (ulong)_init;
 219 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
 220         gd->mon_len = CONFIG_SYS_MONITOR_LEN;
 221 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
 222         gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 223 #elif defined(CONFIG_SYS_MONITOR_BASE)
 224         /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 225         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
 226 #endif
 227         return 0;
 228 }
 229
 230 __weak int arch_cpu_init(void)
 231 {
 232         return 0;
 233 }
 234
 235 __weak int mach_cpu_init(void)
 236 {
 237         return 0;
 238 }
 239
 240 /* Get the top of usable RAM */
 241 __weak ulong board_get_usable_ram_top(ulong total_size)
 242 {
 243 #ifdef CONFIG_SYS_SDRAM_BASE
 244         /*
 245          * Detect whether we have so much RAM that it goes past the end of our
 246          * 32-bit address space. If so, clip the usable RAM so it doesn't.
 247          */
 248         if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
 249                 /*
 250                  * Will wrap back to top of 32-bit space when reservations
 251                  * are made.
 252                  */
 253                 return 0;
 254 #endif
 255         return gd->ram_top;
 256 }
 257
 258 static int setup_dest_addr(void)
 259 {
 260         debug("Monitor len: %08lX\n", gd->mon_len);
 261         /*
 262          * Ram is setup, size stored in gd !!
 263          */
 264         debug("Ram size: %08lX\n", (ulong)gd->ram_size);
 265 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
 266         /*
 267          * Subtract specified amount of memory to hide so that it won't
 268          * get "touched" at all by U-Boot. By fixing up gd->ram_size
 269          * the Linux kernel should now get passed the now "corrected"
 270          * memory size and won't touch it either. This should work
 271          * for arch/ppc and arch/powerpc. Only Linux board ports in
 272          * arch/powerpc with bootwrapper support, that recalculate the
 273          * memory size from the SDRAM controller setup will have to
 274          * get fixed.
 275          */
 276         gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
 277 #endif
 278 #ifdef CONFIG_SYS_SDRAM_BASE
 279         gd->ram_top = CONFIG_SYS_SDRAM_BASE;
 280 #endif
 281         gd->ram_top += get_effective_memsize();
 282         gd->ram_top = board_get_usable_ram_top(gd->mon_len);
 283         gd->relocaddr = gd->ram_top;
 284         debug("Ram top: %08lX\n", (ulong)gd->ram_top);
 285 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 286         /*
 287          * We need to make sure the location we intend to put secondary core
 288          * boot code is reserved and not used by any part of u-boot
 289          */
 290         if (gd->relocaddr > determine_mp_bootpg(NULL)) {
 291                 gd->relocaddr = determine_mp_bootpg(NULL);
 292                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
 293         }
 294 #endif
 295         return 0;
 296 }
 297
 298 #ifdef CONFIG_PRAM
 299 /* reserve protected RAM */
 300 static int reserve_pram(void)
 301 {
 302         ulong reg;
 303
 304         reg = env_get_ulong("pram", 10, CONFIG_PRAM);
 305         gd->relocaddr -= (reg << 10);           /* size is in kB */
 306         debug("Reserving %ldk for protected RAM at %08lx\n", reg,
 307               gd->relocaddr);
 308         return 0;
 309 }
 310 #endif /* CONFIG_PRAM */
 311
 312 /* Round memory pointer down to next 4 kB limit */
 313 static int reserve_round_4k(void)
 314 {
 315         gd->relocaddr &= ~(4096 - 1);
 316         return 0;
 317 }
 318
 319 #ifdef CONFIG_ARM
 320 __weak int reserve_mmu(void)
 321 {
 322 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 323         /* reserve TLB table */
 324         gd->arch.tlb_size = PGTABLE_SIZE;
 325         gd->relocaddr -= gd->arch.tlb_size;
 326
 327         /* round down to next 64 kB limit */
 328         gd->relocaddr &= ~(0x10000 - 1);
 329
 330         gd->arch.tlb_addr = gd->relocaddr;
 331         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 332               gd->arch.tlb_addr + gd->arch.tlb_size);
 333
 334 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
 335         /*
 336          * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
 337          * with location within secure ram.
 338          */
 339         gd->arch.tlb_allocated = gd->arch.tlb_addr;
 340 #endif
 341 #endif
 342
 343         return 0;
 344 }
 345 #endif
 346
 347 static int reserve_video(void)
 348 {
 349 #ifdef CONFIG_DM_VIDEO
 350         ulong addr;
 351         int ret;
 352
 353         addr = gd->relocaddr;
 354         ret = video_reserve(&addr);
 355         if (ret)
 356                 return ret;
 357         gd->relocaddr = addr;
 358 #elif defined(CONFIG_LCD)
 359 #  ifdef CONFIG_FB_ADDR
 360         gd->fb_base = CONFIG_FB_ADDR;
 361 #  else
 362         /* reserve memory for LCD display (always full pages) */
 363         gd->relocaddr = lcd_setmem(gd->relocaddr);
 364         gd->fb_base = gd->relocaddr;
 365 #  endif /* CONFIG_FB_ADDR */
 366 #elif defined(CONFIG_VIDEO) && \
 367                 (!defined(CONFIG_PPC)) && \
 368                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 369                 !defined(CONFIG_M68K)
 370         /* reserve memory for video display (always full pages) */
 371         gd->relocaddr = video_setmem(gd->relocaddr);
 372         gd->fb_base = gd->relocaddr;
 373 #endif
 374
 375         return 0;
 376 }
 377
 378 static int reserve_trace(void)
 379 {
 380 #ifdef CONFIG_TRACE
 381         gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
 382         gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
 383         debug("Reserving %dk for trace data at: %08lx\n",
 384               CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
 385 #endif
 386
 387         return 0;
 388 }
 389
 390 static int reserve_uboot(void)
 391 {
 392         /*
 393          * reserve memory for U-Boot code, data & bss
 394          * round down to next 4 kB limit
 395          */
 396         gd->relocaddr -= gd->mon_len;
 397         gd->relocaddr &= ~(4096 - 1);
 398 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
 399         /* round down to next 64 kB limit so that IVPR stays aligned */
 400         gd->relocaddr &= ~(65536 - 1);
 401 #endif
 402
 403         debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
 404               gd->relocaddr);
 405
 406         gd->start_addr_sp = gd->relocaddr;
 407
 408         return 0;
 409 }
 410
 411 /* reserve memory for malloc() area */
 412 static int reserve_malloc(void)
 413 {
 414         gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
 415         debug("Reserving %dk for malloc() at: %08lx\n",
 416                         TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
 417         return 0;
 418 }
 419
 420 /* (permanently) allocate a Board Info struct */
 421 static int reserve_board(void)
 422 {
 423         if (!gd->bd) {
 424                 gd->start_addr_sp -= sizeof(bd_t);
 425                 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 426                 memset(gd->bd, '\0', sizeof(bd_t));
 427                 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 428                       sizeof(bd_t), gd->start_addr_sp);
 429         }
 430         return 0;
 431 }
 432
 433 static int setup_machine(void)
 434 {
 435 #ifdef CONFIG_MACH_TYPE
 436         gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
 437 #endif
 438         return 0;
 439 }
 440
 441 static int reserve_global_data(void)
 442 {
 443         gd->start_addr_sp -= sizeof(gd_t);
 444         gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
 445         debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 446                         sizeof(gd_t), gd->start_addr_sp);
 447         return 0;
 448 }
 449
 450 static int reserve_fdt(void)
 451 {
 452 #ifndef CONFIG_OF_EMBED
 453         /*
 454          * If the device tree is sitting immediately above our image then we
 455          * must relocate it. If it is embedded in the data section, then it
 456          * will be relocated with other data.
 457          */
 458         if (gd->fdt_blob) {
 459                 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
 460
 461                 gd->start_addr_sp -= gd->fdt_size;
 462                 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
 463                 debug("Reserving %lu Bytes for FDT at: %08lx\n",
 464                       gd->fdt_size, gd->start_addr_sp);
 465         }
 466 #endif
 467
 468         return 0;
 469 }
 470
 471 static int reserve_bootstage(void)
 472 {
 473 #ifdef CONFIG_BOOTSTAGE
 474         int size = bootstage_get_size();
 475
 476         gd->start_addr_sp -= size;
 477         gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
 478         debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
 479               gd->start_addr_sp);
 480 #endif
 481
 482         return 0;
 483 }
 484
 485 int arch_reserve_stacks(void)
 486 {
 487         return 0;
 488 }
 489
 490 static int reserve_stacks(void)
 491 {
 492         /* make stack pointer 16-byte aligned */
 493         gd->start_addr_sp -= 16;
 494         gd->start_addr_sp &= ~0xf;
 495
 496         /*
 497          * let the architecture-specific code tailor gd->start_addr_sp and
 498          * gd->irq_sp
 499          */
 500         return arch_reserve_stacks();
 501 }
 502
 503 static int display_new_sp(void)
 504 {
 505         debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
 506
 507         return 0;
 508 }
 509
 510 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 511         defined(CONFIG_SH)
 512 static int setup_board_part1(void)
 513 {
 514         bd_t *bd = gd->bd;
 515
 516         /*
 517          * Save local variables to board info struct
 518          */
 519         bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 520         bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 521
 522 #ifdef CONFIG_SYS_SRAM_BASE
 523         bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 524         bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 525 #endif
 526
 527 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 528         bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 529 #endif
 530 #if defined(CONFIG_M68K)
 531         bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 532 #endif
 533 #if defined(CONFIG_MPC83xx)
 534         bd->bi_immrbar = CONFIG_SYS_IMMR;
 535 #endif
 536
 537         return 0;
 538 }
 539 #endif
 540
 541 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 542 static int setup_board_part2(void)
 543 {
 544         bd_t *bd = gd->bd;
 545
 546         bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 547         bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 548 #if defined(CONFIG_CPM2)
 549         bd->bi_cpmfreq = gd->arch.cpm_clk;
 550         bd->bi_brgfreq = gd->arch.brg_clk;
 551         bd->bi_sccfreq = gd->arch.scc_clk;
 552         bd->bi_vco = gd->arch.vco_out;
 553 #endif /* CONFIG_CPM2 */
 554 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
 555         bd->bi_pcifreq = gd->pci_clk;
 556 #endif
 557 #if defined(CONFIG_EXTRA_CLOCK)
 558         bd->bi_inpfreq = gd->arch.inp_clk;      /* input Freq in Hz */
 559         bd->bi_vcofreq = gd->arch.vco_clk;      /* vco Freq in Hz */
 560         bd->bi_flbfreq = gd->arch.flb_clk;      /* flexbus Freq in Hz */
 561 #endif
 562
 563         return 0;
 564 }
 565 #endif
 566
 567 #ifdef CONFIG_POST
 568 static int init_post(void)
 569 {
 570         post_bootmode_init();
 571         post_run(NULL, POST_ROM | post_bootmode_get(0));
 572
 573         return 0;
 574 }
 575 #endif
 576
 577 static int reloc_fdt(void)
 578 {
 579 #ifndef CONFIG_OF_EMBED
 580         if (gd->flags & GD_FLG_SKIP_RELOC)
 581                 return 0;
 582         if (gd->new_fdt) {
 583                 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 584                 gd->fdt_blob = gd->new_fdt;
 585         }
 586 #endif
 587
 588         return 0;
 589 }
 590
 591 static int reloc_bootstage(void)
 592 {
 593 #ifdef CONFIG_BOOTSTAGE
 594         if (gd->flags & GD_FLG_SKIP_RELOC)
 595                 return 0;
 596         if (gd->new_bootstage) {
 597                 int size = bootstage_get_size();
 598
 599                 debug("Copying bootstage from %p to %p, size %x\n",
 600                       gd->bootstage, gd->new_bootstage, size);
 601                 memcpy(gd->new_bootstage, gd->bootstage, size);
 602                 gd->bootstage = gd->new_bootstage;
 603         }
 604 #endif
 605
 606         return 0;
 607 }
 608
 609 static int setup_reloc(void)
 610 {
 611         if (gd->flags & GD_FLG_SKIP_RELOC) {
 612                 debug("Skipping relocation due to flag\n");
 613                 return 0;
 614         }
 615
 616 #ifdef CONFIG_SYS_TEXT_BASE
 617 #ifdef ARM
 618         gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
 619 #elif defined(CONFIG_M68K)
 620         /*
 621          * On all ColdFire arch cpu, monitor code starts always
 622          * just after the default vector table location, so at 0x400
 623          */
 624         gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
 625 #else
 626         gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 627 #endif
 628 #endif
 629         memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 630
 631         debug("Relocation Offset is: %08lx\n", gd->reloc_off);
 632         debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 633               gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 634               gd->start_addr_sp);
 635
 636         return 0;
 637 }
 638
 639 #ifdef CONFIG_OF_BOARD_FIXUP
 640 static int fix_fdt(void)
 641 {
 642         return board_fix_fdt((void *)gd->fdt_blob);
 643 }
 644 #endif
 645
 646 /* ARM calls relocate_code from its crt0.S */
 647 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 648                 !CONFIG_IS_ENABLED(X86_64)
 649
 650 static int jump_to_copy(void)
 651 {
 652         if (gd->flags & GD_FLG_SKIP_RELOC)
 653                 return 0;
 654         /*
 655          * x86 is special, but in a nice way. It uses a trampoline which
 656          * enables the dcache if possible.
 657          *
 658          * For now, other archs use relocate_code(), which is implemented
 659          * similarly for all archs. When we do generic relocation, hopefully
 660          * we can make all archs enable the dcache prior to relocation.
 661          */
 662 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 663         /*
 664          * SDRAM and console are now initialised. The final stack can now
 665          * be setup in SDRAM. Code execution will continue in Flash, but
 666          * with the stack in SDRAM and Global Data in temporary memory
 667          * (CPU cache)
 668          */
 669         arch_setup_gd(gd->new_gd);
 670         board_init_f_r_trampoline(gd->start_addr_sp);
 671 #else
 672         relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 673 #endif
 674
 675         return 0;
 676 }
 677 #endif
 678
 679 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
 680 static int initf_bootstage(void)
 681 {
 682         bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
 683                         IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
 684         int ret;
 685
 686         ret = bootstage_init(!from_spl);
 687         if (ret)
 688                 return ret;
 689         if (from_spl) {
 690                 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
 691                                                CONFIG_BOOTSTAGE_STASH_SIZE);
 692
 693                 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
 694                 if (ret && ret != -ENOENT) {
 695                         debug("Failed to unstash bootstage: err=%d\n", ret);
 696                         return ret;
 697                 }
 698         }
 699
 700         bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
 701
 702         return 0;
 703 }
 704
 705 static int initf_console_record(void)
 706 {
 707 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
 708         return console_record_init();
 709 #else
 710         return 0;
 711 #endif
 712 }
 713
 714 static int initf_dm(void)
 715 {
 716 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
 717         int ret;
 718
 719         bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
 720         ret = dm_init_and_scan(true);
 721         bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
 722         if (ret)
 723                 return ret;
 724 #endif
 725 #ifdef CONFIG_TIMER_EARLY
 726         ret = dm_timer_init();
 727         if (ret)
 728                 return ret;
 729 #endif
 730
 731         return 0;
 732 }
 733
 734 /* Architecture-specific memory reservation */
 735 __weak int reserve_arch(void)
 736 {
 737         return 0;
 738 }
 739
 740 __weak int arch_cpu_init_dm(void)
 741 {
 742         return 0;
 743 }
 744
 745 static const init_fnc_t init_sequence_f[] = {
 746         setup_mon_len,
 747 #ifdef CONFIG_OF_CONTROL
 748         fdtdec_setup,
 749 #endif
 750 #ifdef CONFIG_TRACE
 751         trace_early_init,
 752 #endif
 753         initf_malloc,
 754         log_init,
 755         initf_bootstage,        /* uses its own timer, so does not need DM */
 756         initf_console_record,
 757 #if defined(CONFIG_HAVE_FSP)
 758         arch_fsp_init,
 759 #endif
 760         arch_cpu_init,          /* basic arch cpu dependent setup */
 761         mach_cpu_init,          /* SoC/machine dependent CPU setup */
 762         initf_dm,
 763         arch_cpu_init_dm,
 764 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 765         board_early_init_f,
 766 #endif
 767 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
 768         /* get CPU and bus clocks according to the environment variable */
 769         get_clocks,             /* get CPU and bus clocks (etc.) */
 770 #endif
 771 #if !defined(CONFIG_M68K)
 772         timer_init,             /* initialize timer */
 773 #endif
 774 #if defined(CONFIG_BOARD_POSTCLK_INIT)
 775         board_postclk_init,
 776 #endif
 777         env_init,               /* initialize environment */
 778         init_baud_rate,         /* initialze baudrate settings */
 779         serial_init,            /* serial communications setup */
 780         console_init_f,         /* stage 1 init of console */
 781         display_options,        /* say that we are here */
 782         display_text_info,      /* show debugging info if required */
 783 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
 784                 defined(CONFIG_X86)
 785         checkcpu,
 786 #endif
 787 #if defined(CONFIG_DISPLAY_CPUINFO)
 788         print_cpuinfo,          /* display cpu info (and speed) */
 789 #endif
 790 #if defined(CONFIG_DTB_RESELECT)
 791         embedded_dtb_select,
 792 #endif
 793 #if defined(CONFIG_DISPLAY_BOARDINFO)
 794         show_board_info,
 795 #endif
 796         INIT_FUNC_WATCHDOG_INIT
 797 #if defined(CONFIG_MISC_INIT_F)
 798         misc_init_f,
 799 #endif
 800         INIT_FUNC_WATCHDOG_RESET
 801 #if defined(CONFIG_SYS_I2C)
 802         init_func_i2c,
 803 #endif
 804 #if defined(CONFIG_HARD_SPI)
 805         init_func_spi,
 806 #endif
 807         announce_dram_init,
 808         dram_init,              /* configure available RAM banks */
 809 #ifdef CONFIG_POST
 810         post_init_f,
 811 #endif
 812         INIT_FUNC_WATCHDOG_RESET
 813 #if defined(CONFIG_SYS_DRAM_TEST)
 814         testdram,
 815 #endif /* CONFIG_SYS_DRAM_TEST */
 816         INIT_FUNC_WATCHDOG_RESET
 817
 818 #ifdef CONFIG_POST
 819         init_post,
 820 #endif
 821         INIT_FUNC_WATCHDOG_RESET
 822         /*
 823          * Now that we have DRAM mapped and working, we can
 824          * relocate the code and continue running from DRAM.
 825          *
 826          * Reserve memory at end of RAM for (top down in that order):
 827          *  - area that won't get touched by U-Boot and Linux (optional)
 828          *  - kernel log buffer
 829          *  - protected RAM
 830          *  - LCD framebuffer
 831          *  - monitor code
 832          *  - board info struct
 833          */
 834         setup_dest_addr,
 835 #ifdef CONFIG_PRAM
 836         reserve_pram,
 837 #endif
 838         reserve_round_4k,
 839 #ifdef CONFIG_ARM
 840         reserve_mmu,
 841 #endif
 842         reserve_video,
 843         reserve_trace,
 844         reserve_uboot,
 845         reserve_malloc,
 846         reserve_board,
 847         setup_machine,
 848         reserve_global_data,
 849         reserve_fdt,
 850         reserve_bootstage,
 851         reserve_arch,
 852         reserve_stacks,
 853         dram_init_banksize,
 854         show_dram_config,
 855 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 856         defined(CONFIG_SH)
 857         setup_board_part1,
 858 #endif
 859 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 860         INIT_FUNC_WATCHDOG_RESET
 861         setup_board_part2,
 862 #endif
 863         display_new_sp,
 864 #ifdef CONFIG_OF_BOARD_FIXUP
 865         fix_fdt,
 866 #endif
 867         INIT_FUNC_WATCHDOG_RESET
 868         reloc_fdt,
 869         reloc_bootstage,
 870         setup_reloc,
 871 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 872         copy_uboot_to_ram,
 873         do_elf_reloc_fixups,
 874         clear_bss,
 875 #endif
 876 #if defined(CONFIG_XTENSA)
 877         clear_bss,
 878 #endif
 879 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 880                 !CONFIG_IS_ENABLED(X86_64)
 881         jump_to_copy,
 882 #endif
 883         NULL,
 884 };
 885
 886 void board_init_f(ulong boot_flags)
 887 {
 888         gd->flags = boot_flags;
 889         gd->have_console = 0;
 890
 891         if (initcall_run_list(init_sequence_f))
 892                 hang();
 893
 894 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 895                 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
 896         /* NOTREACHED - jump_to_copy() does not return */
 897         hang();
 898 #endif
 899 }
 900
 901 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 902 /*
 903  * For now this code is only used on x86.
 904  *
 905  * init_sequence_f_r is the list of init functions which are run when
 906  * U-Boot is executing from Flash with a semi-limited 'C' environment.
 907  * The following limitations must be considered when implementing an
 908  * '_f_r' function:
 909  *  - 'static' variables are read-only
 910  *  - Global Data (gd->xxx) is read/write
 911  *
 912  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
 913  * supported).  It _should_, if possible, copy global data to RAM and
 914  * initialise the CPU caches (to speed up the relocation process)
 915  *
 916  * NOTE: At present only x86 uses this route, but it is intended that
 917  * all archs will move to this when generic relocation is implemented.
 918  */
 919 static const init_fnc_t init_sequence_f_r[] = {
 920 #if !CONFIG_IS_ENABLED(X86_64)
 921         init_cache_f_r,
 922 #endif
 923
 924         NULL,
 925 };
 926
 927 void board_init_f_r(void)
 928 {
 929         if (initcall_run_list(init_sequence_f_r))
 930                 hang();
 931
 932         /*
 933          * The pre-relocation drivers may be using memory that has now gone
 934          * away. Mark serial as unavailable - this will fall back to the debug
 935          * UART if available.
 936          *
 937          * Do the same with log drivers since the memory may not be available.
 938          */
 939         gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
 940 #ifdef CONFIG_TIMER
 941         gd->timer = NULL;
 942 #endif
 943
 944         /*
 945          * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
 946          * Transfer execution from Flash to RAM by calculating the address
 947          * of the in-RAM copy of board_init_r() and calling it
 948          */
 949         (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
 950
 951         /* NOTREACHED - board_init_r() does not return */
 952         hang();
 953 }
 954 #endif /* CONFIG_X86 */