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common: board: Dont relocate FDT incase of CONFIG_OF_EMBED
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1 /*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13 #include <common.h>
14 #include <linux/compiler.h>
15 #include <version.h>
16 #include <console.h>
17 #include <environment.h>
18 #include <dm.h>
19 #include <fdtdec.h>
20 #include <fs.h>
21 #if defined(CONFIG_CMD_IDE)
22 #include <ide.h>
23 #endif
24 #include <i2c.h>
25 #include <initcall.h>
26 #include <logbuff.h>
27 #include <malloc.h>
28 #include <mapmem.h>
29
30 /* TODO: Can we move these into arch/ headers? */
31 #ifdef CONFIG_8xx
32 #include <mpc8xx.h>
33 #endif
34 #ifdef CONFIG_5xx
35 #include <mpc5xx.h>
36 #endif
37 #ifdef CONFIG_MPC5xxx
38 #include <mpc5xxx.h>
39 #endif
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
41 #include <asm/mp.h>
42 #endif
43
44 #include <os.h>
45 #include <post.h>
46 #include <spi.h>
47 #include <status_led.h>
48 #include <trace.h>
49 #include <watchdog.h>
50 #include <asm/errno.h>
51 #include <asm/io.h>
52 #include <asm/sections.h>
53 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
54 #include <asm/init_helpers.h>
55 #include <asm/relocate.h>
56 #endif
57 #ifdef CONFIG_SANDBOX
58 #include <asm/state.h>
59 #endif
60 #include <dm/root.h>
61 #include <linux/compiler.h>
62
63 /*
64 * Pointer to initial global data area
65 *
66 * Here we initialize it if needed.
67 */
68 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
69 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
70 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
71 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
72 #else
73 DECLARE_GLOBAL_DATA_PTR;
74 #endif
75
76 /*
77 * TODO(sjg@chromium.org): IMO this code should be
78 * refactored to a single function, something like:
79 *
80 * void led_set_state(enum led_colour_t colour, int on);
81 */
82 /************************************************************************
83 * Coloured LED functionality
84 ************************************************************************
85 * May be supplied by boards if desired
86 */
87 __weak void coloured_LED_init(void) {}
88 __weak void red_led_on(void) {}
89 __weak void red_led_off(void) {}
90 __weak void green_led_on(void) {}
91 __weak void green_led_off(void) {}
92 __weak void yellow_led_on(void) {}
93 __weak void yellow_led_off(void) {}
94 __weak void blue_led_on(void) {}
95 __weak void blue_led_off(void) {}
96
97 /*
98 * Why is gd allocated a register? Prior to reloc it might be better to
99 * just pass it around to each function in this file?
100 *
101 * After reloc one could argue that it is hardly used and doesn't need
102 * to be in a register. Or if it is it should perhaps hold pointers to all
103 * global data for all modules, so that post-reloc we can avoid the massive
104 * literal pool we get on ARM. Or perhaps just encourage each module to use
105 * a structure...
106 */
107
108 /*
109 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
110 */
111
112 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
113 static int init_func_watchdog_init(void)
114 {
115 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
116 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
117 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
118 defined(CONFIG_IMX_WATCHDOG))
119 hw_watchdog_init();
120 # endif
121 puts(" Watchdog enabled\n");
122 WATCHDOG_RESET();
123
124 return 0;
125 }
126
127 int init_func_watchdog_reset(void)
128 {
129 WATCHDOG_RESET();
130
131 return 0;
132 }
133 #endif /* CONFIG_WATCHDOG */
134
135 __weak void board_add_ram_info(int use_default)
136 {
137 /* please define platform specific board_add_ram_info() */
138 }
139
140 static int init_baud_rate(void)
141 {
142 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
143 return 0;
144 }
145
146 static int display_text_info(void)
147 {
148 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
149 ulong bss_start, bss_end, text_base;
150
151 bss_start = (ulong)&__bss_start;
152 bss_end = (ulong)&__bss_end;
153
154 #ifdef CONFIG_SYS_TEXT_BASE
155 text_base = CONFIG_SYS_TEXT_BASE;
156 #else
157 text_base = CONFIG_SYS_MONITOR_BASE;
158 #endif
159
160 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
161 text_base, bss_start, bss_end);
162 #endif
163
164 #ifdef CONFIG_MODEM_SUPPORT
165 debug("Modem Support enabled\n");
166 #endif
167 #ifdef CONFIG_USE_IRQ
168 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
169 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
170 #endif
171
172 return 0;
173 }
174
175 static int announce_dram_init(void)
176 {
177 puts("DRAM: ");
178 return 0;
179 }
180
181 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
182 static int init_func_ram(void)
183 {
184 #ifdef CONFIG_BOARD_TYPES
185 int board_type = gd->board_type;
186 #else
187 int board_type = 0; /* use dummy arg */
188 #endif
189
190 gd->ram_size = initdram(board_type);
191
192 if (gd->ram_size > 0)
193 return 0;
194
195 puts("*** failed ***\n");
196 return 1;
197 }
198 #endif
199
200 static int show_dram_config(void)
201 {
202 unsigned long long size;
203
204 #ifdef CONFIG_NR_DRAM_BANKS
205 int i;
206
207 debug("\nRAM Configuration:\n");
208 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
209 size += gd->bd->bi_dram[i].size;
210 debug("Bank #%d: %llx ", i,
211 (unsigned long long)(gd->bd->bi_dram[i].start));
212 #ifdef DEBUG
213 print_size(gd->bd->bi_dram[i].size, "\n");
214 #endif
215 }
216 debug("\nDRAM: ");
217 #else
218 size = gd->ram_size;
219 #endif
220
221 print_size(size, "");
222 board_add_ram_info(0);
223 putc('\n');
224
225 return 0;
226 }
227
228 __weak void dram_init_banksize(void)
229 {
230 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
231 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
232 gd->bd->bi_dram[0].size = get_effective_memsize();
233 #endif
234 }
235
236 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
237 static int init_func_i2c(void)
238 {
239 puts("I2C: ");
240 #ifdef CONFIG_SYS_I2C
241 i2c_init_all();
242 #else
243 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
244 #endif
245 puts("ready\n");
246 return 0;
247 }
248 #endif
249
250 #if defined(CONFIG_HARD_SPI)
251 static int init_func_spi(void)
252 {
253 puts("SPI: ");
254 spi_init();
255 puts("ready\n");
256 return 0;
257 }
258 #endif
259
260 __maybe_unused
261 static int zero_global_data(void)
262 {
263 memset((void *)gd, '\0', sizeof(gd_t));
264
265 return 0;
266 }
267
268 static int setup_mon_len(void)
269 {
270 #if defined(__ARM__) || defined(__MICROBLAZE__)
271 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
272 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
273 gd->mon_len = (ulong)&_end - (ulong)_init;
274 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
275 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
276 #elif defined(CONFIG_NDS32)
277 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
278 #else
279 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
280 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
281 #endif
282 return 0;
283 }
284
285 __weak int arch_cpu_init(void)
286 {
287 return 0;
288 }
289
290 #ifdef CONFIG_SANDBOX
291 static int setup_ram_buf(void)
292 {
293 struct sandbox_state *state = state_get_current();
294
295 gd->arch.ram_buf = state->ram_buf;
296 gd->ram_size = state->ram_size;
297
298 return 0;
299 }
300 #endif
301
302 /* Get the top of usable RAM */
303 __weak ulong board_get_usable_ram_top(ulong total_size)
304 {
305 #ifdef CONFIG_SYS_SDRAM_BASE
306 /*
307 * Detect whether we have so much RAM that it goes past the end of our
308 * 32-bit address space. If so, clip the usable RAM so it doesn't.
309 */
310 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
311 /*
312 * Will wrap back to top of 32-bit space when reservations
313 * are made.
314 */
315 return 0;
316 #endif
317 return gd->ram_top;
318 }
319
320 static int setup_dest_addr(void)
321 {
322 debug("Monitor len: %08lX\n", gd->mon_len);
323 /*
324 * Ram is setup, size stored in gd !!
325 */
326 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
327 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
328 /*
329 * Subtract specified amount of memory to hide so that it won't
330 * get "touched" at all by U-Boot. By fixing up gd->ram_size
331 * the Linux kernel should now get passed the now "corrected"
332 * memory size and won't touch it either. This should work
333 * for arch/ppc and arch/powerpc. Only Linux board ports in
334 * arch/powerpc with bootwrapper support, that recalculate the
335 * memory size from the SDRAM controller setup will have to
336 * get fixed.
337 */
338 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
339 #endif
340 #ifdef CONFIG_SYS_SDRAM_BASE
341 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
342 #endif
343 gd->ram_top += get_effective_memsize();
344 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
345 gd->relocaddr = gd->ram_top;
346 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
347 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
348 /*
349 * We need to make sure the location we intend to put secondary core
350 * boot code is reserved and not used by any part of u-boot
351 */
352 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
353 gd->relocaddr = determine_mp_bootpg(NULL);
354 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
355 }
356 #endif
357 return 0;
358 }
359
360 #if defined(CONFIG_SPARC)
361 static int reserve_prom(void)
362 {
363 /* defined in arch/sparc/cpu/leon?/prom.c */
364 extern void *__prom_start_reloc;
365 int size = 8192; /* page table = 2k, prom = 6k */
366 gd->relocaddr -= size;
367 __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
368 debug("Reserving %dk for PROM and page table at %08lx\n", size,
369 gd->relocaddr);
370 return 0;
371 }
372 #endif
373
374 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
375 static int reserve_logbuffer(void)
376 {
377 /* reserve kernel log buffer */
378 gd->relocaddr -= LOGBUFF_RESERVE;
379 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
380 gd->relocaddr);
381 return 0;
382 }
383 #endif
384
385 #ifdef CONFIG_PRAM
386 /* reserve protected RAM */
387 static int reserve_pram(void)
388 {
389 ulong reg;
390
391 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
392 gd->relocaddr -= (reg << 10); /* size is in kB */
393 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
394 gd->relocaddr);
395 return 0;
396 }
397 #endif /* CONFIG_PRAM */
398
399 /* Round memory pointer down to next 4 kB limit */
400 static int reserve_round_4k(void)
401 {
402 gd->relocaddr &= ~(4096 - 1);
403 return 0;
404 }
405
406 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
407 defined(CONFIG_ARM)
408 static int reserve_mmu(void)
409 {
410 /* reserve TLB table */
411 gd->arch.tlb_size = PGTABLE_SIZE;
412 gd->relocaddr -= gd->arch.tlb_size;
413
414 /* round down to next 64 kB limit */
415 gd->relocaddr &= ~(0x10000 - 1);
416
417 gd->arch.tlb_addr = gd->relocaddr;
418 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
419 gd->arch.tlb_addr + gd->arch.tlb_size);
420 return 0;
421 }
422 #endif
423
424 #ifdef CONFIG_LCD
425 static int reserve_lcd(void)
426 {
427 #ifdef CONFIG_FB_ADDR
428 gd->fb_base = CONFIG_FB_ADDR;
429 #else
430 /* reserve memory for LCD display (always full pages) */
431 gd->relocaddr = lcd_setmem(gd->relocaddr);
432 gd->fb_base = gd->relocaddr;
433 #endif /* CONFIG_FB_ADDR */
434 return 0;
435 }
436 #endif /* CONFIG_LCD */
437
438 static int reserve_trace(void)
439 {
440 #ifdef CONFIG_TRACE
441 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
442 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
443 debug("Reserving %dk for trace data at: %08lx\n",
444 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
445 #endif
446
447 return 0;
448 }
449
450 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
451 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
452 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
453 static int reserve_video(void)
454 {
455 /* reserve memory for video display (always full pages) */
456 gd->relocaddr = video_setmem(gd->relocaddr);
457 gd->fb_base = gd->relocaddr;
458
459 return 0;
460 }
461 #endif
462
463 static int reserve_uboot(void)
464 {
465 /*
466 * reserve memory for U-Boot code, data & bss
467 * round down to next 4 kB limit
468 */
469 gd->relocaddr -= gd->mon_len;
470 gd->relocaddr &= ~(4096 - 1);
471 #ifdef CONFIG_E500
472 /* round down to next 64 kB limit so that IVPR stays aligned */
473 gd->relocaddr &= ~(65536 - 1);
474 #endif
475
476 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
477 gd->relocaddr);
478
479 gd->start_addr_sp = gd->relocaddr;
480
481 return 0;
482 }
483
484 #ifndef CONFIG_SPL_BUILD
485 /* reserve memory for malloc() area */
486 static int reserve_malloc(void)
487 {
488 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
489 debug("Reserving %dk for malloc() at: %08lx\n",
490 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
491 return 0;
492 }
493
494 /* (permanently) allocate a Board Info struct */
495 static int reserve_board(void)
496 {
497 if (!gd->bd) {
498 gd->start_addr_sp -= sizeof(bd_t);
499 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
500 memset(gd->bd, '\0', sizeof(bd_t));
501 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
502 sizeof(bd_t), gd->start_addr_sp);
503 }
504 return 0;
505 }
506 #endif
507
508 static int setup_machine(void)
509 {
510 #ifdef CONFIG_MACH_TYPE
511 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
512 #endif
513 return 0;
514 }
515
516 static int reserve_global_data(void)
517 {
518 gd->start_addr_sp -= sizeof(gd_t);
519 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
520 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
521 sizeof(gd_t), gd->start_addr_sp);
522 return 0;
523 }
524
525 static int reserve_fdt(void)
526 {
527 #ifndef CONFIG_OF_EMBED
528 /*
529 * If the device tree is sitting immediately above our image then we
530 * must relocate it. If it is embedded in the data section, then it
531 * will be relocated with other data.
532 */
533 if (gd->fdt_blob) {
534 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
535
536 gd->start_addr_sp -= gd->fdt_size;
537 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
538 debug("Reserving %lu Bytes for FDT at: %08lx\n",
539 gd->fdt_size, gd->start_addr_sp);
540 }
541 #endif
542
543 return 0;
544 }
545
546 int arch_reserve_stacks(void)
547 {
548 return 0;
549 }
550
551 static int reserve_stacks(void)
552 {
553 /* make stack pointer 16-byte aligned */
554 gd->start_addr_sp -= 16;
555 gd->start_addr_sp &= ~0xf;
556
557 /*
558 * let the architecture-specific code tailor gd->start_addr_sp and
559 * gd->irq_sp
560 */
561 return arch_reserve_stacks();
562 }
563
564 static int display_new_sp(void)
565 {
566 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
567
568 return 0;
569 }
570
571 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
572 static int setup_board_part1(void)
573 {
574 bd_t *bd = gd->bd;
575
576 /*
577 * Save local variables to board info struct
578 */
579 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
580 bd->bi_memsize = gd->ram_size; /* size in bytes */
581
582 #ifdef CONFIG_SYS_SRAM_BASE
583 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
584 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
585 #endif
586
587 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
588 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
589 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
590 #endif
591 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
592 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
593 #endif
594 #if defined(CONFIG_MPC83xx)
595 bd->bi_immrbar = CONFIG_SYS_IMMR;
596 #endif
597
598 return 0;
599 }
600 #endif
601
602 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
603 static int setup_board_part2(void)
604 {
605 bd_t *bd = gd->bd;
606
607 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
608 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
609 #if defined(CONFIG_CPM2)
610 bd->bi_cpmfreq = gd->arch.cpm_clk;
611 bd->bi_brgfreq = gd->arch.brg_clk;
612 bd->bi_sccfreq = gd->arch.scc_clk;
613 bd->bi_vco = gd->arch.vco_out;
614 #endif /* CONFIG_CPM2 */
615 #if defined(CONFIG_MPC512X)
616 bd->bi_ipsfreq = gd->arch.ips_clk;
617 #endif /* CONFIG_MPC512X */
618 #if defined(CONFIG_MPC5xxx)
619 bd->bi_ipbfreq = gd->arch.ipb_clk;
620 bd->bi_pcifreq = gd->pci_clk;
621 #endif /* CONFIG_MPC5xxx */
622 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
623 bd->bi_pcifreq = gd->pci_clk;
624 #endif
625 #if defined(CONFIG_EXTRA_CLOCK)
626 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
627 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
628 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
629 #endif
630
631 return 0;
632 }
633 #endif
634
635 #ifdef CONFIG_SYS_EXTBDINFO
636 static int setup_board_extra(void)
637 {
638 bd_t *bd = gd->bd;
639
640 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
641 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
642 sizeof(bd->bi_r_version));
643
644 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
645 bd->bi_plb_busfreq = gd->bus_clk;
646 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
647 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
648 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
649 bd->bi_pci_busfreq = get_PCI_freq();
650 bd->bi_opbfreq = get_OPB_freq();
651 #elif defined(CONFIG_XILINX_405)
652 bd->bi_pci_busfreq = get_PCI_freq();
653 #endif
654
655 return 0;
656 }
657 #endif
658
659 #ifdef CONFIG_POST
660 static int init_post(void)
661 {
662 post_bootmode_init();
663 post_run(NULL, POST_ROM | post_bootmode_get(0));
664
665 return 0;
666 }
667 #endif
668
669 static int setup_dram_config(void)
670 {
671 /* Ram is board specific, so move it to board code ... */
672 dram_init_banksize();
673
674 return 0;
675 }
676
677 static int reloc_fdt(void)
678 {
679 #ifndef CONFIG_OF_EMBED
680 if (gd->flags & GD_FLG_SKIP_RELOC)
681 return 0;
682 if (gd->new_fdt) {
683 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
684 gd->fdt_blob = gd->new_fdt;
685 }
686 #endif
687
688 return 0;
689 }
690
691 static int setup_reloc(void)
692 {
693 if (gd->flags & GD_FLG_SKIP_RELOC) {
694 debug("Skipping relocation due to flag\n");
695 return 0;
696 }
697
698 #ifdef CONFIG_SYS_TEXT_BASE
699 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
700 #ifdef CONFIG_M68K
701 /*
702 * On all ColdFire arch cpu, monitor code starts always
703 * just after the default vector table location, so at 0x400
704 */
705 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
706 #endif
707 #endif
708 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
709
710 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
711 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
712 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
713 gd->start_addr_sp);
714
715 return 0;
716 }
717
718 /* ARM calls relocate_code from its crt0.S */
719 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
720
721 static int jump_to_copy(void)
722 {
723 if (gd->flags & GD_FLG_SKIP_RELOC)
724 return 0;
725 /*
726 * x86 is special, but in a nice way. It uses a trampoline which
727 * enables the dcache if possible.
728 *
729 * For now, other archs use relocate_code(), which is implemented
730 * similarly for all archs. When we do generic relocation, hopefully
731 * we can make all archs enable the dcache prior to relocation.
732 */
733 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
734 /*
735 * SDRAM and console are now initialised. The final stack can now
736 * be setup in SDRAM. Code execution will continue in Flash, but
737 * with the stack in SDRAM and Global Data in temporary memory
738 * (CPU cache)
739 */
740 arch_setup_gd(gd->new_gd);
741 board_init_f_r_trampoline(gd->start_addr_sp);
742 #else
743 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
744 #endif
745
746 return 0;
747 }
748 #endif
749
750 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
751 static int mark_bootstage(void)
752 {
753 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
754
755 return 0;
756 }
757
758 static int initf_console_record(void)
759 {
760 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
761 return console_record_init();
762 #else
763 return 0;
764 #endif
765 }
766
767 static int initf_dm(void)
768 {
769 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
770 int ret;
771
772 ret = dm_init_and_scan(true);
773 if (ret)
774 return ret;
775 #endif
776
777 return 0;
778 }
779
780 /* Architecture-specific memory reservation */
781 __weak int reserve_arch(void)
782 {
783 return 0;
784 }
785
786 __weak int arch_cpu_init_dm(void)
787 {
788 return 0;
789 }
790
791 static init_fnc_t init_sequence_f[] = {
792 #ifdef CONFIG_SANDBOX
793 setup_ram_buf,
794 #endif
795 setup_mon_len,
796 #ifdef CONFIG_OF_CONTROL
797 fdtdec_setup,
798 #endif
799 #ifdef CONFIG_TRACE
800 trace_early_init,
801 #endif
802 initf_malloc,
803 initf_console_record,
804 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
805 /* TODO: can this go into arch_cpu_init()? */
806 probecpu,
807 #endif
808 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
809 x86_fsp_init,
810 #endif
811 arch_cpu_init, /* basic arch cpu dependent setup */
812 initf_dm,
813 arch_cpu_init_dm,
814 mark_bootstage, /* need timer, go after init dm */
815 #if defined(CONFIG_BOARD_EARLY_INIT_F)
816 board_early_init_f,
817 #endif
818 /* TODO: can any of this go into arch_cpu_init()? */
819 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
820 get_clocks, /* get CPU and bus clocks (etc.) */
821 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
822 && !defined(CONFIG_TQM885D)
823 adjust_sdram_tbs_8xx,
824 #endif
825 /* TODO: can we rename this to timer_init()? */
826 init_timebase,
827 #endif
828 #if defined(CONFIG_X86) || defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
829 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
830 defined(CONFIG_SPARC)
831 timer_init, /* initialize timer */
832 #endif
833 #ifdef CONFIG_SYS_ALLOC_DPRAM
834 #if !defined(CONFIG_CPM2)
835 dpram_init,
836 #endif
837 #endif
838 #if defined(CONFIG_BOARD_POSTCLK_INIT)
839 board_postclk_init,
840 #endif
841 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
842 get_clocks,
843 #endif
844 env_init, /* initialize environment */
845 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
846 /* get CPU and bus clocks according to the environment variable */
847 get_clocks_866,
848 /* adjust sdram refresh rate according to the new clock */
849 sdram_adjust_866,
850 init_timebase,
851 #endif
852 init_baud_rate, /* initialze baudrate settings */
853 serial_init, /* serial communications setup */
854 console_init_f, /* stage 1 init of console */
855 #ifdef CONFIG_SANDBOX
856 sandbox_early_getopt_check,
857 #endif
858 #ifdef CONFIG_OF_CONTROL
859 fdtdec_prepare_fdt,
860 #endif
861 display_options, /* say that we are here */
862 display_text_info, /* show debugging info if required */
863 #if defined(CONFIG_MPC8260)
864 prt_8260_rsr,
865 prt_8260_clks,
866 #endif /* CONFIG_MPC8260 */
867 #if defined(CONFIG_MPC83xx)
868 prt_83xx_rsr,
869 #endif
870 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
871 checkcpu,
872 #endif
873 print_cpuinfo, /* display cpu info (and speed) */
874 #if defined(CONFIG_MPC5xxx)
875 prt_mpc5xxx_clks,
876 #endif /* CONFIG_MPC5xxx */
877 #if defined(CONFIG_DISPLAY_BOARDINFO)
878 show_board_info,
879 #endif
880 INIT_FUNC_WATCHDOG_INIT
881 #if defined(CONFIG_MISC_INIT_F)
882 misc_init_f,
883 #endif
884 INIT_FUNC_WATCHDOG_RESET
885 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
886 init_func_i2c,
887 #endif
888 #if defined(CONFIG_HARD_SPI)
889 init_func_spi,
890 #endif
891 announce_dram_init,
892 /* TODO: unify all these dram functions? */
893 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
894 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
895 dram_init, /* configure available RAM banks */
896 #endif
897 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
898 init_func_ram,
899 #endif
900 #ifdef CONFIG_POST
901 post_init_f,
902 #endif
903 INIT_FUNC_WATCHDOG_RESET
904 #if defined(CONFIG_SYS_DRAM_TEST)
905 testdram,
906 #endif /* CONFIG_SYS_DRAM_TEST */
907 INIT_FUNC_WATCHDOG_RESET
908
909 #ifdef CONFIG_POST
910 init_post,
911 #endif
912 INIT_FUNC_WATCHDOG_RESET
913 /*
914 * Now that we have DRAM mapped and working, we can
915 * relocate the code and continue running from DRAM.
916 *
917 * Reserve memory at end of RAM for (top down in that order):
918 * - area that won't get touched by U-Boot and Linux (optional)
919 * - kernel log buffer
920 * - protected RAM
921 * - LCD framebuffer
922 * - monitor code
923 * - board info struct
924 */
925 setup_dest_addr,
926 #if defined(CONFIG_BLACKFIN)
927 /* Blackfin u-boot monitor should be on top of the ram */
928 reserve_uboot,
929 #endif
930 #if defined(CONFIG_SPARC)
931 reserve_prom,
932 #endif
933 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
934 reserve_logbuffer,
935 #endif
936 #ifdef CONFIG_PRAM
937 reserve_pram,
938 #endif
939 reserve_round_4k,
940 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
941 defined(CONFIG_ARM)
942 reserve_mmu,
943 #endif
944 #ifdef CONFIG_LCD
945 reserve_lcd,
946 #endif
947 reserve_trace,
948 /* TODO: Why the dependency on CONFIG_8xx? */
949 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
950 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
951 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
952 reserve_video,
953 #endif
954 #if !defined(CONFIG_BLACKFIN)
955 reserve_uboot,
956 #endif
957 #ifndef CONFIG_SPL_BUILD
958 reserve_malloc,
959 reserve_board,
960 #endif
961 setup_machine,
962 reserve_global_data,
963 reserve_fdt,
964 reserve_arch,
965 reserve_stacks,
966 setup_dram_config,
967 show_dram_config,
968 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
969 setup_board_part1,
970 #endif
971 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
972 INIT_FUNC_WATCHDOG_RESET
973 setup_board_part2,
974 #endif
975 display_new_sp,
976 #ifdef CONFIG_SYS_EXTBDINFO
977 setup_board_extra,
978 #endif
979 INIT_FUNC_WATCHDOG_RESET
980 reloc_fdt,
981 setup_reloc,
982 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
983 copy_uboot_to_ram,
984 clear_bss,
985 do_elf_reloc_fixups,
986 #endif
987 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
988 jump_to_copy,
989 #endif
990 NULL,
991 };
992
993 void board_init_f(ulong boot_flags)
994 {
995 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
996 /*
997 * For some archtectures, global data is initialized and used before
998 * calling this function. The data should be preserved. For others,
999 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1000 * here to host global data until relocation.
1001 */
1002 gd_t data;
1003
1004 gd = &data;
1005
1006 /*
1007 * Clear global data before it is accessed at debug print
1008 * in initcall_run_list. Otherwise the debug print probably
1009 * get the wrong vaule of gd->have_console.
1010 */
1011 zero_global_data();
1012 #endif
1013
1014 gd->flags = boot_flags;
1015 gd->have_console = 0;
1016
1017 if (initcall_run_list(init_sequence_f))
1018 hang();
1019
1020 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1021 !defined(CONFIG_EFI_APP)
1022 /* NOTREACHED - jump_to_copy() does not return */
1023 hang();
1024 #endif
1025 }
1026
1027 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1028 /*
1029 * For now this code is only used on x86.
1030 *
1031 * init_sequence_f_r is the list of init functions which are run when
1032 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1033 * The following limitations must be considered when implementing an
1034 * '_f_r' function:
1035 * - 'static' variables are read-only
1036 * - Global Data (gd->xxx) is read/write
1037 *
1038 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1039 * supported). It _should_, if possible, copy global data to RAM and
1040 * initialise the CPU caches (to speed up the relocation process)
1041 *
1042 * NOTE: At present only x86 uses this route, but it is intended that
1043 * all archs will move to this when generic relocation is implemented.
1044 */
1045 static init_fnc_t init_sequence_f_r[] = {
1046 init_cache_f_r,
1047
1048 NULL,
1049 };
1050
1051 void board_init_f_r(void)
1052 {
1053 if (initcall_run_list(init_sequence_f_r))
1054 hang();
1055
1056 /*
1057 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1058 * Transfer execution from Flash to RAM by calculating the address
1059 * of the in-RAM copy of board_init_r() and calling it
1060 */
1061 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1062
1063 /* NOTREACHED - board_init_r() does not return */
1064 hang();
1065 }
1066 #endif /* CONFIG_X86 */