2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
16 #include <environment.h>
20 #if defined(CONFIG_CMD_IDE)
29 /* TODO: Can we move these into arch/ headers? */
39 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
46 #include <status_led.h>
49 #include <asm/errno.h>
51 #include <asm/sections.h>
52 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
53 #include <asm/init_helpers.h>
54 #include <asm/relocate.h>
57 #include <asm/state.h>
60 #include <linux/compiler.h>
63 * Pointer to initial global data area
65 * Here we initialize it if needed.
67 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
68 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
69 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
70 DECLARE_GLOBAL_DATA_PTR
= (gd_t
*) (CONFIG_SYS_INIT_GD_ADDR
);
72 DECLARE_GLOBAL_DATA_PTR
;
76 * TODO(sjg@chromium.org): IMO this code should be
77 * refactored to a single function, something like:
79 * void led_set_state(enum led_colour_t colour, int on);
81 /************************************************************************
82 * Coloured LED functionality
83 ************************************************************************
84 * May be supplied by boards if desired
86 __weak
void coloured_LED_init(void) {}
87 __weak
void red_led_on(void) {}
88 __weak
void red_led_off(void) {}
89 __weak
void green_led_on(void) {}
90 __weak
void green_led_off(void) {}
91 __weak
void yellow_led_on(void) {}
92 __weak
void yellow_led_off(void) {}
93 __weak
void blue_led_on(void) {}
94 __weak
void blue_led_off(void) {}
97 * Why is gd allocated a register? Prior to reloc it might be better to
98 * just pass it around to each function in this file?
100 * After reloc one could argue that it is hardly used and doesn't need
101 * to be in a register. Or if it is it should perhaps hold pointers to all
102 * global data for all modules, so that post-reloc we can avoid the massive
103 * literal pool we get on ARM. Or perhaps just encourage each module to use
108 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
111 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
112 static int init_func_watchdog_init(void)
114 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
115 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
116 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
117 defined(CONFIG_IMX_WATCHDOG))
120 puts(" Watchdog enabled\n");
126 int init_func_watchdog_reset(void)
132 #endif /* CONFIG_WATCHDOG */
134 __weak
void board_add_ram_info(int use_default
)
136 /* please define platform specific board_add_ram_info() */
139 static int init_baud_rate(void)
141 gd
->baudrate
= getenv_ulong("baudrate", 10, CONFIG_BAUDRATE
);
145 static int display_text_info(void)
147 #ifndef CONFIG_SANDBOX
148 ulong bss_start
, bss_end
, text_base
;
150 bss_start
= (ulong
)&__bss_start
;
151 bss_end
= (ulong
)&__bss_end
;
153 #ifdef CONFIG_SYS_TEXT_BASE
154 text_base
= CONFIG_SYS_TEXT_BASE
;
156 text_base
= CONFIG_SYS_MONITOR_BASE
;
159 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
160 text_base
, bss_start
, bss_end
);
163 #ifdef CONFIG_MODEM_SUPPORT
164 debug("Modem Support enabled\n");
166 #ifdef CONFIG_USE_IRQ
167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START
);
168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START
);
174 static int announce_dram_init(void)
180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
181 static int init_func_ram(void)
183 #ifdef CONFIG_BOARD_TYPES
184 int board_type
= gd
->board_type
;
186 int board_type
= 0; /* use dummy arg */
189 gd
->ram_size
= initdram(board_type
);
191 if (gd
->ram_size
> 0)
194 puts("*** failed ***\n");
199 static int show_dram_config(void)
201 unsigned long long size
;
203 #ifdef CONFIG_NR_DRAM_BANKS
206 debug("\nRAM Configuration:\n");
207 for (i
= size
= 0; i
< CONFIG_NR_DRAM_BANKS
; i
++) {
208 size
+= gd
->bd
->bi_dram
[i
].size
;
209 debug("Bank #%d: %08lx ", i
, gd
->bd
->bi_dram
[i
].start
);
211 print_size(gd
->bd
->bi_dram
[i
].size
, "\n");
219 print_size(size
, "");
220 board_add_ram_info(0);
226 __weak
void dram_init_banksize(void)
228 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
229 gd
->bd
->bi_dram
[0].start
= CONFIG_SYS_SDRAM_BASE
;
230 gd
->bd
->bi_dram
[0].size
= get_effective_memsize();
234 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
235 static int init_func_i2c(void)
238 #ifdef CONFIG_SYS_I2C
241 i2c_init(CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
248 #if defined(CONFIG_HARD_SPI)
249 static int init_func_spi(void)
259 static int zero_global_data(void)
261 memset((void *)gd
, '\0', sizeof(gd_t
));
266 static int setup_mon_len(void)
268 #if defined(__ARM__) || defined(__MICROBLAZE__)
269 gd
->mon_len
= (ulong
)&__bss_end
- (ulong
)_start
;
270 #elif defined(CONFIG_SANDBOX)
271 gd
->mon_len
= (ulong
)&_end
- (ulong
)_init
;
272 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
273 gd
->mon_len
= CONFIG_SYS_MONITOR_LEN
;
275 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
276 gd
->mon_len
= (ulong
)&__bss_end
- CONFIG_SYS_MONITOR_BASE
;
281 __weak
int arch_cpu_init(void)
286 #ifdef CONFIG_SANDBOX
287 static int setup_ram_buf(void)
289 struct sandbox_state
*state
= state_get_current();
291 gd
->arch
.ram_buf
= state
->ram_buf
;
292 gd
->ram_size
= state
->ram_size
;
298 /* Get the top of usable RAM */
299 __weak ulong
board_get_usable_ram_top(ulong total_size
)
301 #ifdef CONFIG_SYS_SDRAM_BASE
303 * Detect whether we have so much RAM that it goes past the end of our
304 * 32-bit address space. If so, clip the usable RAM so it doesn't.
306 if (gd
->ram_top
< CONFIG_SYS_SDRAM_BASE
)
308 * Will wrap back to top of 32-bit space when reservations
316 static int setup_dest_addr(void)
318 debug("Monitor len: %08lX\n", gd
->mon_len
);
320 * Ram is setup, size stored in gd !!
322 debug("Ram size: %08lX\n", (ulong
)gd
->ram_size
);
323 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
325 * Subtract specified amount of memory to hide so that it won't
326 * get "touched" at all by U-Boot. By fixing up gd->ram_size
327 * the Linux kernel should now get passed the now "corrected"
328 * memory size and won't touch it either. This should work
329 * for arch/ppc and arch/powerpc. Only Linux board ports in
330 * arch/powerpc with bootwrapper support, that recalculate the
331 * memory size from the SDRAM controller setup will have to
334 gd
->ram_size
-= CONFIG_SYS_MEM_TOP_HIDE
;
336 #ifdef CONFIG_SYS_SDRAM_BASE
337 gd
->ram_top
= CONFIG_SYS_SDRAM_BASE
;
339 gd
->ram_top
+= get_effective_memsize();
340 gd
->ram_top
= board_get_usable_ram_top(gd
->mon_len
);
341 gd
->relocaddr
= gd
->ram_top
;
342 debug("Ram top: %08lX\n", (ulong
)gd
->ram_top
);
343 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
345 * We need to make sure the location we intend to put secondary core
346 * boot code is reserved and not used by any part of u-boot
348 if (gd
->relocaddr
> determine_mp_bootpg(NULL
)) {
349 gd
->relocaddr
= determine_mp_bootpg(NULL
);
350 debug("Reserving MP boot page to %08lx\n", gd
->relocaddr
);
356 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
357 static int reserve_logbuffer(void)
359 /* reserve kernel log buffer */
360 gd
->relocaddr
-= LOGBUFF_RESERVE
;
361 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN
,
368 /* reserve protected RAM */
369 static int reserve_pram(void)
373 reg
= getenv_ulong("pram", 10, CONFIG_PRAM
);
374 gd
->relocaddr
-= (reg
<< 10); /* size is in kB */
375 debug("Reserving %ldk for protected RAM at %08lx\n", reg
,
379 #endif /* CONFIG_PRAM */
381 /* Round memory pointer down to next 4 kB limit */
382 static int reserve_round_4k(void)
384 gd
->relocaddr
&= ~(4096 - 1);
388 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
390 static int reserve_mmu(void)
392 /* reserve TLB table */
393 gd
->arch
.tlb_size
= PGTABLE_SIZE
;
394 gd
->relocaddr
-= gd
->arch
.tlb_size
;
396 /* round down to next 64 kB limit */
397 gd
->relocaddr
&= ~(0x10000 - 1);
399 gd
->arch
.tlb_addr
= gd
->relocaddr
;
400 debug("TLB table from %08lx to %08lx\n", gd
->arch
.tlb_addr
,
401 gd
->arch
.tlb_addr
+ gd
->arch
.tlb_size
);
407 static int reserve_lcd(void)
409 #ifdef CONFIG_FB_ADDR
410 gd
->fb_base
= CONFIG_FB_ADDR
;
412 /* reserve memory for LCD display (always full pages) */
413 gd
->relocaddr
= lcd_setmem(gd
->relocaddr
);
414 gd
->fb_base
= gd
->relocaddr
;
415 #endif /* CONFIG_FB_ADDR */
418 #endif /* CONFIG_LCD */
420 static int reserve_trace(void)
423 gd
->relocaddr
-= CONFIG_TRACE_BUFFER_SIZE
;
424 gd
->trace_buff
= map_sysmem(gd
->relocaddr
, CONFIG_TRACE_BUFFER_SIZE
);
425 debug("Reserving %dk for trace data at: %08lx\n",
426 CONFIG_TRACE_BUFFER_SIZE
>> 10, gd
->relocaddr
);
432 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
433 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
434 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
435 static int reserve_video(void)
437 /* reserve memory for video display (always full pages) */
438 gd
->relocaddr
= video_setmem(gd
->relocaddr
);
439 gd
->fb_base
= gd
->relocaddr
;
445 static int reserve_uboot(void)
448 * reserve memory for U-Boot code, data & bss
449 * round down to next 4 kB limit
451 gd
->relocaddr
-= gd
->mon_len
;
452 gd
->relocaddr
&= ~(4096 - 1);
454 /* round down to next 64 kB limit so that IVPR stays aligned */
455 gd
->relocaddr
&= ~(65536 - 1);
458 debug("Reserving %ldk for U-Boot at: %08lx\n", gd
->mon_len
>> 10,
461 gd
->start_addr_sp
= gd
->relocaddr
;
466 #ifndef CONFIG_SPL_BUILD
467 /* reserve memory for malloc() area */
468 static int reserve_malloc(void)
470 gd
->start_addr_sp
= gd
->start_addr_sp
- TOTAL_MALLOC_LEN
;
471 debug("Reserving %dk for malloc() at: %08lx\n",
472 TOTAL_MALLOC_LEN
>> 10, gd
->start_addr_sp
);
476 /* (permanently) allocate a Board Info struct */
477 static int reserve_board(void)
480 gd
->start_addr_sp
-= sizeof(bd_t
);
481 gd
->bd
= (bd_t
*)map_sysmem(gd
->start_addr_sp
, sizeof(bd_t
));
482 memset(gd
->bd
, '\0', sizeof(bd_t
));
483 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
484 sizeof(bd_t
), gd
->start_addr_sp
);
490 static int setup_machine(void)
492 #ifdef CONFIG_MACH_TYPE
493 gd
->bd
->bi_arch_number
= CONFIG_MACH_TYPE
; /* board id for Linux */
498 static int reserve_global_data(void)
500 gd
->start_addr_sp
-= sizeof(gd_t
);
501 gd
->new_gd
= (gd_t
*)map_sysmem(gd
->start_addr_sp
, sizeof(gd_t
));
502 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
503 sizeof(gd_t
), gd
->start_addr_sp
);
507 static int reserve_fdt(void)
510 * If the device tree is sitting immediately above our image then we
511 * must relocate it. If it is embedded in the data section, then it
512 * will be relocated with other data.
515 gd
->fdt_size
= ALIGN(fdt_totalsize(gd
->fdt_blob
) + 0x1000, 32);
517 gd
->start_addr_sp
-= gd
->fdt_size
;
518 gd
->new_fdt
= map_sysmem(gd
->start_addr_sp
, gd
->fdt_size
);
519 debug("Reserving %lu Bytes for FDT at: %08lx\n",
520 gd
->fdt_size
, gd
->start_addr_sp
);
526 int arch_reserve_stacks(void)
531 static int reserve_stacks(void)
533 /* make stack pointer 16-byte aligned */
534 gd
->start_addr_sp
-= 16;
535 gd
->start_addr_sp
&= ~0xf;
538 * let the architecture-specific code tailor gd->start_addr_sp and
541 return arch_reserve_stacks();
544 static int display_new_sp(void)
546 debug("New Stack Pointer is: %08lx\n", gd
->start_addr_sp
);
551 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
552 static int setup_board_part1(void)
557 * Save local variables to board info struct
559 bd
->bi_memstart
= CONFIG_SYS_SDRAM_BASE
; /* start of memory */
560 bd
->bi_memsize
= gd
->ram_size
; /* size in bytes */
562 #ifdef CONFIG_SYS_SRAM_BASE
563 bd
->bi_sramstart
= CONFIG_SYS_SRAM_BASE
; /* start of SRAM */
564 bd
->bi_sramsize
= CONFIG_SYS_SRAM_SIZE
; /* size of SRAM */
567 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
568 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
569 bd
->bi_immr_base
= CONFIG_SYS_IMMR
; /* base of IMMR register */
571 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
572 bd
->bi_mbar_base
= CONFIG_SYS_MBAR
; /* base of internal registers */
574 #if defined(CONFIG_MPC83xx)
575 bd
->bi_immrbar
= CONFIG_SYS_IMMR
;
581 static int setup_board_part2(void)
585 bd
->bi_intfreq
= gd
->cpu_clk
; /* Internal Freq, in Hz */
586 bd
->bi_busfreq
= gd
->bus_clk
; /* Bus Freq, in Hz */
587 #if defined(CONFIG_CPM2)
588 bd
->bi_cpmfreq
= gd
->arch
.cpm_clk
;
589 bd
->bi_brgfreq
= gd
->arch
.brg_clk
;
590 bd
->bi_sccfreq
= gd
->arch
.scc_clk
;
591 bd
->bi_vco
= gd
->arch
.vco_out
;
592 #endif /* CONFIG_CPM2 */
593 #if defined(CONFIG_MPC512X)
594 bd
->bi_ipsfreq
= gd
->arch
.ips_clk
;
595 #endif /* CONFIG_MPC512X */
596 #if defined(CONFIG_MPC5xxx)
597 bd
->bi_ipbfreq
= gd
->arch
.ipb_clk
;
598 bd
->bi_pcifreq
= gd
->pci_clk
;
599 #endif /* CONFIG_MPC5xxx */
600 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
601 bd
->bi_pcifreq
= gd
->pci_clk
;
603 #if defined(CONFIG_EXTRA_CLOCK)
604 bd
->bi_inpfreq
= gd
->arch
.inp_clk
; /* input Freq in Hz */
605 bd
->bi_vcofreq
= gd
->arch
.vco_clk
; /* vco Freq in Hz */
606 bd
->bi_flbfreq
= gd
->arch
.flb_clk
; /* flexbus Freq in Hz */
613 #ifdef CONFIG_SYS_EXTBDINFO
614 static int setup_board_extra(void)
618 strncpy((char *) bd
->bi_s_version
, "1.2", sizeof(bd
->bi_s_version
));
619 strncpy((char *) bd
->bi_r_version
, U_BOOT_VERSION
,
620 sizeof(bd
->bi_r_version
));
622 bd
->bi_procfreq
= gd
->cpu_clk
; /* Processor Speed, In Hz */
623 bd
->bi_plb_busfreq
= gd
->bus_clk
;
624 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
625 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
626 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
627 bd
->bi_pci_busfreq
= get_PCI_freq();
628 bd
->bi_opbfreq
= get_OPB_freq();
629 #elif defined(CONFIG_XILINX_405)
630 bd
->bi_pci_busfreq
= get_PCI_freq();
638 static int init_post(void)
640 post_bootmode_init();
641 post_run(NULL
, POST_ROM
| post_bootmode_get(0));
647 static int setup_dram_config(void)
649 /* Ram is board specific, so move it to board code ... */
650 dram_init_banksize();
655 static int reloc_fdt(void)
658 memcpy(gd
->new_fdt
, gd
->fdt_blob
, gd
->fdt_size
);
659 gd
->fdt_blob
= gd
->new_fdt
;
665 static int setup_reloc(void)
667 #ifdef CONFIG_SYS_TEXT_BASE
668 gd
->reloc_off
= gd
->relocaddr
- CONFIG_SYS_TEXT_BASE
;
671 * On all ColdFire arch cpu, monitor code starts always
672 * just after the default vector table location, so at 0x400
674 gd
->reloc_off
= gd
->relocaddr
- (CONFIG_SYS_TEXT_BASE
+ 0x400);
677 memcpy(gd
->new_gd
, (char *)gd
, sizeof(gd_t
));
679 debug("Relocation Offset is: %08lx\n", gd
->reloc_off
);
680 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
681 gd
->relocaddr
, (ulong
)map_to_sysmem(gd
->new_gd
),
687 /* ARM calls relocate_code from its crt0.S */
688 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
690 static int jump_to_copy(void)
693 * x86 is special, but in a nice way. It uses a trampoline which
694 * enables the dcache if possible.
696 * For now, other archs use relocate_code(), which is implemented
697 * similarly for all archs. When we do generic relocation, hopefully
698 * we can make all archs enable the dcache prior to relocation.
700 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
702 * SDRAM and console are now initialised. The final stack can now
703 * be setup in SDRAM. Code execution will continue in Flash, but
704 * with the stack in SDRAM and Global Data in temporary memory
707 board_init_f_r_trampoline(gd
->start_addr_sp
);
709 relocate_code(gd
->start_addr_sp
, gd
->new_gd
, gd
->relocaddr
);
716 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
717 static int mark_bootstage(void)
719 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F
, "board_init_f");
724 static int initf_dm(void)
726 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
729 ret
= dm_init_and_scan(true);
737 /* Architecture-specific memory reservation */
738 __weak
int reserve_arch(void)
743 __weak
int arch_cpu_init_dm(void)
748 static init_fnc_t init_sequence_f
[] = {
749 #ifdef CONFIG_SANDBOX
753 #ifdef CONFIG_OF_CONTROL
760 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
761 /* TODO: can this go into arch_cpu_init()? */
764 arch_cpu_init
, /* basic arch cpu dependent setup */
768 #if defined(CONFIG_BOARD_EARLY_INIT_F)
771 /* TODO: can any of this go into arch_cpu_init()? */
772 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
773 get_clocks
, /* get CPU and bus clocks (etc.) */
774 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
775 && !defined(CONFIG_TQM885D)
776 adjust_sdram_tbs_8xx
,
778 /* TODO: can we rename this to timer_init()? */
781 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
782 timer_init
, /* initialize timer */
784 #ifdef CONFIG_SYS_ALLOC_DPRAM
785 #if !defined(CONFIG_CPM2)
789 #if defined(CONFIG_BOARD_POSTCLK_INIT)
792 #ifdef CONFIG_FSL_ESDHC
798 env_init
, /* initialize environment */
799 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
800 /* get CPU and bus clocks according to the environment variable */
802 /* adjust sdram refresh rate according to the new clock */
806 init_baud_rate
, /* initialze baudrate settings */
807 serial_init
, /* serial communications setup */
808 console_init_f
, /* stage 1 init of console */
809 #ifdef CONFIG_SANDBOX
810 sandbox_early_getopt_check
,
812 #ifdef CONFIG_OF_CONTROL
815 display_options
, /* say that we are here */
816 display_text_info
, /* show debugging info if required */
817 #if defined(CONFIG_MPC8260)
820 #endif /* CONFIG_MPC8260 */
821 #if defined(CONFIG_MPC83xx)
824 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
827 print_cpuinfo
, /* display cpu info (and speed) */
828 #if defined(CONFIG_MPC5xxx)
830 #endif /* CONFIG_MPC5xxx */
831 #if defined(CONFIG_DISPLAY_BOARDINFO)
834 INIT_FUNC_WATCHDOG_INIT
835 #if defined(CONFIG_MISC_INIT_F)
838 INIT_FUNC_WATCHDOG_RESET
839 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
842 #if defined(CONFIG_HARD_SPI)
846 /* TODO: unify all these dram functions? */
847 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
848 dram_init
, /* configure available RAM banks */
850 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
856 INIT_FUNC_WATCHDOG_RESET
857 #if defined(CONFIG_SYS_DRAM_TEST)
859 #endif /* CONFIG_SYS_DRAM_TEST */
860 INIT_FUNC_WATCHDOG_RESET
865 INIT_FUNC_WATCHDOG_RESET
867 * Now that we have DRAM mapped and working, we can
868 * relocate the code and continue running from DRAM.
870 * Reserve memory at end of RAM for (top down in that order):
871 * - area that won't get touched by U-Boot and Linux (optional)
872 * - kernel log buffer
876 * - board info struct
879 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
880 /* Blackfin u-boot monitor should be on top of the ram */
883 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
890 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
898 /* TODO: Why the dependency on CONFIG_8xx? */
899 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
900 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
901 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
904 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
907 #ifndef CONFIG_SPL_BUILD
918 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
920 INIT_FUNC_WATCHDOG_RESET
924 #ifdef CONFIG_SYS_EXTBDINFO
927 INIT_FUNC_WATCHDOG_RESET
930 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
935 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
941 void board_init_f(ulong boot_flags
)
943 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
945 * For some archtectures, global data is initialized and used before
946 * calling this function. The data should be preserved. For others,
947 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
948 * here to host global data until relocation.
955 * Clear global data before it is accessed at debug print
956 * in initcall_run_list. Otherwise the debug print probably
957 * get the wrong vaule of gd->have_console.
962 gd
->flags
= boot_flags
;
963 gd
->have_console
= 0;
965 if (initcall_run_list(init_sequence_f
))
968 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
969 /* NOTREACHED - jump_to_copy() does not return */
974 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
976 * For now this code is only used on x86.
978 * init_sequence_f_r is the list of init functions which are run when
979 * U-Boot is executing from Flash with a semi-limited 'C' environment.
980 * The following limitations must be considered when implementing an
982 * - 'static' variables are read-only
983 * - Global Data (gd->xxx) is read/write
985 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
986 * supported). It _should_, if possible, copy global data to RAM and
987 * initialise the CPU caches (to speed up the relocation process)
989 * NOTE: At present only x86 uses this route, but it is intended that
990 * all archs will move to this when generic relocation is implemented.
992 static init_fnc_t init_sequence_f_r
[] = {
998 void board_init_f_r(void)
1000 if (initcall_run_list(init_sequence_f_r
))
1004 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1005 * Transfer execution from Flash to RAM by calculating the address
1006 * of the in-RAM copy of board_init_r() and calling it
1008 (board_init_r
+ gd
->reloc_off
)((gd_t
*)gd
, gd
->relocaddr
);
1010 /* NOTREACHED - board_init_r() does not return */
1013 #endif /* CONFIG_X86 */
1016 ulong
board_init_f_mem(ulong top
)
1018 /* Leave space for the stack we are running with now */
1021 top
-= sizeof(struct global_data
);
1022 top
= ALIGN(top
, 16);
1023 gd
= (struct global_data
*)top
;
1024 memset((void *)gd
, '\0', sizeof(*gd
));
1026 #ifdef CONFIG_SYS_MALLOC_F_LEN
1027 top
-= CONFIG_SYS_MALLOC_F_LEN
;
1028 gd
->malloc_base
= top
;
1033 #endif /* !CONFIG_X86 */