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1 /*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13 #include <common.h>
14 #include <linux/compiler.h>
15 #include <version.h>
16 #include <environment.h>
17 #include <dm.h>
18 #include <fdtdec.h>
19 #include <fs.h>
20 #if defined(CONFIG_CMD_IDE)
21 #include <ide.h>
22 #endif
23 #include <i2c.h>
24 #include <initcall.h>
25 #include <logbuff.h>
26
27 /* TODO: Can we move these into arch/ headers? */
28 #ifdef CONFIG_8xx
29 #include <mpc8xx.h>
30 #endif
31 #ifdef CONFIG_5xx
32 #include <mpc5xx.h>
33 #endif
34 #ifdef CONFIG_MPC5xxx
35 #include <mpc5xxx.h>
36 #endif
37 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
38 #include <asm/mp.h>
39 #endif
40
41 #include <os.h>
42 #include <post.h>
43 #include <spi.h>
44 #include <status_led.h>
45 #include <trace.h>
46 #include <watchdog.h>
47 #include <asm/errno.h>
48 #include <asm/io.h>
49 #include <asm/sections.h>
50 #ifdef CONFIG_X86
51 #include <asm/init_helpers.h>
52 #include <asm/relocate.h>
53 #endif
54 #ifdef CONFIG_SANDBOX
55 #include <asm/state.h>
56 #endif
57 #include <dm/root.h>
58 #include <linux/compiler.h>
59
60 /*
61 * Pointer to initial global data area
62 *
63 * Here we initialize it if needed.
64 */
65 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
66 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
67 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
68 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
69 #else
70 DECLARE_GLOBAL_DATA_PTR;
71 #endif
72
73 /*
74 * sjg: IMO this code should be
75 * refactored to a single function, something like:
76 *
77 * void led_set_state(enum led_colour_t colour, int on);
78 */
79 /************************************************************************
80 * Coloured LED functionality
81 ************************************************************************
82 * May be supplied by boards if desired
83 */
84 __weak void coloured_LED_init(void) {}
85 __weak void red_led_on(void) {}
86 __weak void red_led_off(void) {}
87 __weak void green_led_on(void) {}
88 __weak void green_led_off(void) {}
89 __weak void yellow_led_on(void) {}
90 __weak void yellow_led_off(void) {}
91 __weak void blue_led_on(void) {}
92 __weak void blue_led_off(void) {}
93
94 /*
95 * Why is gd allocated a register? Prior to reloc it might be better to
96 * just pass it around to each function in this file?
97 *
98 * After reloc one could argue that it is hardly used and doesn't need
99 * to be in a register. Or if it is it should perhaps hold pointers to all
100 * global data for all modules, so that post-reloc we can avoid the massive
101 * literal pool we get on ARM. Or perhaps just encourage each module to use
102 * a structure...
103 */
104
105 /*
106 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
107 */
108
109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
110 static int init_func_watchdog_init(void)
111 {
112 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
114 defined(CONFIG_SH))
115 hw_watchdog_init();
116 # endif
117 puts(" Watchdog enabled\n");
118 WATCHDOG_RESET();
119
120 return 0;
121 }
122
123 int init_func_watchdog_reset(void)
124 {
125 WATCHDOG_RESET();
126
127 return 0;
128 }
129 #endif /* CONFIG_WATCHDOG */
130
131 __weak void board_add_ram_info(int use_default)
132 {
133 /* please define platform specific board_add_ram_info() */
134 }
135
136 static int init_baud_rate(void)
137 {
138 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
139 return 0;
140 }
141
142 static int display_text_info(void)
143 {
144 #ifndef CONFIG_SANDBOX
145 ulong bss_start, bss_end, text_base;
146
147 bss_start = (ulong)&__bss_start;
148 bss_end = (ulong)&__bss_end;
149
150 #ifdef CONFIG_SYS_TEXT_BASE
151 text_base = CONFIG_SYS_TEXT_BASE;
152 #else
153 text_base = CONFIG_SYS_MONITOR_BASE;
154 #endif
155
156 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
157 text_base, bss_start, bss_end);
158 #endif
159
160 #ifdef CONFIG_MODEM_SUPPORT
161 debug("Modem Support enabled\n");
162 #endif
163 #ifdef CONFIG_USE_IRQ
164 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
165 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
166 #endif
167
168 return 0;
169 }
170
171 static int announce_dram_init(void)
172 {
173 puts("DRAM: ");
174 return 0;
175 }
176
177 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
178 static int init_func_ram(void)
179 {
180 #ifdef CONFIG_BOARD_TYPES
181 int board_type = gd->board_type;
182 #else
183 int board_type = 0; /* use dummy arg */
184 #endif
185
186 gd->ram_size = initdram(board_type);
187
188 if (gd->ram_size > 0)
189 return 0;
190
191 puts("*** failed ***\n");
192 return 1;
193 }
194 #endif
195
196 static int show_dram_config(void)
197 {
198 unsigned long long size;
199
200 #ifdef CONFIG_NR_DRAM_BANKS
201 int i;
202
203 debug("\nRAM Configuration:\n");
204 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
205 size += gd->bd->bi_dram[i].size;
206 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
207 #ifdef DEBUG
208 print_size(gd->bd->bi_dram[i].size, "\n");
209 #endif
210 }
211 debug("\nDRAM: ");
212 #else
213 size = gd->ram_size;
214 #endif
215
216 print_size(size, "");
217 board_add_ram_info(0);
218 putc('\n');
219
220 return 0;
221 }
222
223 __weak void dram_init_banksize(void)
224 {
225 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
226 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
227 gd->bd->bi_dram[0].size = get_effective_memsize();
228 #endif
229 }
230
231 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
232 static int init_func_i2c(void)
233 {
234 puts("I2C: ");
235 #ifdef CONFIG_SYS_I2C
236 i2c_init_all();
237 #else
238 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
239 #endif
240 puts("ready\n");
241 return 0;
242 }
243 #endif
244
245 #if defined(CONFIG_HARD_SPI)
246 static int init_func_spi(void)
247 {
248 puts("SPI: ");
249 spi_init();
250 puts("ready\n");
251 return 0;
252 }
253 #endif
254
255 __maybe_unused
256 static int zero_global_data(void)
257 {
258 memset((void *)gd, '\0', sizeof(gd_t));
259
260 return 0;
261 }
262
263 static int setup_mon_len(void)
264 {
265 #ifdef __ARM__
266 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
267 #elif defined(CONFIG_SANDBOX)
268 gd->mon_len = (ulong)&_end - (ulong)_init;
269 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
270 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
271 #else
272 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
273 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
274 #endif
275 return 0;
276 }
277
278 __weak int arch_cpu_init(void)
279 {
280 return 0;
281 }
282
283 #ifdef CONFIG_OF_HOSTFILE
284
285 static int read_fdt_from_file(void)
286 {
287 struct sandbox_state *state = state_get_current();
288 const char *fname = state->fdt_fname;
289 void *blob;
290 loff_t size;
291 int err;
292 int fd;
293
294 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
295 if (!state->fdt_fname) {
296 err = fdt_create_empty_tree(blob, 256);
297 if (!err)
298 goto done;
299 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
300 return -EINVAL;
301 }
302
303 err = os_get_filesize(fname, &size);
304 if (err < 0) {
305 printf("Failed to file FDT file '%s'\n", fname);
306 return err;
307 }
308 fd = os_open(fname, OS_O_RDONLY);
309 if (fd < 0) {
310 printf("Failed to open FDT file '%s'\n", fname);
311 return -EACCES;
312 }
313 if (os_read(fd, blob, size) != size) {
314 os_close(fd);
315 return -EIO;
316 }
317 os_close(fd);
318
319 done:
320 gd->fdt_blob = blob;
321
322 return 0;
323 }
324 #endif
325
326 #ifdef CONFIG_SANDBOX
327 static int setup_ram_buf(void)
328 {
329 struct sandbox_state *state = state_get_current();
330
331 gd->arch.ram_buf = state->ram_buf;
332 gd->ram_size = state->ram_size;
333
334 return 0;
335 }
336 #endif
337
338 static int setup_fdt(void)
339 {
340 #ifdef CONFIG_OF_CONTROL
341 # ifdef CONFIG_OF_EMBED
342 /* Get a pointer to the FDT */
343 gd->fdt_blob = __dtb_dt_begin;
344 # elif defined CONFIG_OF_SEPARATE
345 /* FDT is at end of image */
346 gd->fdt_blob = (ulong *)&_end;
347 # elif defined(CONFIG_OF_HOSTFILE)
348 if (read_fdt_from_file()) {
349 puts("Failed to read control FDT\n");
350 return -1;
351 }
352 # endif
353 /* Allow the early environment to override the fdt address */
354 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
355 (uintptr_t)gd->fdt_blob);
356 #endif
357 return 0;
358 }
359
360 /* Get the top of usable RAM */
361 __weak ulong board_get_usable_ram_top(ulong total_size)
362 {
363 return gd->ram_top;
364 }
365
366 static int setup_dest_addr(void)
367 {
368 debug("Monitor len: %08lX\n", gd->mon_len);
369 /*
370 * Ram is setup, size stored in gd !!
371 */
372 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
373 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
374 /*
375 * Subtract specified amount of memory to hide so that it won't
376 * get "touched" at all by U-Boot. By fixing up gd->ram_size
377 * the Linux kernel should now get passed the now "corrected"
378 * memory size and won't touch it either. This should work
379 * for arch/ppc and arch/powerpc. Only Linux board ports in
380 * arch/powerpc with bootwrapper support, that recalculate the
381 * memory size from the SDRAM controller setup will have to
382 * get fixed.
383 */
384 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
385 #endif
386 #ifdef CONFIG_SYS_SDRAM_BASE
387 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
388 #endif
389 gd->ram_top += get_effective_memsize();
390 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
391 gd->relocaddr = gd->ram_top;
392 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
393 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
394 /*
395 * We need to make sure the location we intend to put secondary core
396 * boot code is reserved and not used by any part of u-boot
397 */
398 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
399 gd->relocaddr = determine_mp_bootpg(NULL);
400 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
401 }
402 #endif
403 return 0;
404 }
405
406 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
407 static int reserve_logbuffer(void)
408 {
409 /* reserve kernel log buffer */
410 gd->relocaddr -= LOGBUFF_RESERVE;
411 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
412 gd->relocaddr);
413 return 0;
414 }
415 #endif
416
417 #ifdef CONFIG_PRAM
418 /* reserve protected RAM */
419 static int reserve_pram(void)
420 {
421 ulong reg;
422
423 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
424 gd->relocaddr -= (reg << 10); /* size is in kB */
425 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
426 gd->relocaddr);
427 return 0;
428 }
429 #endif /* CONFIG_PRAM */
430
431 /* Round memory pointer down to next 4 kB limit */
432 static int reserve_round_4k(void)
433 {
434 gd->relocaddr &= ~(4096 - 1);
435 return 0;
436 }
437
438 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
439 defined(CONFIG_ARM)
440 static int reserve_mmu(void)
441 {
442 /* reserve TLB table */
443 gd->arch.tlb_size = PGTABLE_SIZE;
444 gd->relocaddr -= gd->arch.tlb_size;
445
446 /* round down to next 64 kB limit */
447 gd->relocaddr &= ~(0x10000 - 1);
448
449 gd->arch.tlb_addr = gd->relocaddr;
450 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
451 gd->arch.tlb_addr + gd->arch.tlb_size);
452 return 0;
453 }
454 #endif
455
456 #ifdef CONFIG_LCD
457 static int reserve_lcd(void)
458 {
459 #ifdef CONFIG_FB_ADDR
460 gd->fb_base = CONFIG_FB_ADDR;
461 #else
462 /* reserve memory for LCD display (always full pages) */
463 gd->relocaddr = lcd_setmem(gd->relocaddr);
464 gd->fb_base = gd->relocaddr;
465 #endif /* CONFIG_FB_ADDR */
466 return 0;
467 }
468 #endif /* CONFIG_LCD */
469
470 static int reserve_trace(void)
471 {
472 #ifdef CONFIG_TRACE
473 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
474 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
475 debug("Reserving %dk for trace data at: %08lx\n",
476 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
477 #endif
478
479 return 0;
480 }
481
482 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
483 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
484 !defined(CONFIG_BLACKFIN)
485 static int reserve_video(void)
486 {
487 /* reserve memory for video display (always full pages) */
488 gd->relocaddr = video_setmem(gd->relocaddr);
489 gd->fb_base = gd->relocaddr;
490
491 return 0;
492 }
493 #endif
494
495 static int reserve_uboot(void)
496 {
497 /*
498 * reserve memory for U-Boot code, data & bss
499 * round down to next 4 kB limit
500 */
501 gd->relocaddr -= gd->mon_len;
502 gd->relocaddr &= ~(4096 - 1);
503 #ifdef CONFIG_E500
504 /* round down to next 64 kB limit so that IVPR stays aligned */
505 gd->relocaddr &= ~(65536 - 1);
506 #endif
507
508 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
509 gd->relocaddr);
510
511 gd->start_addr_sp = gd->relocaddr;
512
513 return 0;
514 }
515
516 #ifndef CONFIG_SPL_BUILD
517 /* reserve memory for malloc() area */
518 static int reserve_malloc(void)
519 {
520 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
521 debug("Reserving %dk for malloc() at: %08lx\n",
522 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
523 return 0;
524 }
525
526 /* (permanently) allocate a Board Info struct */
527 static int reserve_board(void)
528 {
529 if (!gd->bd) {
530 gd->start_addr_sp -= sizeof(bd_t);
531 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
532 memset(gd->bd, '\0', sizeof(bd_t));
533 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
534 sizeof(bd_t), gd->start_addr_sp);
535 }
536 return 0;
537 }
538 #endif
539
540 static int setup_machine(void)
541 {
542 #ifdef CONFIG_MACH_TYPE
543 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
544 #endif
545 return 0;
546 }
547
548 static int reserve_global_data(void)
549 {
550 gd->start_addr_sp -= sizeof(gd_t);
551 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
552 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
553 sizeof(gd_t), gd->start_addr_sp);
554 return 0;
555 }
556
557 static int reserve_fdt(void)
558 {
559 /*
560 * If the device tree is sitting immediate above our image then we
561 * must relocate it. If it is embedded in the data section, then it
562 * will be relocated with other data.
563 */
564 if (gd->fdt_blob) {
565 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
566
567 gd->start_addr_sp -= gd->fdt_size;
568 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
569 debug("Reserving %lu Bytes for FDT at: %08lx\n",
570 gd->fdt_size, gd->start_addr_sp);
571 }
572
573 return 0;
574 }
575
576 static int reserve_stacks(void)
577 {
578 #ifdef CONFIG_SPL_BUILD
579 # ifdef CONFIG_ARM
580 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
581 gd->irq_sp = gd->start_addr_sp;
582 # endif
583 #else
584 # ifdef CONFIG_PPC
585 ulong *s;
586 # endif
587
588 /* setup stack pointer for exceptions */
589 gd->start_addr_sp -= 16;
590 gd->start_addr_sp &= ~0xf;
591 gd->irq_sp = gd->start_addr_sp;
592
593 /*
594 * Handle architecture-specific things here
595 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
596 * to handle this and put in arch/xxx/lib/stack.c
597 */
598 # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
599 # ifdef CONFIG_USE_IRQ
600 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
601 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
602 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
603
604 /* 8-byte alignment for ARM ABI compliance */
605 gd->start_addr_sp &= ~0x07;
606 # endif
607 /* leave 3 words for abort-stack, plus 1 for alignment */
608 gd->start_addr_sp -= 16;
609 # elif defined(CONFIG_PPC)
610 /* Clear initial stack frame */
611 s = (ulong *) gd->start_addr_sp;
612 *s = 0; /* Terminate back chain */
613 *++s = 0; /* NULL return address */
614 # endif /* Architecture specific code */
615
616 return 0;
617 #endif
618 }
619
620 static int display_new_sp(void)
621 {
622 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
623
624 return 0;
625 }
626
627 #ifdef CONFIG_PPC
628 static int setup_board_part1(void)
629 {
630 bd_t *bd = gd->bd;
631
632 /*
633 * Save local variables to board info struct
634 */
635
636 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
637 bd->bi_memsize = gd->ram_size; /* size in bytes */
638
639 #ifdef CONFIG_SYS_SRAM_BASE
640 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
641 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
642 #endif
643
644 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
645 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
646 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
647 #endif
648 #if defined(CONFIG_MPC5xxx)
649 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
650 #endif
651 #if defined(CONFIG_MPC83xx)
652 bd->bi_immrbar = CONFIG_SYS_IMMR;
653 #endif
654
655 return 0;
656 }
657
658 static int setup_board_part2(void)
659 {
660 bd_t *bd = gd->bd;
661
662 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
663 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
664 #if defined(CONFIG_CPM2)
665 bd->bi_cpmfreq = gd->arch.cpm_clk;
666 bd->bi_brgfreq = gd->arch.brg_clk;
667 bd->bi_sccfreq = gd->arch.scc_clk;
668 bd->bi_vco = gd->arch.vco_out;
669 #endif /* CONFIG_CPM2 */
670 #if defined(CONFIG_MPC512X)
671 bd->bi_ipsfreq = gd->arch.ips_clk;
672 #endif /* CONFIG_MPC512X */
673 #if defined(CONFIG_MPC5xxx)
674 bd->bi_ipbfreq = gd->arch.ipb_clk;
675 bd->bi_pcifreq = gd->pci_clk;
676 #endif /* CONFIG_MPC5xxx */
677
678 return 0;
679 }
680 #endif
681
682 #ifdef CONFIG_SYS_EXTBDINFO
683 static int setup_board_extra(void)
684 {
685 bd_t *bd = gd->bd;
686
687 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
688 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
689 sizeof(bd->bi_r_version));
690
691 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
692 bd->bi_plb_busfreq = gd->bus_clk;
693 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
694 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
695 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
696 bd->bi_pci_busfreq = get_PCI_freq();
697 bd->bi_opbfreq = get_OPB_freq();
698 #elif defined(CONFIG_XILINX_405)
699 bd->bi_pci_busfreq = get_PCI_freq();
700 #endif
701
702 return 0;
703 }
704 #endif
705
706 #ifdef CONFIG_POST
707 static int init_post(void)
708 {
709 post_bootmode_init();
710 post_run(NULL, POST_ROM | post_bootmode_get(0));
711
712 return 0;
713 }
714 #endif
715
716 static int setup_dram_config(void)
717 {
718 /* Ram is board specific, so move it to board code ... */
719 dram_init_banksize();
720
721 return 0;
722 }
723
724 static int reloc_fdt(void)
725 {
726 if (gd->new_fdt) {
727 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
728 gd->fdt_blob = gd->new_fdt;
729 }
730
731 return 0;
732 }
733
734 static int setup_reloc(void)
735 {
736 #ifdef CONFIG_SYS_TEXT_BASE
737 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
738 #endif
739 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
740
741 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
742 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
743 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
744 gd->start_addr_sp);
745
746 return 0;
747 }
748
749 /* ARM calls relocate_code from its crt0.S */
750 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
751
752 static int jump_to_copy(void)
753 {
754 /*
755 * x86 is special, but in a nice way. It uses a trampoline which
756 * enables the dcache if possible.
757 *
758 * For now, other archs use relocate_code(), which is implemented
759 * similarly for all archs. When we do generic relocation, hopefully
760 * we can make all archs enable the dcache prior to relocation.
761 */
762 #ifdef CONFIG_X86
763 /*
764 * SDRAM and console are now initialised. The final stack can now
765 * be setup in SDRAM. Code execution will continue in Flash, but
766 * with the stack in SDRAM and Global Data in temporary memory
767 * (CPU cache)
768 */
769 board_init_f_r_trampoline(gd->start_addr_sp);
770 #else
771 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
772 #endif
773
774 return 0;
775 }
776 #endif
777
778 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
779 static int mark_bootstage(void)
780 {
781 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
782
783 return 0;
784 }
785
786 static int initf_malloc(void)
787 {
788 #ifdef CONFIG_SYS_MALLOC_F_LEN
789 assert(gd->malloc_base); /* Set up by crt0.S */
790 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
791 gd->malloc_ptr = 0;
792 #endif
793
794 return 0;
795 }
796
797 static int initf_dm(void)
798 {
799 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
800 int ret;
801
802 ret = dm_init_and_scan(true);
803 if (ret)
804 return ret;
805 #endif
806
807 return 0;
808 }
809
810 /* Architecture-specific memory reservation */
811 __weak int reserve_arch(void)
812 {
813 return 0;
814 }
815
816 static init_fnc_t init_sequence_f[] = {
817 #ifdef CONFIG_SANDBOX
818 setup_ram_buf,
819 #endif
820 setup_mon_len,
821 setup_fdt,
822 #ifdef CONFIG_TRACE
823 trace_early_init,
824 #endif
825 initf_malloc,
826 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
827 /* TODO: can this go into arch_cpu_init()? */
828 probecpu,
829 #endif
830 arch_cpu_init, /* basic arch cpu dependent setup */
831 mark_bootstage,
832 #ifdef CONFIG_OF_CONTROL
833 fdtdec_check_fdt,
834 #endif
835 initf_dm,
836 #if defined(CONFIG_BOARD_EARLY_INIT_F)
837 board_early_init_f,
838 #endif
839 /* TODO: can any of this go into arch_cpu_init()? */
840 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
841 get_clocks, /* get CPU and bus clocks (etc.) */
842 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
843 && !defined(CONFIG_TQM885D)
844 adjust_sdram_tbs_8xx,
845 #endif
846 /* TODO: can we rename this to timer_init()? */
847 init_timebase,
848 #endif
849 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
850 timer_init, /* initialize timer */
851 #endif
852 #ifdef CONFIG_SYS_ALLOC_DPRAM
853 #if !defined(CONFIG_CPM2)
854 dpram_init,
855 #endif
856 #endif
857 #if defined(CONFIG_BOARD_POSTCLK_INIT)
858 board_postclk_init,
859 #endif
860 #ifdef CONFIG_FSL_ESDHC
861 get_clocks,
862 #endif
863 env_init, /* initialize environment */
864 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
865 /* get CPU and bus clocks according to the environment variable */
866 get_clocks_866,
867 /* adjust sdram refresh rate according to the new clock */
868 sdram_adjust_866,
869 init_timebase,
870 #endif
871 init_baud_rate, /* initialze baudrate settings */
872 serial_init, /* serial communications setup */
873 console_init_f, /* stage 1 init of console */
874 #ifdef CONFIG_SANDBOX
875 sandbox_early_getopt_check,
876 #endif
877 #ifdef CONFIG_OF_CONTROL
878 fdtdec_prepare_fdt,
879 #endif
880 display_options, /* say that we are here */
881 display_text_info, /* show debugging info if required */
882 #if defined(CONFIG_MPC8260)
883 prt_8260_rsr,
884 prt_8260_clks,
885 #endif /* CONFIG_MPC8260 */
886 #if defined(CONFIG_MPC83xx)
887 prt_83xx_rsr,
888 #endif
889 #ifdef CONFIG_PPC
890 checkcpu,
891 #endif
892 print_cpuinfo, /* display cpu info (and speed) */
893 #if defined(CONFIG_MPC5xxx)
894 prt_mpc5xxx_clks,
895 #endif /* CONFIG_MPC5xxx */
896 #if defined(CONFIG_DISPLAY_BOARDINFO)
897 checkboard, /* display board info */
898 #endif
899 INIT_FUNC_WATCHDOG_INIT
900 #if defined(CONFIG_MISC_INIT_F)
901 misc_init_f,
902 #endif
903 INIT_FUNC_WATCHDOG_RESET
904 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
905 init_func_i2c,
906 #endif
907 #if defined(CONFIG_HARD_SPI)
908 init_func_spi,
909 #endif
910 announce_dram_init,
911 /* TODO: unify all these dram functions? */
912 #if defined(CONFIG_ARM) || defined(CONFIG_X86)
913 dram_init, /* configure available RAM banks */
914 #endif
915 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
916 init_func_ram,
917 #endif
918 #ifdef CONFIG_POST
919 post_init_f,
920 #endif
921 INIT_FUNC_WATCHDOG_RESET
922 #if defined(CONFIG_SYS_DRAM_TEST)
923 testdram,
924 #endif /* CONFIG_SYS_DRAM_TEST */
925 INIT_FUNC_WATCHDOG_RESET
926
927 #ifdef CONFIG_POST
928 init_post,
929 #endif
930 INIT_FUNC_WATCHDOG_RESET
931 /*
932 * Now that we have DRAM mapped and working, we can
933 * relocate the code and continue running from DRAM.
934 *
935 * Reserve memory at end of RAM for (top down in that order):
936 * - area that won't get touched by U-Boot and Linux (optional)
937 * - kernel log buffer
938 * - protected RAM
939 * - LCD framebuffer
940 * - monitor code
941 * - board info struct
942 */
943 setup_dest_addr,
944 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
945 /* Blackfin u-boot monitor should be on top of the ram */
946 reserve_uboot,
947 #endif
948 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
949 reserve_logbuffer,
950 #endif
951 #ifdef CONFIG_PRAM
952 reserve_pram,
953 #endif
954 reserve_round_4k,
955 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
956 defined(CONFIG_ARM)
957 reserve_mmu,
958 #endif
959 #ifdef CONFIG_LCD
960 reserve_lcd,
961 #endif
962 reserve_trace,
963 /* TODO: Why the dependency on CONFIG_8xx? */
964 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
965 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
966 !defined(CONFIG_BLACKFIN)
967 reserve_video,
968 #endif
969 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
970 reserve_uboot,
971 #endif
972 #ifndef CONFIG_SPL_BUILD
973 reserve_malloc,
974 reserve_board,
975 #endif
976 setup_machine,
977 reserve_global_data,
978 reserve_fdt,
979 reserve_arch,
980 reserve_stacks,
981 setup_dram_config,
982 show_dram_config,
983 #ifdef CONFIG_PPC
984 setup_board_part1,
985 INIT_FUNC_WATCHDOG_RESET
986 setup_board_part2,
987 #endif
988 display_new_sp,
989 #ifdef CONFIG_SYS_EXTBDINFO
990 setup_board_extra,
991 #endif
992 INIT_FUNC_WATCHDOG_RESET
993 reloc_fdt,
994 setup_reloc,
995 #ifdef CONFIG_X86
996 copy_uboot_to_ram,
997 clear_bss,
998 do_elf_reloc_fixups,
999 #endif
1000 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1001 jump_to_copy,
1002 #endif
1003 NULL,
1004 };
1005
1006 void board_init_f(ulong boot_flags)
1007 {
1008 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1009 /*
1010 * For some archtectures, global data is initialized and used before
1011 * calling this function. The data should be preserved. For others,
1012 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1013 * here to host global data until relocation.
1014 */
1015 gd_t data;
1016
1017 gd = &data;
1018
1019 /*
1020 * Clear global data before it is accessed at debug print
1021 * in initcall_run_list. Otherwise the debug print probably
1022 * get the wrong vaule of gd->have_console.
1023 */
1024 zero_global_data();
1025 #endif
1026
1027 gd->flags = boot_flags;
1028 gd->have_console = 0;
1029
1030 if (initcall_run_list(init_sequence_f))
1031 hang();
1032
1033 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1034 /* NOTREACHED - jump_to_copy() does not return */
1035 hang();
1036 #endif
1037 }
1038
1039 #ifdef CONFIG_X86
1040 /*
1041 * For now this code is only used on x86.
1042 *
1043 * init_sequence_f_r is the list of init functions which are run when
1044 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1045 * The following limitations must be considered when implementing an
1046 * '_f_r' function:
1047 * - 'static' variables are read-only
1048 * - Global Data (gd->xxx) is read/write
1049 *
1050 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1051 * supported). It _should_, if possible, copy global data to RAM and
1052 * initialise the CPU caches (to speed up the relocation process)
1053 *
1054 * NOTE: At present only x86 uses this route, but it is intended that
1055 * all archs will move to this when generic relocation is implemented.
1056 */
1057 static init_fnc_t init_sequence_f_r[] = {
1058 init_cache_f_r,
1059
1060 NULL,
1061 };
1062
1063 void board_init_f_r(void)
1064 {
1065 if (initcall_run_list(init_sequence_f_r))
1066 hang();
1067
1068 /*
1069 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1070 * Transfer execution from Flash to RAM by calculating the address
1071 * of the in-RAM copy of board_init_r() and calling it
1072 */
1073 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1074
1075 /* NOTREACHED - board_init_r() does not return */
1076 hang();
1077 }
1078 #endif /* CONFIG_X86 */