3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * I2C Functions similar to the standard memory functions.
27 * There are several parameters in many of the commands that bear further
30 * Two of the commands (imm and imw) take a byte/word/long modifier
31 * (e.g. imm.w specifies the word-length modifier). This was done to
32 * allow manipulating word-length registers. It was not done on any other
33 * commands because it was not deemed useful.
35 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
36 * Each I2C chip on the bus has a unique address. On the I2C data bus,
37 * the address is the upper seven bits and the LSB is the "read/write"
38 * bit. Note that the {i2c_chip} address specified on the command
39 * line is not shifted up: e.g. a typical EEPROM memory chip may have
40 * an I2C address of 0x50, but the data put on the bus will be 0xA0
41 * for write and 0xA1 for read. This "non shifted" address notation
42 * matches at least half of the data sheets :-/.
44 * {addr} is the address (or offset) within the chip. Small memory
45 * chips have 8 bit addresses. Large memory chips have 16 bit
46 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
47 * Many non-memory chips have multiple registers and {addr} is used
48 * as the register index. Some non-memory chips have only one register
49 * and therefore don't need any {addr} parameter.
51 * The default {addr} parameter is one byte (.1) which works well for
52 * memories and registers with 8 bits of address space.
54 * You can specify the length of the {addr} field with the optional .0,
55 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
56 * manipulating a single register device which doesn't use an address
57 * field, use "0.0" for the address and the ".0" length field will
58 * suppress the address in the I2C data stream. This also works for
59 * successive reads using the I2C auto-incrementing memory pointer.
61 * If you are manipulating a large memory with 2-byte addresses, use
62 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
64 * Then there are the unfortunate memory chips that spill the most
65 * significant 1, 2, or 3 bits of address into the chip address byte.
66 * This effectively makes one chip (logically) look like 2, 4, or
67 * 8 chips. This is handled (awkwardly) by #defining
68 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
69 * {addr} field (since .1 is the default, it doesn't actually have to
70 * be specified). Examples: given a memory chip at I2C chip address
71 * 0x50, the following would happen...
72 * imd 50 0 10 display 16 bytes starting at 0x000
73 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
74 * imd 50 100 10 display 16 bytes starting at 0x100
75 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
76 * imd 50 210 10 display 16 bytes starting at 0x210
77 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
78 * This is awfully ugly. It would be nice if someone would think up
79 * a better way of handling this.
81 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
86 #include <environment.h>
89 #include <asm/byteorder.h>
91 /* Display values from last command.
92 * Memory modify remembered values are different from display memory.
94 static uchar i2c_dp_last_chip
;
95 static uint i2c_dp_last_addr
;
96 static uint i2c_dp_last_alen
;
97 static uint i2c_dp_last_length
= 0x10;
99 static uchar i2c_mm_last_chip
;
100 static uint i2c_mm_last_addr
;
101 static uint i2c_mm_last_alen
;
103 /* If only one I2C bus is present, the list of devices to ignore when
104 * the probe command is issued is represented by a 1D array of addresses.
105 * When multiple buses are present, the list is an array of bus-address
106 * pairs. The following macros take care of this */
108 #if defined(CONFIG_SYS_I2C_NOPROBES)
109 #if defined(CONFIG_I2C_MULTI_BUS)
114 } i2c_no_probes
[] = CONFIG_SYS_I2C_NOPROBES
;
115 #define GET_BUS_NUM i2c_get_bus_num()
116 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
117 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
118 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
119 #else /* single bus */
120 static uchar i2c_no_probes
[] = CONFIG_SYS_I2C_NOPROBES
;
121 #define GET_BUS_NUM 0
122 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
123 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
124 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
125 #endif /* CONFIG_MULTI_BUS */
127 #define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0]))
130 #if defined(CONFIG_I2C_MUX)
131 static I2C_MUX_DEVICE
*i2c_mux_devices
= NULL
;
132 static int i2c_mux_busid
= CONFIG_SYS_MAX_I2C_BUS
;
134 DECLARE_GLOBAL_DATA_PTR
;
139 mod_i2c_mem(cmd_tbl_t
*cmdtp
, int incrflag
, int flag
, int argc
, char *argv
[]);
143 * imd {i2c_chip} {addr}{.0, .1, .2} {len}
145 #define DISP_LINE_LEN 16
147 int do_i2c_md ( cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
150 uint addr
, alen
, length
;
151 int j
, nbytes
, linebytes
;
153 /* We use the last specified parameters, unless new ones are
156 chip
= i2c_dp_last_chip
;
157 addr
= i2c_dp_last_addr
;
158 alen
= i2c_dp_last_alen
;
159 length
= i2c_dp_last_length
;
162 printf ("Usage:\n%s\n", cmdtp
->usage
);
166 if ((flag
& CMD_FLAG_REPEAT
) == 0) {
168 * New command specified.
175 chip
= simple_strtoul(argv
[1], NULL
, 16);
178 * I2C data address within the chip. This can be 1 or
179 * 2 bytes long. Some day it might be 3 bytes long :-).
181 addr
= simple_strtoul(argv
[2], NULL
, 16);
183 for (j
= 0; j
< 8; j
++) {
184 if (argv
[2][j
] == '.') {
185 alen
= argv
[2][j
+1] - '0';
187 printf ("Usage:\n%s\n", cmdtp
->usage
);
191 } else if (argv
[2][j
] == '\0')
196 * If another parameter, it is the length to display.
197 * Length is the number of objects, not number of bytes.
200 length
= simple_strtoul(argv
[3], NULL
, 16);
206 * We buffer all read data, so we can make sure data is read only
211 unsigned char linebuf
[DISP_LINE_LEN
];
214 linebytes
= (nbytes
> DISP_LINE_LEN
) ? DISP_LINE_LEN
: nbytes
;
216 if (i2c_read(chip
, addr
, alen
, linebuf
, linebytes
) != 0)
217 puts ("Error reading the chip.\n");
219 printf("%04x:", addr
);
221 for (j
=0; j
<linebytes
; j
++) {
222 printf(" %02x", *cp
++);
227 for (j
=0; j
<linebytes
; j
++) {
228 if ((*cp
< 0x20) || (*cp
> 0x7e))
237 } while (nbytes
> 0);
239 i2c_dp_last_chip
= chip
;
240 i2c_dp_last_addr
= addr
;
241 i2c_dp_last_alen
= alen
;
242 i2c_dp_last_length
= length
;
247 int do_i2c_mm ( cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
249 return mod_i2c_mem (cmdtp
, 1, flag
, argc
, argv
);
252 int do_i2c_nm ( cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
254 return mod_i2c_mem (cmdtp
, 0, flag
, argc
, argv
);
257 /* Write (fill) memory
260 * imw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
262 int do_i2c_mw ( cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
271 if ((argc
< 4) || (argc
> 5)) {
272 printf ("Usage:\n%s\n", cmdtp
->usage
);
277 * Chip is always specified.
279 chip
= simple_strtoul(argv
[1], NULL
, 16);
282 * Address is always specified.
284 addr
= simple_strtoul(argv
[2], NULL
, 16);
286 for (j
= 0; j
< 8; j
++) {
287 if (argv
[2][j
] == '.') {
288 alen
= argv
[2][j
+1] - '0';
290 printf ("Usage:\n%s\n", cmdtp
->usage
);
294 } else if (argv
[2][j
] == '\0')
299 * Value to write is always specified.
301 byte
= simple_strtoul(argv
[3], NULL
, 16);
307 count
= simple_strtoul(argv
[4], NULL
, 16);
311 while (count
-- > 0) {
312 if (i2c_write(chip
, addr
++, alen
, &byte
, 1) != 0)
313 puts ("Error writing the chip.\n");
315 * Wait for the write to complete. The write can take
316 * up to 10mSec (we allow a little more time).
318 * On some chips, while the write is in progress, the
319 * chip doesn't respond. This apparently isn't a
320 * universal feature so we don't take advantage of it.
323 * No write delay with FRAM devices.
325 #if !defined(CONFIG_SYS_I2C_FRAM)
330 for (timeout
= 0; timeout
< 10; timeout
++) {
332 if (i2c_probe(chip
) == 0)
341 /* Calculate a CRC on memory
344 * icrc32 {i2c_chip} {addr}{.0, .1, .2} {count}
346 int do_i2c_crc (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
358 printf ("Usage:\n%s\n", cmdtp
->usage
);
363 * Chip is always specified.
365 chip
= simple_strtoul(argv
[1], NULL
, 16);
368 * Address is always specified.
370 addr
= simple_strtoul(argv
[2], NULL
, 16);
372 for (j
= 0; j
< 8; j
++) {
373 if (argv
[2][j
] == '.') {
374 alen
= argv
[2][j
+1] - '0';
376 printf ("Usage:\n%s\n", cmdtp
->usage
);
380 } else if (argv
[2][j
] == '\0')
385 * Count is always specified
387 count
= simple_strtoul(argv
[3], NULL
, 16);
389 printf ("CRC32 for %08lx ... %08lx ==> ", addr
, addr
+ count
- 1);
391 * CRC a byte at a time. This is going to be slooow, but hey, the
392 * memories are small and slow too so hopefully nobody notices.
396 while (count
-- > 0) {
397 if (i2c_read(chip
, addr
, alen
, &byte
, 1) != 0)
399 crc
= crc32 (crc
, &byte
, 1);
403 puts ("Error reading the chip,\n");
405 printf ("%08lx\n", crc
);
413 * imm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
414 * inm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
418 mod_i2c_mem(cmd_tbl_t
*cmdtp
, int incrflag
, int flag
, int argc
, char *argv
[])
427 extern char console_buffer
[];
430 printf ("Usage:\n%s\n", cmdtp
->usage
);
434 #ifdef CONFIG_BOOT_RETRY_TIME
435 reset_cmd_timeout(); /* got a good command to get here */
438 * We use the last specified parameters, unless new ones are
441 chip
= i2c_mm_last_chip
;
442 addr
= i2c_mm_last_addr
;
443 alen
= i2c_mm_last_alen
;
445 if ((flag
& CMD_FLAG_REPEAT
) == 0) {
447 * New command specified. Check for a size specification.
448 * Defaults to byte if no or incorrect specification.
450 size
= cmd_get_data_size(argv
[0], 1);
453 * Chip is always specified.
455 chip
= simple_strtoul(argv
[1], NULL
, 16);
458 * Address is always specified.
460 addr
= simple_strtoul(argv
[2], NULL
, 16);
462 for (j
= 0; j
< 8; j
++) {
463 if (argv
[2][j
] == '.') {
464 alen
= argv
[2][j
+1] - '0';
466 printf ("Usage:\n%s\n", cmdtp
->usage
);
470 } else if (argv
[2][j
] == '\0')
476 * Print the address, followed by value. Then accept input for
477 * the next value. A non-converted value exits.
480 printf("%08lx:", addr
);
481 if (i2c_read(chip
, addr
, alen
, (uchar
*)&data
, size
) != 0)
482 puts ("\nError reading the chip,\n");
484 data
= cpu_to_be32(data
);
486 printf(" %02lx", (data
>> 24) & 0x000000FF);
488 printf(" %04lx", (data
>> 16) & 0x0000FFFF);
490 printf(" %08lx", data
);
493 nbytes
= readline (" ? ");
496 * <CR> pressed as only input, don't modify current
497 * location and move to next.
502 #ifdef CONFIG_BOOT_RETRY_TIME
503 reset_cmd_timeout(); /* good enough to not time out */
506 #ifdef CONFIG_BOOT_RETRY_TIME
507 else if (nbytes
== -2)
508 break; /* timed out, exit the command */
513 data
= simple_strtoul(console_buffer
, &endp
, 16);
518 data
= be32_to_cpu(data
);
519 nbytes
= endp
- console_buffer
;
521 #ifdef CONFIG_BOOT_RETRY_TIME
523 * good enough to not time out
527 if (i2c_write(chip
, addr
, alen
, (uchar
*)&data
, size
) != 0)
528 puts ("Error writing the chip.\n");
529 #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
530 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
* 1000);
538 i2c_mm_last_chip
= chip
;
539 i2c_mm_last_addr
= addr
;
540 i2c_mm_last_alen
= alen
;
547 * iprobe {addr}{.0, .1, .2}
549 int do_i2c_probe (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
552 #if defined(CONFIG_SYS_I2C_NOPROBES)
554 uchar bus
= GET_BUS_NUM
;
555 #endif /* NOPROBES */
557 puts ("Valid chip addresses:");
558 for (j
= 0; j
< 128; j
++) {
559 #if defined(CONFIG_SYS_I2C_NOPROBES)
561 for (k
=0; k
< NUM_ELEMENTS_NOPROBE
; k
++) {
562 if (COMPARE_BUS(bus
, k
) && COMPARE_ADDR(j
, k
)) {
570 if (i2c_probe(j
) == 0)
575 #if defined(CONFIG_SYS_I2C_NOPROBES)
576 puts ("Excluded chip addresses:");
577 for (k
=0; k
< NUM_ELEMENTS_NOPROBE
; k
++) {
578 if (COMPARE_BUS(bus
,k
))
579 printf(" %02X", NO_PROBE_ADDR(k
));
589 * iloop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
590 * {length} - Number of bytes to read
591 * {delay} - A DECIMAL number and defaults to 1000 uSec
593 int do_i2c_loop(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
604 printf ("Usage:\n%s\n", cmdtp
->usage
);
609 * Chip is always specified.
611 chip
= simple_strtoul(argv
[1], NULL
, 16);
614 * Address is always specified.
616 addr
= simple_strtoul(argv
[2], NULL
, 16);
618 for (j
= 0; j
< 8; j
++) {
619 if (argv
[2][j
] == '.') {
620 alen
= argv
[2][j
+1] - '0';
622 printf ("Usage:\n%s\n", cmdtp
->usage
);
626 } else if (argv
[2][j
] == '\0')
631 * Length is the number of objects, not number of bytes.
634 length
= simple_strtoul(argv
[3], NULL
, 16);
635 if (length
> sizeof(bytes
))
636 length
= sizeof(bytes
);
639 * The delay time (uSec) is optional.
643 delay
= simple_strtoul(argv
[4], NULL
, 10);
648 if (i2c_read(chip
, addr
, alen
, bytes
, length
) != 0)
649 puts ("Error reading the chip.\n");
658 * The SDRAM command is separately configured because many
659 * (most?) embedded boards don't use SDRAM DIMMs.
661 #if defined(CONFIG_CMD_SDRAM)
662 static void print_ddr2_tcyc (u_char
const b
)
664 printf ("%d.", (b
>> 4) & 0x0F);
676 printf ("%d ns\n", b
& 0x0F);
696 static void decode_bits (u_char
const b
, char const *str
[], int const do_once
)
700 for (mask
= 0x80; mask
!= 0x00; mask
>>= 1, ++str
) {
713 int do_sdram (cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
715 enum { unknown
, EDO
, SDRAM
, DDR2
} type
;
722 static const char *decode_CAS_DDR2
[] = {
723 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
726 static const char *decode_CAS_default
[] = {
727 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
730 static const char *decode_CS_WE_default
[] = {
731 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
734 static const char *decode_byte21_default
[] = {
736 " Redundant row address\n",
737 " Differential clock input\n",
738 " Registerd DQMB inputs\n",
739 " Buffered DQMB inputs\n",
741 " Registered address/control lines\n",
742 " Buffered address/control lines\n"
745 static const char *decode_byte22_DDR2
[] = {
751 " Supports partial array self refresh\n",
752 " Supports 50 ohm ODT\n",
753 " Supports weak driver\n"
756 static const char *decode_row_density_DDR2
[] = {
757 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
758 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
761 static const char *decode_row_density_default
[] = {
762 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
763 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
767 printf ("Usage:\n%s\n", cmdtp
->usage
);
771 * Chip is always specified.
773 chip
= simple_strtoul (argv
[1], NULL
, 16);
775 if (i2c_read (chip
, 0, 1, data
, sizeof (data
)) != 0) {
776 puts ("No SDRAM Serial Presence Detect found.\n");
781 for (j
= 0; j
< 63; j
++) {
784 if (cksum
!= data
[63]) {
785 printf ("WARNING: Configuration data checksum failure:\n"
786 " is 0x%02x, calculated 0x%02x\n", data
[63], cksum
);
788 printf ("SPD data revision %d.%d\n",
789 (data
[62] >> 4) & 0x0F, data
[62] & 0x0F);
790 printf ("Bytes used 0x%02X\n", data
[0]);
791 printf ("Serial memory size 0x%02X\n", 1 << data
[1]);
793 puts ("Memory type ");
813 puts ("Row address bits ");
814 if ((data
[3] & 0x00F0) == 0)
815 printf ("%d\n", data
[3] & 0x0F);
817 printf ("%d/%d\n", data
[3] & 0x0F, (data
[3] >> 4) & 0x0F);
819 puts ("Column address bits ");
820 if ((data
[4] & 0x00F0) == 0)
821 printf ("%d\n", data
[4] & 0x0F);
823 printf ("%d/%d\n", data
[4] & 0x0F, (data
[4] >> 4) & 0x0F);
827 printf ("Number of ranks %d\n",
828 (data
[5] & 0x07) + 1);
831 printf ("Module rows %d\n", data
[5]);
837 printf ("Module data width %d bits\n", data
[6]);
840 printf ("Module data width %d bits\n",
841 (data
[7] << 8) | data
[6]);
845 puts ("Interface signal levels ");
847 case 0: puts ("TTL 5.0 V\n"); break;
848 case 1: puts ("LVTTL\n"); break;
849 case 2: puts ("HSTL 1.5 V\n"); break;
850 case 3: puts ("SSTL 3.3 V\n"); break;
851 case 4: puts ("SSTL 2.5 V\n"); break;
852 case 5: puts ("SSTL 1.8 V\n"); break;
853 default: puts ("unknown\n"); break;
858 printf ("SDRAM cycle time ");
859 print_ddr2_tcyc (data
[9]);
862 printf ("SDRAM cycle time %d.%d ns\n",
863 (data
[9] >> 4) & 0x0F, data
[9] & 0x0F);
869 printf ("SDRAM access time 0.%d%d ns\n",
870 (data
[10] >> 4) & 0x0F, data
[10] & 0x0F);
873 printf ("SDRAM access time %d.%d ns\n",
874 (data
[10] >> 4) & 0x0F, data
[10] & 0x0F);
878 puts ("EDC configuration ");
880 case 0: puts ("None\n"); break;
881 case 1: puts ("Parity\n"); break;
882 case 2: puts ("ECC\n"); break;
883 default: puts ("unknown\n"); break;
886 if ((data
[12] & 0x80) == 0)
887 puts ("No self refresh, rate ");
889 puts ("Self refresh, rate ");
891 switch(data
[12] & 0x7F) {
892 case 0: puts ("15.625 us\n"); break;
893 case 1: puts ("3.9 us\n"); break;
894 case 2: puts ("7.8 us\n"); break;
895 case 3: puts ("31.3 us\n"); break;
896 case 4: puts ("62.5 us\n"); break;
897 case 5: puts ("125 us\n"); break;
898 default: puts ("unknown\n"); break;
903 printf ("SDRAM width (primary) %d\n", data
[13]);
906 printf ("SDRAM width (primary) %d\n", data
[13] & 0x7F);
907 if ((data
[13] & 0x80) != 0) {
908 printf (" (second bank) %d\n",
909 2 * (data
[13] & 0x7F));
917 printf ("EDC width %d\n", data
[14]);
921 printf ("EDC width %d\n",
924 if ((data
[14] & 0x80) != 0) {
925 printf (" (second bank) %d\n",
926 2 * (data
[14] & 0x7F));
933 printf ("Min clock delay, back-to-back random column addresses "
937 puts ("Burst length(s) ");
938 if (data
[16] & 0x80) puts (" Page");
939 if (data
[16] & 0x08) puts (" 8");
940 if (data
[16] & 0x04) puts (" 4");
941 if (data
[16] & 0x02) puts (" 2");
942 if (data
[16] & 0x01) puts (" 1");
944 printf ("Number of banks %d\n", data
[17]);
948 puts ("CAS latency(s) ");
949 decode_bits (data
[18], decode_CAS_DDR2
, 0);
953 puts ("CAS latency(s) ");
954 decode_bits (data
[18], decode_CAS_default
, 0);
960 puts ("CS latency(s) ");
961 decode_bits (data
[19], decode_CS_WE_default
, 0);
966 puts ("WE latency(s) ");
967 decode_bits (data
[20], decode_CS_WE_default
, 0);
973 puts ("Module attributes:\n");
975 puts (" TBD (bit 7)\n");
977 puts (" Analysis probe installed\n");
979 puts (" TBD (bit 5)\n");
981 puts (" FET switch external enable\n");
982 printf (" %d PLLs on DIMM\n", (data
[21] >> 2) & 0x03);
983 if (data
[20] & 0x11) {
984 printf (" %d active registers on DIMM\n",
985 (data
[21] & 0x03) + 1);
989 puts ("Module attributes:\n");
993 decode_bits (data
[21], decode_byte21_default
, 0);
999 decode_bits (data
[22], decode_byte22_DDR2
, 0);
1002 puts ("Device attributes:\n");
1003 if (data
[22] & 0x80) puts (" TBD (bit 7)\n");
1004 if (data
[22] & 0x40) puts (" TBD (bit 6)\n");
1005 if (data
[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1006 else puts (" Upper Vcc tolerance 10%\n");
1007 if (data
[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1008 else puts (" Lower Vcc tolerance 10%\n");
1009 if (data
[22] & 0x08) puts (" Supports write1/read burst\n");
1010 if (data
[22] & 0x04) puts (" Supports precharge all\n");
1011 if (data
[22] & 0x02) puts (" Supports auto precharge\n");
1012 if (data
[22] & 0x01) puts (" Supports early RAS# precharge\n");
1018 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1019 print_ddr2_tcyc (data
[23]);
1022 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1023 "%d ns\n", (data
[23] >> 4) & 0x0F, data
[23] & 0x0F);
1029 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1030 "%d%d ns\n", (data
[24] >> 4) & 0x0F, data
[24] & 0x0F);
1033 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1034 "%d ns\n", (data
[24] >> 4) & 0x0F, data
[24] & 0x0F);
1040 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1041 print_ddr2_tcyc (data
[25]);
1044 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1045 "%d ns\n", (data
[25] >> 4) & 0x0F, data
[25] & 0x0F);
1051 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1052 "%d%d ns\n", (data
[26] >> 4) & 0x0F, data
[26] & 0x0F);
1055 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1056 "%d ns\n", (data
[26] >> 4) & 0x0F, data
[26] & 0x0F);
1062 printf ("Minimum row precharge %d.%02d ns\n",
1063 (data
[27] >> 2) & 0x3F, 25 * (data
[27] & 0x03));
1066 printf ("Minimum row precharge %d ns\n", data
[27]);
1072 printf ("Row active to row active min %d.%02d ns\n",
1073 (data
[28] >> 2) & 0x3F, 25 * (data
[28] & 0x03));
1076 printf ("Row active to row active min %d ns\n", data
[28]);
1082 printf ("RAS to CAS delay min %d.%02d ns\n",
1083 (data
[29] >> 2) & 0x3F, 25 * (data
[29] & 0x03));
1086 printf ("RAS to CAS delay min %d ns\n", data
[29]);
1090 printf ("Minimum RAS pulse width %d ns\n", data
[30]);
1094 puts ("Density of each row ");
1095 decode_bits (data
[31], decode_row_density_DDR2
, 1);
1099 puts ("Density of each row ");
1100 decode_bits (data
[31], decode_row_density_default
, 1);
1107 puts ("Command and Address setup ");
1108 if (data
[32] >= 0xA0) {
1109 printf ("1.%d%d ns\n",
1110 ((data
[32] >> 4) & 0x0F) - 10, data
[32] & 0x0F);
1112 printf ("0.%d%d ns\n",
1113 ((data
[32] >> 4) & 0x0F), data
[32] & 0x0F);
1117 printf ("Command and Address setup %c%d.%d ns\n",
1118 (data
[32] & 0x80) ? '-' : '+',
1119 (data
[32] >> 4) & 0x07, data
[32] & 0x0F);
1125 puts ("Command and Address hold ");
1126 if (data
[33] >= 0xA0) {
1127 printf ("1.%d%d ns\n",
1128 ((data
[33] >> 4) & 0x0F) - 10, data
[33] & 0x0F);
1130 printf ("0.%d%d ns\n",
1131 ((data
[33] >> 4) & 0x0F), data
[33] & 0x0F);
1135 printf ("Command and Address hold %c%d.%d ns\n",
1136 (data
[33] & 0x80) ? '-' : '+',
1137 (data
[33] >> 4) & 0x07, data
[33] & 0x0F);
1143 printf ("Data signal input setup 0.%d%d ns\n",
1144 (data
[34] >> 4) & 0x0F, data
[34] & 0x0F);
1147 printf ("Data signal input setup %c%d.%d ns\n",
1148 (data
[34] & 0x80) ? '-' : '+',
1149 (data
[34] >> 4) & 0x07, data
[34] & 0x0F);
1155 printf ("Data signal input hold 0.%d%d ns\n",
1156 (data
[35] >> 4) & 0x0F, data
[35] & 0x0F);
1159 printf ("Data signal input hold %c%d.%d ns\n",
1160 (data
[35] & 0x80) ? '-' : '+',
1161 (data
[35] >> 4) & 0x07, data
[35] & 0x0F);
1165 puts ("Manufacturer's JEDEC ID ");
1166 for (j
= 64; j
<= 71; j
++)
1167 printf ("%02X ", data
[j
]);
1169 printf ("Manufacturing Location %02X\n", data
[72]);
1170 puts ("Manufacturer's Part Number ");
1171 for (j
= 73; j
<= 90; j
++)
1172 printf ("%02X ", data
[j
]);
1174 printf ("Revision Code %02X %02X\n", data
[91], data
[92]);
1175 printf ("Manufacturing Date %02X %02X\n", data
[93], data
[94]);
1176 puts ("Assembly Serial Number ");
1177 for (j
= 95; j
<= 98; j
++)
1178 printf ("%02X ", data
[j
]);
1182 printf ("Speed rating PC%d\n",
1183 data
[126] == 0x66 ? 66 : data
[126]);
1189 #if defined(CONFIG_I2C_CMD_TREE)
1190 int do_i2c_reset(cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
1192 i2c_init (CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
1196 #if defined(CONFIG_I2C_MUX)
1197 int do_i2c_add_bus(cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
1202 /* show all busses */
1204 I2C_MUX_DEVICE
*device
= i2c_mux_devices
;
1206 printf ("Busses reached over muxes:\n");
1207 while (device
!= NULL
) {
1208 printf ("Bus ID: %x\n", device
->busid
);
1209 printf (" reached over Mux(es):\n");
1211 while (mux
!= NULL
) {
1212 printf (" %s@%x ch: %x\n", mux
->name
, mux
->chip
, mux
->channel
);
1215 device
= device
->next
;
1218 I2C_MUX_DEVICE
*dev
;
1220 dev
= i2c_mux_ident_muxstring ((uchar
*)argv
[1]);
1225 #endif /* CONFIG_I2C_MUX */
1227 #if defined(CONFIG_I2C_MULTI_BUS)
1228 int do_i2c_bus_num(cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
1233 /* querying current setting */
1234 printf("Current bus is %d\n", i2c_get_bus_num());
1236 bus_idx
= simple_strtoul(argv
[1], NULL
, 10);
1237 printf("Setting bus to %d\n", bus_idx
);
1238 ret
= i2c_set_bus_num(bus_idx
);
1240 printf("Failure changing bus number (%d)\n", ret
);
1244 #endif /* CONFIG_I2C_MULTI_BUS */
1246 int do_i2c_bus_speed(cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
1251 /* querying current speed */
1252 printf("Current bus speed=%d\n", i2c_get_bus_speed());
1254 speed
= simple_strtoul(argv
[1], NULL
, 10);
1255 printf("Setting bus speed to %d Hz\n", speed
);
1256 ret
= i2c_set_bus_speed(speed
);
1258 printf("Failure changing bus speed (%d)\n", ret
);
1263 int do_i2c(cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
1265 #if defined(CONFIG_I2C_MUX)
1266 if (!strncmp(argv
[1], "bu", 2))
1267 return do_i2c_add_bus(cmdtp
, flag
, --argc
, ++argv
);
1268 #endif /* CONFIG_I2C_MUX */
1269 if (!strncmp(argv
[1], "sp", 2))
1270 return do_i2c_bus_speed(cmdtp
, flag
, --argc
, ++argv
);
1271 #if defined(CONFIG_I2C_MULTI_BUS)
1272 if (!strncmp(argv
[1], "de", 2))
1273 return do_i2c_bus_num(cmdtp
, flag
, --argc
, ++argv
);
1274 #endif /* CONFIG_I2C_MULTI_BUS */
1275 if (!strncmp(argv
[1], "md", 2))
1276 return do_i2c_md(cmdtp
, flag
, --argc
, ++argv
);
1277 if (!strncmp(argv
[1], "mm", 2))
1278 return do_i2c_mm(cmdtp
, flag
, --argc
, ++argv
);
1279 if (!strncmp(argv
[1], "mw", 2))
1280 return do_i2c_mw(cmdtp
, flag
, --argc
, ++argv
);
1281 if (!strncmp(argv
[1], "nm", 2))
1282 return do_i2c_nm(cmdtp
, flag
, --argc
, ++argv
);
1283 if (!strncmp(argv
[1], "cr", 2))
1284 return do_i2c_crc(cmdtp
, flag
, --argc
, ++argv
);
1285 if (!strncmp(argv
[1], "pr", 2))
1286 return do_i2c_probe(cmdtp
, flag
, --argc
, ++argv
);
1287 if (!strncmp(argv
[1], "re", 2))
1288 return do_i2c_reset(cmdtp
, flag
, --argc
, ++argv
);
1289 if (!strncmp(argv
[1], "lo", 2))
1290 return do_i2c_loop(cmdtp
, flag
, --argc
, ++argv
);
1291 #if defined(CONFIG_CMD_SDRAM)
1292 if (!strncmp(argv
[1], "sd", 2))
1293 return do_sdram(cmdtp
, flag
, --argc
, ++argv
);
1296 printf ("Usage:\n%s\n", cmdtp
->usage
);
1299 #endif /* CONFIG_I2C_CMD_TREE */
1301 /***************************************************/
1303 #if defined(CONFIG_I2C_CMD_TREE)
1306 "i2c - I2C sub-system\n",
1307 #if defined(CONFIG_I2C_MUX)
1308 "bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes.\n"
1309 #endif /* CONFIG_I2C_MUX */
1310 "speed [speed] - show or set I2C bus speed\n"
1311 #if defined(CONFIG_I2C_MULTI_BUS)
1312 "i2c dev [dev] - show or set current I2C bus\n"
1313 #endif /* CONFIG_I2C_MULTI_BUS */
1314 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
1315 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
1316 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
1317 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
1318 "i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
1319 "i2c probe - show devices on the I2C bus\n"
1320 "i2c reset - re-init the I2C Controller\n"
1321 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
1322 #if defined(CONFIG_CMD_SDRAM)
1323 "i2c sdram chip - print SDRAM configuration information\n"
1326 #endif /* CONFIG_I2C_CMD_TREE */
1328 imd
, 4, 1, do_i2c_md
, \
1329 "imd - i2c memory display\n", \
1330 "chip address[.0, .1, .2] [# of objects]\n - i2c memory display\n" \
1334 imm
, 3, 1, do_i2c_mm
,
1335 "imm - i2c memory modify (auto-incrementing)\n",
1336 "chip address[.0, .1, .2]\n"
1337 " - memory modify, auto increment address\n"
1340 inm
, 3, 1, do_i2c_nm
,
1341 "inm - memory modify (constant address)\n",
1342 "chip address[.0, .1, .2]\n - memory modify, read and keep address\n"
1346 imw
, 5, 1, do_i2c_mw
,
1347 "imw - memory write (fill)\n",
1348 "chip address[.0, .1, .2] value [count]\n - memory write (fill)\n"
1352 icrc32
, 5, 1, do_i2c_crc
,
1353 "icrc32 - checksum calculation\n",
1354 "chip address[.0, .1, .2] count\n - compute CRC32 checksum\n"
1358 iprobe
, 1, 1, do_i2c_probe
,
1359 "iprobe - probe to discover valid I2C chip addresses\n",
1360 "\n -discover valid I2C chip addresses\n"
1364 * Require full name for "iloop" because it is an infinite loop!
1367 iloop
, 5, 1, do_i2c_loop
,
1368 "iloop - infinite loop on address range\n",
1369 "chip address[.0, .1, .2] [# of objects]\n"
1370 " - loop, reading a set of addresses\n"
1373 #if defined(CONFIG_CMD_SDRAM)
1375 isdram
, 2, 1, do_sdram
,
1376 "isdram - print SDRAM configuration information\n",
1377 "chip\n - print SDRAM configuration information\n"
1378 " (valid chip values 50..57)\n"
1382 #if defined(CONFIG_I2C_MUX)
1384 int i2c_mux_add_device(I2C_MUX_DEVICE
*dev
)
1386 I2C_MUX_DEVICE
*devtmp
= i2c_mux_devices
;
1388 if (i2c_mux_devices
== NULL
) {
1389 i2c_mux_devices
= dev
;
1392 while (devtmp
->next
!= NULL
)
1393 devtmp
= devtmp
->next
;
1399 I2C_MUX_DEVICE
*i2c_mux_search_device(int id
)
1401 I2C_MUX_DEVICE
*device
= i2c_mux_devices
;
1403 while (device
!= NULL
) {
1404 if (device
->busid
== id
)
1406 device
= device
->next
;
1411 /* searches in the buf from *pos the next ':'.
1413 * 0 if found (with *pos = where)
1414 * < 0 if an error occured
1415 * > 0 if the end of buf is reached
1417 static int i2c_mux_search_next (int *pos
, uchar
*buf
, int len
)
1419 while ((buf
[*pos
] != ':') && (*pos
< len
)) {
1424 if (buf
[*pos
] != ':')
1429 static int i2c_mux_get_busid (void)
1431 int tmp
= i2c_mux_busid
;
1437 /* Analyses a Muxstring and sends immediately the
1438 Commands to the Muxes. Runs from Flash.
1440 int i2c_mux_ident_muxstring_f (uchar
*buf
)
1445 int len
= strlen((char *)buf
);
1453 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1456 /* search address */
1459 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1463 chip
= simple_strtoul((char *)&buf
[oldpos
], NULL
, 16);
1465 /* search channel */
1468 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1472 if (buf
[pos
] != 0) {
1476 channel
= simple_strtoul((char *)&buf
[oldpos
], NULL
, 16);
1479 if (i2c_write(chip
, 0, 0, &channel
, 1) != 0) {
1480 printf ("Error setting Mux: chip:%x channel: \
1481 %x\n", chip
, channel
);
1492 /* Analyses a Muxstring and if this String is correct
1493 * adds a new I2C Bus.
1495 I2C_MUX_DEVICE
*i2c_mux_ident_muxstring (uchar
*buf
)
1497 I2C_MUX_DEVICE
*device
;
1502 int len
= strlen((char *)buf
);
1505 device
= (I2C_MUX_DEVICE
*)malloc (sizeof(I2C_MUX_DEVICE
));
1507 device
->busid
= i2c_mux_get_busid ();
1508 device
->next
= NULL
;
1510 mux
= (I2C_MUX
*)malloc (sizeof(I2C_MUX
));
1512 /* search name of mux */
1514 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1516 printf ("%s no name.\n", __FUNCTION__
);
1517 mux
->name
= (char *)malloc (pos
- oldpos
+ 1);
1518 memcpy (mux
->name
, &buf
[oldpos
], pos
- oldpos
);
1519 mux
->name
[pos
- oldpos
] = 0;
1520 /* search address */
1523 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1525 printf ("%s no mux address.\n", __FUNCTION__
);
1527 mux
->chip
= simple_strtoul((char *)&buf
[oldpos
], NULL
, 16);
1529 /* search channel */
1532 ret
= i2c_mux_search_next(&pos
, buf
, len
);
1534 printf ("%s no mux channel.\n", __FUNCTION__
);
1536 if (buf
[pos
] != 0) {
1540 mux
->channel
= simple_strtoul((char *)&buf
[oldpos
], NULL
, 16);
1543 if (device
->mux
== NULL
)
1546 I2C_MUX
*muxtmp
= device
->mux
;
1547 while (muxtmp
->next
!= NULL
) {
1548 muxtmp
= muxtmp
->next
;
1557 i2c_mux_add_device (device
);
1564 int i2x_mux_select_mux(int bus
)
1566 I2C_MUX_DEVICE
*dev
;
1569 if ((gd
->flags
& GD_FLG_RELOC
) != GD_FLG_RELOC
) {
1570 /* select Default Mux Bus */
1571 #if defined(CONFIG_SYS_I2C_IVM_BUS)
1572 i2c_mux_ident_muxstring_f ((uchar
*)CONFIG_SYS_I2C_IVM_BUS
);
1576 buf
= (unsigned char *) getenv("EEprom_ivm");
1578 i2c_mux_ident_muxstring_f (buf
);
1583 dev
= i2c_mux_search_device(bus
);
1588 while (mux
!= NULL
) {
1589 if (i2c_write(mux
->chip
, 0, 0, &mux
->channel
, 1) != 0) {
1590 printf ("Error setting Mux: chip:%x channel: \
1591 %x\n", mux
->chip
, mux
->channel
);
1598 #endif /* CONFIG_I2C_MUX */