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Convert cmd_usage() calls in common to use a return value
[people/ms/u-boot.git] / common / cmd_ide.c
1 /*
2 * (C) Copyright 2000-2011
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25 /*
26 * IDE support
27 */
28
29 #include <common.h>
30 #include <config.h>
31 #include <watchdog.h>
32 #include <command.h>
33 #include <image.h>
34 #include <asm/byteorder.h>
35 #include <asm/io.h>
36
37 #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
38 # include <pcmcia.h>
39 #endif
40
41 #ifdef CONFIG_8xx
42 # include <mpc8xx.h>
43 #endif
44
45 #ifdef CONFIG_MPC5xxx
46 #include <mpc5xxx.h>
47 #endif
48
49 #include <ide.h>
50 #include <ata.h>
51
52 #ifdef CONFIG_STATUS_LED
53 # include <status_led.h>
54 #endif
55
56 #ifdef CONFIG_IDE_8xx_DIRECT
57 DECLARE_GLOBAL_DATA_PTR;
58 #endif
59
60 #ifdef __PPC__
61 # define EIEIO __asm__ volatile ("eieio")
62 # define SYNC __asm__ volatile ("sync")
63 #else
64 # define EIEIO /* nothing */
65 # define SYNC /* nothing */
66 #endif
67
68 #ifdef CONFIG_IDE_8xx_DIRECT
69 /* Timings for IDE Interface
70 *
71 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
72 * 70 165 30 PIO-Mode 0, [ns]
73 * 4 9 2 [Cycles]
74 * 50 125 20 PIO-Mode 1, [ns]
75 * 3 7 2 [Cycles]
76 * 30 100 15 PIO-Mode 2, [ns]
77 * 2 6 1 [Cycles]
78 * 30 80 10 PIO-Mode 3, [ns]
79 * 2 5 1 [Cycles]
80 * 25 70 10 PIO-Mode 4, [ns]
81 * 2 4 1 [Cycles]
82 */
83
84 const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
85 {
86 /* Setup Length Hold */
87 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
88 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
89 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
90 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
91 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
92 };
93
94 static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
95
96 #ifndef CONFIG_SYS_PIO_MODE
97 #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
98 #endif
99 static int pio_mode = CONFIG_SYS_PIO_MODE;
100
101 /* Make clock cycles and always round up */
102
103 #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
104
105 #endif /* CONFIG_IDE_8xx_DIRECT */
106
107 /* ------------------------------------------------------------------------- */
108
109 /* Current I/O Device */
110 static int curr_device = -1;
111
112 /* Current offset for IDE0 / IDE1 bus access */
113 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
114 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
115 CONFIG_SYS_ATA_IDE0_OFFSET,
116 #endif
117 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
118 CONFIG_SYS_ATA_IDE1_OFFSET,
119 #endif
120 };
121
122 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
123
124 block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
125 /* ------------------------------------------------------------------------- */
126
127 #ifdef CONFIG_IDE_LED
128 # if !defined(CONFIG_BMS2003) && \
129 !defined(CONFIG_CPC45) && \
130 !defined(CONFIG_KUP4K) && \
131 !defined(CONFIG_KUP4X)
132 static void ide_led (uchar led, uchar status);
133 #else
134 extern void ide_led (uchar led, uchar status);
135 #endif
136 #else
137 #define ide_led(a,b) /* dummy */
138 #endif
139
140 #ifdef CONFIG_IDE_RESET
141 static void ide_reset (void);
142 #else
143 #define ide_reset() /* dummy */
144 #endif
145
146 static void ide_ident (block_dev_desc_t *dev_desc);
147 static uchar ide_wait (int dev, ulong t);
148
149 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
150
151 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
152
153 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
154
155 static void input_data(int dev, ulong *sect_buf, int words);
156 static void output_data(int dev, const ulong *sect_buf, int words);
157 static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
158
159 #ifndef CONFIG_SYS_ATA_PORT_ADDR
160 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
161 #endif
162
163 #ifdef CONFIG_ATAPI
164 static void atapi_inquiry(block_dev_desc_t *dev_desc);
165 ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
166 #endif
167
168
169 #ifdef CONFIG_IDE_8xx_DIRECT
170 static void set_pcmcia_timing (int pmode);
171 #endif
172
173 /* ------------------------------------------------------------------------- */
174
175 int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
176 {
177 int rcode = 0;
178
179 switch (argc) {
180 case 0:
181 case 1:
182 return CMD_RET_USAGE;
183 case 2:
184 if (strncmp(argv[1], "res", 3) == 0) {
185 puts("\nReset IDE"
186 #ifdef CONFIG_IDE_8xx_DIRECT
187 " on PCMCIA " PCMCIA_SLOT_MSG
188 #endif
189 ": ");
190
191 ide_init();
192 return 0;
193 } else if (strncmp(argv[1], "inf", 3) == 0) {
194 int i;
195
196 putc('\n');
197
198 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
199 if (ide_dev_desc[i].type == DEV_TYPE_UNKNOWN)
200 continue; /* list only known devices */
201 printf("IDE device %d: ", i);
202 dev_print(&ide_dev_desc[i]);
203 }
204 return 0;
205
206 } else if (strncmp(argv[1], "dev", 3) == 0) {
207 if ((curr_device < 0)
208 || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
209 puts("\nno IDE devices available\n");
210 return 1;
211 }
212 printf("\nIDE device %d: ", curr_device);
213 dev_print(&ide_dev_desc[curr_device]);
214 return 0;
215 } else if (strncmp(argv[1], "part", 4) == 0) {
216 int dev, ok;
217
218 for (ok = 0, dev = 0;
219 dev < CONFIG_SYS_IDE_MAXDEVICE;
220 ++dev) {
221 if (ide_dev_desc[dev].part_type !=
222 PART_TYPE_UNKNOWN) {
223 ++ok;
224 if (dev)
225 putc('\n');
226 print_part(&ide_dev_desc[dev]);
227 }
228 }
229 if (!ok) {
230 puts("\nno IDE devices available\n");
231 rcode++;
232 }
233 return rcode;
234 }
235 return CMD_RET_USAGE;
236 case 3:
237 if (strncmp(argv[1], "dev", 3) == 0) {
238 int dev = (int) simple_strtoul(argv[2], NULL, 10);
239
240 printf("\nIDE device %d: ", dev);
241 if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
242 puts("unknown device\n");
243 return 1;
244 }
245 dev_print(&ide_dev_desc[dev]);
246 /*ide_print (dev); */
247
248 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN)
249 return 1;
250
251 curr_device = dev;
252
253 puts("... is now current device\n");
254
255 return 0;
256 } else if (strncmp(argv[1], "part", 4) == 0) {
257 int dev = (int) simple_strtoul(argv[2], NULL, 10);
258
259 if (ide_dev_desc[dev].part_type != PART_TYPE_UNKNOWN) {
260 print_part(&ide_dev_desc[dev]);
261 } else {
262 printf("\nIDE device %d not available\n",
263 dev);
264 rcode = 1;
265 }
266 return rcode;
267 }
268
269 return CMD_RET_USAGE;
270 default:
271 /* at least 4 args */
272
273 if (strcmp(argv[1], "read") == 0) {
274 ulong addr = simple_strtoul(argv[2], NULL, 16);
275 ulong cnt = simple_strtoul(argv[4], NULL, 16);
276 ulong n;
277
278 #ifdef CONFIG_SYS_64BIT_LBA
279 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
280
281 printf("\nIDE read: device %d block # %lld, count %ld ... ",
282 curr_device, blk, cnt);
283 #else
284 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
285
286 printf("\nIDE read: device %d block # %ld, count %ld ... ",
287 curr_device, blk, cnt);
288 #endif
289
290 n = ide_dev_desc[curr_device].block_read(curr_device,
291 blk, cnt,
292 (ulong *)addr);
293 /* flush cache after read */
294 flush_cache(addr,
295 cnt * ide_dev_desc[curr_device].blksz);
296
297 printf("%ld blocks read: %s\n",
298 n, (n == cnt) ? "OK" : "ERROR");
299 if (n == cnt)
300 return 0;
301 else
302 return 1;
303 } else if (strcmp(argv[1], "write") == 0) {
304 ulong addr = simple_strtoul(argv[2], NULL, 16);
305 ulong cnt = simple_strtoul(argv[4], NULL, 16);
306 ulong n;
307
308 #ifdef CONFIG_SYS_64BIT_LBA
309 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
310
311 printf("\nIDE write: device %d block # %lld, count %ld ... ",
312 curr_device, blk, cnt);
313 #else
314 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
315
316 printf("\nIDE write: device %d block # %ld, count %ld ... ",
317 curr_device, blk, cnt);
318 #endif
319 n = ide_write(curr_device, blk, cnt, (ulong *) addr);
320
321 printf("%ld blocks written: %s\n",
322 n, (n == cnt) ? "OK" : "ERROR");
323 if (n == cnt)
324 return 0;
325 else
326 return 1;
327 } else {
328 return CMD_RET_USAGE;
329 }
330
331 return rcode;
332 }
333 }
334
335 int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
336 {
337 char *boot_device = NULL;
338 char *ep;
339 int dev, part = 0;
340 ulong addr, cnt;
341 disk_partition_t info;
342 image_header_t *hdr;
343
344 #if defined(CONFIG_FIT)
345 const void *fit_hdr = NULL;
346 #endif
347
348 show_boot_progress(41);
349 switch (argc) {
350 case 1:
351 addr = CONFIG_SYS_LOAD_ADDR;
352 boot_device = getenv("bootdevice");
353 break;
354 case 2:
355 addr = simple_strtoul(argv[1], NULL, 16);
356 boot_device = getenv("bootdevice");
357 break;
358 case 3:
359 addr = simple_strtoul(argv[1], NULL, 16);
360 boot_device = argv[2];
361 break;
362 default:
363 show_boot_progress(-42);
364 return CMD_RET_USAGE;
365 }
366 show_boot_progress(42);
367
368 if (!boot_device) {
369 puts("\n** No boot device **\n");
370 show_boot_progress(-43);
371 return 1;
372 }
373 show_boot_progress(43);
374
375 dev = simple_strtoul(boot_device, &ep, 16);
376
377 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
378 printf("\n** Device %d not available\n", dev);
379 show_boot_progress(-44);
380 return 1;
381 }
382 show_boot_progress(44);
383
384 if (*ep) {
385 if (*ep != ':') {
386 puts("\n** Invalid boot device, use `dev[:part]' **\n");
387 show_boot_progress(-45);
388 return 1;
389 }
390 part = simple_strtoul(++ep, NULL, 16);
391 }
392 show_boot_progress(45);
393 if (get_partition_info(&ide_dev_desc[dev], part, &info)) {
394 show_boot_progress(-46);
395 return 1;
396 }
397 show_boot_progress(46);
398 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0)
399 &&
400 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)
401 ) {
402 printf("\n** Invalid partition type \"%.32s\"" " (expect \""
403 BOOT_PART_TYPE "\")\n",
404 info.type);
405 show_boot_progress(-47);
406 return 1;
407 }
408 show_boot_progress(47);
409
410 printf("\nLoading from IDE device %d, partition %d: "
411 "Name: %.32s Type: %.32s\n", dev, part, info.name, info.type);
412
413 debug("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
414 info.start, info.size, info.blksz);
415
416 if (ide_dev_desc[dev].
417 block_read(dev, info.start, 1, (ulong *) addr) != 1) {
418 printf("** Read error on %d:%d\n", dev, part);
419 show_boot_progress(-48);
420 return 1;
421 }
422 show_boot_progress(48);
423
424 switch (genimg_get_format((void *) addr)) {
425 case IMAGE_FORMAT_LEGACY:
426 hdr = (image_header_t *) addr;
427
428 show_boot_progress(49);
429
430 if (!image_check_hcrc(hdr)) {
431 puts("\n** Bad Header Checksum **\n");
432 show_boot_progress(-50);
433 return 1;
434 }
435 show_boot_progress(50);
436
437 image_print_contents(hdr);
438
439 cnt = image_get_image_size(hdr);
440 break;
441 #if defined(CONFIG_FIT)
442 case IMAGE_FORMAT_FIT:
443 fit_hdr = (const void *) addr;
444 puts("Fit image detected...\n");
445
446 cnt = fit_get_size(fit_hdr);
447 break;
448 #endif
449 default:
450 show_boot_progress(-49);
451 puts("** Unknown image type\n");
452 return 1;
453 }
454
455 cnt += info.blksz - 1;
456 cnt /= info.blksz;
457 cnt -= 1;
458
459 if (ide_dev_desc[dev].block_read(dev, info.start + 1, cnt,
460 (ulong *)(addr + info.blksz)) != cnt) {
461 printf("** Read error on %d:%d\n", dev, part);
462 show_boot_progress(-51);
463 return 1;
464 }
465 show_boot_progress(51);
466
467 #if defined(CONFIG_FIT)
468 /* This cannot be done earlier, we need complete FIT image in RAM first */
469 if (genimg_get_format((void *) addr) == IMAGE_FORMAT_FIT) {
470 if (!fit_check_format(fit_hdr)) {
471 show_boot_progress(-140);
472 puts("** Bad FIT image format\n");
473 return 1;
474 }
475 show_boot_progress(141);
476 fit_print_contents(fit_hdr);
477 }
478 #endif
479
480 /* Loading ok, update default load address */
481
482 load_addr = addr;
483
484 return bootm_maybe_autostart(cmdtp, argv[0]);
485 }
486
487 /* ------------------------------------------------------------------------- */
488
489 inline void __ide_outb(int dev, int port, unsigned char val)
490 {
491 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
492 dev, port, val,
493 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
494
495 #if defined(CONFIG_IDE_AHB)
496 if (port) {
497 /* write command */
498 ide_write_register(dev, port, val);
499 } else {
500 /* write data */
501 outb(val, (ATA_CURR_BASE(dev)));
502 }
503 #else
504 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
505 #endif
506 }
507
508 void ide_outb(int dev, int port, unsigned char val)
509 __attribute__ ((weak, alias("__ide_outb")));
510
511 inline unsigned char __ide_inb(int dev, int port)
512 {
513 uchar val;
514
515 #if defined(CONFIG_IDE_AHB)
516 val = ide_read_register(dev, port);
517 #else
518 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
519 #endif
520
521 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
522 dev, port,
523 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
524 return val;
525 }
526
527 unsigned char ide_inb(int dev, int port)
528 __attribute__ ((weak, alias("__ide_inb")));
529
530 #ifdef CONFIG_TUNE_PIO
531 inline int __ide_set_piomode(int pio_mode)
532 {
533 return 0;
534 }
535
536 inline int ide_set_piomode(int pio_mode)
537 __attribute__ ((weak, alias("__ide_set_piomode")));
538 #endif
539
540 void ide_init(void)
541 {
542
543 #ifdef CONFIG_IDE_8xx_DIRECT
544 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
545 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
546 #endif
547 unsigned char c;
548 int i, bus;
549
550 #if defined(CONFIG_SC3)
551 unsigned int ata_reset_time = ATA_RESET_TIME;
552 #endif
553 #ifdef CONFIG_IDE_8xx_PCCARD
554 extern int pcmcia_on(void);
555 extern int ide_devices_found; /* Initialized in check_ide_device() */
556 #endif /* CONFIG_IDE_8xx_PCCARD */
557
558 #ifdef CONFIG_IDE_PREINIT
559 extern int ide_preinit(void);
560
561 WATCHDOG_RESET();
562
563 if (ide_preinit()) {
564 puts("ide_preinit failed\n");
565 return;
566 }
567 #endif /* CONFIG_IDE_PREINIT */
568
569 #ifdef CONFIG_IDE_8xx_PCCARD
570 extern int pcmcia_on(void);
571 extern int ide_devices_found; /* Initialized in check_ide_device() */
572
573 WATCHDOG_RESET();
574
575 ide_devices_found = 0;
576 /* initialize the PCMCIA IDE adapter card */
577 pcmcia_on();
578 if (!ide_devices_found)
579 return;
580 udelay(1000000); /* 1 s */
581 #endif /* CONFIG_IDE_8xx_PCCARD */
582
583 WATCHDOG_RESET();
584
585 #ifdef CONFIG_IDE_8xx_DIRECT
586 /* Initialize PIO timing tables */
587 for (i = 0; i <= IDE_MAX_PIO_MODE; ++i) {
588 pio_config_clk[i].t_setup =
589 PCMCIA_MK_CLKS(pio_config_ns[i].t_setup, gd->bus_clk);
590 pio_config_clk[i].t_length =
591 PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
592 gd->bus_clk);
593 pio_config_clk[i].t_hold =
594 PCMCIA_MK_CLKS(pio_config_ns[i].t_hold, gd->bus_clk);
595 debug("PIO Mode %d: setup=%2d ns/%d clk" " len=%3d ns/%d clk"
596 " hold=%2d ns/%d clk\n", i, pio_config_ns[i].t_setup,
597 pio_config_clk[i].t_setup, pio_config_ns[i].t_length,
598 pio_config_clk[i].t_length, pio_config_ns[i].t_hold,
599 pio_config_clk[i].t_hold);
600 }
601 #endif /* CONFIG_IDE_8xx_DIRECT */
602
603 /*
604 * Reset the IDE just to be sure.
605 * Light LED's to show
606 */
607 ide_led((LED_IDE1 | LED_IDE2), 1); /* LED's on */
608
609 /* ATAPI Drives seems to need a proper IDE Reset */
610 ide_reset();
611
612 #ifdef CONFIG_IDE_8xx_DIRECT
613 /* PCMCIA / IDE initialization for common mem space */
614 pcmp->pcmc_pgcrb = 0;
615
616 /* start in PIO mode 0 - most relaxed timings */
617 pio_mode = 0;
618 set_pcmcia_timing(pio_mode);
619 #endif /* CONFIG_IDE_8xx_DIRECT */
620
621 /*
622 * Wait for IDE to get ready.
623 * According to spec, this can take up to 31 seconds!
624 */
625 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
626 int dev =
627 bus * (CONFIG_SYS_IDE_MAXDEVICE /
628 CONFIG_SYS_IDE_MAXBUS);
629
630 #ifdef CONFIG_IDE_8xx_PCCARD
631 /* Skip non-ide devices from probing */
632 if ((ide_devices_found & (1 << bus)) == 0) {
633 ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
634 continue;
635 }
636 #endif
637 printf("Bus %d: ", bus);
638
639 ide_bus_ok[bus] = 0;
640
641 /* Select device
642 */
643 udelay(100000); /* 100 ms */
644 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
645 udelay(100000); /* 100 ms */
646 i = 0;
647 do {
648 udelay(10000); /* 10 ms */
649
650 c = ide_inb(dev, ATA_STATUS);
651 i++;
652 #if defined(CONFIG_SC3)
653 if (i > (ata_reset_time * 100)) {
654 #else
655 if (i > (ATA_RESET_TIME * 100)) {
656 #endif
657 puts("** Timeout **\n");
658 /* LED's off */
659 ide_led((LED_IDE1 | LED_IDE2), 0);
660 return;
661 }
662 if ((i >= 100) && ((i % 100) == 0))
663 putc('.');
664
665 } while (c & ATA_STAT_BUSY);
666
667 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
668 puts("not available ");
669 debug("Status = 0x%02X ", c);
670 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
671 } else if ((c & ATA_STAT_READY) == 0) {
672 puts("not available ");
673 debug("Status = 0x%02X ", c);
674 #endif
675 } else {
676 puts("OK ");
677 ide_bus_ok[bus] = 1;
678 }
679 WATCHDOG_RESET();
680 }
681
682 putc('\n');
683
684 ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
685
686 curr_device = -1;
687 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
688 #ifdef CONFIG_IDE_LED
689 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
690 #endif
691 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
692 ide_dev_desc[i].if_type = IF_TYPE_IDE;
693 ide_dev_desc[i].dev = i;
694 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
695 ide_dev_desc[i].blksz = 0;
696 ide_dev_desc[i].lba = 0;
697 ide_dev_desc[i].block_read = ide_read;
698 ide_dev_desc[i].block_write = ide_write;
699 if (!ide_bus_ok[IDE_BUS(i)])
700 continue;
701 ide_led(led, 1); /* LED on */
702 ide_ident(&ide_dev_desc[i]);
703 ide_led(led, 0); /* LED off */
704 dev_print(&ide_dev_desc[i]);
705
706 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
707 /* initialize partition type */
708 init_part(&ide_dev_desc[i]);
709 if (curr_device < 0)
710 curr_device = i;
711 }
712 }
713 WATCHDOG_RESET();
714 }
715
716 /* ------------------------------------------------------------------------- */
717
718 #ifdef CONFIG_PARTITIONS
719 block_dev_desc_t *ide_get_dev(int dev)
720 {
721 return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
722 }
723 #endif
724
725
726 #ifdef CONFIG_IDE_8xx_DIRECT
727
728 static void set_pcmcia_timing(int pmode)
729 {
730 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
731 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
732 ulong timings;
733
734 debug("Set timing for PIO Mode %d\n", pmode);
735
736 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
737 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
738 | PCMCIA_SL(pio_config_clk[pmode].t_length);
739
740 /*
741 * IDE 0
742 */
743 pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
744 pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
745 #if (CONFIG_SYS_PCMCIA_POR0 != 0)
746 | timings
747 #endif
748 ;
749 debug("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
750
751 pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
752 pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
753 #if (CONFIG_SYS_PCMCIA_POR1 != 0)
754 | timings
755 #endif
756 ;
757 debug("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
758
759 pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
760 pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
761 #if (CONFIG_SYS_PCMCIA_POR2 != 0)
762 | timings
763 #endif
764 ;
765 debug("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
766
767 pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
768 pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
769 #if (CONFIG_SYS_PCMCIA_POR3 != 0)
770 | timings
771 #endif
772 ;
773 debug("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
774
775 /*
776 * IDE 1
777 */
778 pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
779 pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
780 #if (CONFIG_SYS_PCMCIA_POR4 != 0)
781 | timings
782 #endif
783 ;
784 debug("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
785
786 pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
787 pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
788 #if (CONFIG_SYS_PCMCIA_POR5 != 0)
789 | timings
790 #endif
791 ;
792 debug("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
793
794 pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
795 pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
796 #if (CONFIG_SYS_PCMCIA_POR6 != 0)
797 | timings
798 #endif
799 ;
800 debug("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
801
802 pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
803 pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
804 #if (CONFIG_SYS_PCMCIA_POR7 != 0)
805 | timings
806 #endif
807 ;
808 debug("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
809
810 }
811
812 #endif /* CONFIG_IDE_8xx_DIRECT */
813
814 /* ------------------------------------------------------------------------- */
815
816 /* We only need to swap data if we are running on a big endian cpu. */
817 /* But Au1x00 cpu:s already swaps data in big endian mode! */
818 #if defined(__LITTLE_ENDIAN) || \
819 (defined(CONFIG_SOC_AU1X00) && !defined(CONFIG_GTH2))
820 #define input_swap_data(x,y,z) input_data(x,y,z)
821 #else
822 static void input_swap_data(int dev, ulong *sect_buf, int words)
823 {
824 #if defined(CONFIG_CPC45)
825 uchar i;
826 volatile uchar *pbuf_even =
827 (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
828 volatile uchar *pbuf_odd =
829 (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
830 ushort *dbuf = (ushort *) sect_buf;
831
832 while (words--) {
833 for (i = 0; i < 2; i++) {
834 *(((uchar *) (dbuf)) + 1) = *pbuf_even;
835 *(uchar *) dbuf = *pbuf_odd;
836 dbuf += 1;
837 }
838 }
839 #else
840 volatile ushort *pbuf =
841 (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
842 ushort *dbuf = (ushort *) sect_buf;
843
844 debug("in input swap data base for read is %lx\n",
845 (unsigned long) pbuf);
846
847 while (words--) {
848 #ifdef __MIPS__
849 *dbuf++ = swab16p((u16 *) pbuf);
850 *dbuf++ = swab16p((u16 *) pbuf);
851 #elif defined(CONFIG_PCS440EP)
852 *dbuf++ = *pbuf;
853 *dbuf++ = *pbuf;
854 #else
855 *dbuf++ = ld_le16(pbuf);
856 *dbuf++ = ld_le16(pbuf);
857 #endif /* !MIPS */
858 }
859 #endif
860 }
861 #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
862
863
864 #if defined(CONFIG_IDE_SWAP_IO)
865 static void output_data(int dev, const ulong *sect_buf, int words)
866 {
867 #if defined(CONFIG_CPC45)
868 uchar *dbuf;
869 volatile uchar *pbuf_even;
870 volatile uchar *pbuf_odd;
871
872 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
873 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
874 dbuf = (uchar *) sect_buf;
875 while (words--) {
876 EIEIO;
877 *pbuf_even = *dbuf++;
878 EIEIO;
879 *pbuf_odd = *dbuf++;
880 EIEIO;
881 *pbuf_even = *dbuf++;
882 EIEIO;
883 *pbuf_odd = *dbuf++;
884 }
885 #else
886 ushort *dbuf;
887 volatile ushort *pbuf;
888
889 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
890 dbuf = (ushort *) sect_buf;
891 while (words--) {
892 #if defined(CONFIG_PCS440EP)
893 /* not tested, because CF was write protected */
894 EIEIO;
895 *pbuf = ld_le16(dbuf++);
896 EIEIO;
897 *pbuf = ld_le16(dbuf++);
898 #else
899 EIEIO;
900 *pbuf = *dbuf++;
901 EIEIO;
902 *pbuf = *dbuf++;
903 #endif
904 }
905 #endif
906 }
907 #else /* ! CONFIG_IDE_SWAP_IO */
908 static void output_data(int dev, const ulong *sect_buf, int words)
909 {
910 #if defined(CONFIG_IDE_AHB)
911 ide_write_data(dev, sect_buf, words);
912 #else
913 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
914 #endif
915 }
916 #endif /* CONFIG_IDE_SWAP_IO */
917
918 #if defined(CONFIG_IDE_SWAP_IO)
919 static void input_data(int dev, ulong *sect_buf, int words)
920 {
921 #if defined(CONFIG_CPC45)
922 uchar *dbuf;
923 volatile uchar *pbuf_even;
924 volatile uchar *pbuf_odd;
925
926 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
927 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
928 dbuf = (uchar *) sect_buf;
929 while (words--) {
930 *dbuf++ = *pbuf_even;
931 EIEIO;
932 SYNC;
933 *dbuf++ = *pbuf_odd;
934 EIEIO;
935 SYNC;
936 *dbuf++ = *pbuf_even;
937 EIEIO;
938 SYNC;
939 *dbuf++ = *pbuf_odd;
940 EIEIO;
941 SYNC;
942 }
943 #else
944 ushort *dbuf;
945 volatile ushort *pbuf;
946
947 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
948 dbuf = (ushort *) sect_buf;
949
950 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
951
952 while (words--) {
953 #if defined(CONFIG_PCS440EP)
954 EIEIO;
955 *dbuf++ = ld_le16(pbuf);
956 EIEIO;
957 *dbuf++ = ld_le16(pbuf);
958 #else
959 EIEIO;
960 *dbuf++ = *pbuf;
961 EIEIO;
962 *dbuf++ = *pbuf;
963 #endif
964 }
965 #endif
966 }
967 #else /* ! CONFIG_IDE_SWAP_IO */
968 static void input_data(int dev, ulong *sect_buf, int words)
969 {
970 #if defined(CONFIG_IDE_AHB)
971 ide_read_data(dev, sect_buf, words);
972 #else
973 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
974 #endif
975 }
976
977 #endif /* CONFIG_IDE_SWAP_IO */
978
979 /* -------------------------------------------------------------------------
980 */
981 static void ide_ident(block_dev_desc_t *dev_desc)
982 {
983 unsigned char c;
984 hd_driveid_t iop;
985
986 #ifdef CONFIG_ATAPI
987 int retries = 0;
988 #endif
989
990 #ifdef CONFIG_TUNE_PIO
991 int pio_mode;
992 #endif
993
994 #if 0
995 int mode, cycle_time;
996 #endif
997 int device;
998
999 device = dev_desc->dev;
1000 printf(" Device %d: ", device);
1001
1002 ide_led(DEVICE_LED(device), 1); /* LED on */
1003 /* Select device
1004 */
1005 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1006 dev_desc->if_type = IF_TYPE_IDE;
1007 #ifdef CONFIG_ATAPI
1008
1009 retries = 0;
1010
1011 /* Warning: This will be tricky to read */
1012 while (retries <= 1) {
1013 /* check signature */
1014 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
1015 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
1016 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
1017 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
1018 /* ATAPI Signature found */
1019 dev_desc->if_type = IF_TYPE_ATAPI;
1020 /*
1021 * Start Ident Command
1022 */
1023 ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
1024 /*
1025 * Wait for completion - ATAPI devices need more time
1026 * to become ready
1027 */
1028 c = ide_wait(device, ATAPI_TIME_OUT);
1029 } else
1030 #endif
1031 {
1032 /*
1033 * Start Ident Command
1034 */
1035 ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
1036
1037 /*
1038 * Wait for completion
1039 */
1040 c = ide_wait(device, IDE_TIME_OUT);
1041 }
1042 ide_led(DEVICE_LED(device), 0); /* LED off */
1043
1044 if (((c & ATA_STAT_DRQ) == 0) ||
1045 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
1046 #ifdef CONFIG_ATAPI
1047 {
1048 /*
1049 * Need to soft reset the device
1050 * in case it's an ATAPI...
1051 */
1052 debug("Retrying...\n");
1053 ide_outb(device, ATA_DEV_HD,
1054 ATA_LBA | ATA_DEVICE(device));
1055 udelay(100000);
1056 ide_outb(device, ATA_COMMAND, 0x08);
1057 udelay(500000); /* 500 ms */
1058 }
1059 /*
1060 * Select device
1061 */
1062 ide_outb(device, ATA_DEV_HD,
1063 ATA_LBA | ATA_DEVICE(device));
1064 retries++;
1065 #else
1066 return;
1067 #endif
1068 }
1069 #ifdef CONFIG_ATAPI
1070 else
1071 break;
1072 } /* see above - ugly to read */
1073
1074 if (retries == 2) /* Not found */
1075 return;
1076 #endif
1077
1078 input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
1079
1080 ident_cpy((unsigned char *) dev_desc->revision, iop.fw_rev,
1081 sizeof(dev_desc->revision));
1082 ident_cpy((unsigned char *) dev_desc->vendor, iop.model,
1083 sizeof(dev_desc->vendor));
1084 ident_cpy((unsigned char *) dev_desc->product, iop.serial_no,
1085 sizeof(dev_desc->product));
1086 #ifdef __LITTLE_ENDIAN
1087 /*
1088 * firmware revision, model, and serial number have Big Endian Byte
1089 * order in Word. Convert all three to little endian.
1090 *
1091 * See CF+ and CompactFlash Specification Revision 2.0:
1092 * 6.2.1.6: Identify Drive, Table 39 for more details
1093 */
1094
1095 strswab(dev_desc->revision);
1096 strswab(dev_desc->vendor);
1097 strswab(dev_desc->product);
1098 #endif /* __LITTLE_ENDIAN */
1099
1100 if ((iop.config & 0x0080) == 0x0080)
1101 dev_desc->removable = 1;
1102 else
1103 dev_desc->removable = 0;
1104
1105 #ifdef CONFIG_TUNE_PIO
1106 /* Mode 0 - 2 only, are directly determined by word 51. */
1107 pio_mode = iop.tPIO;
1108 if (pio_mode > 2) {
1109 printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
1110 /* Force it to dead slow, and hope for the best... */
1111 pio_mode = 0;
1112 }
1113
1114 /* Any CompactFlash Storage Card that supports PIO mode 3 or above
1115 * shall set bit 1 of word 53 to one and support the fields contained
1116 * in words 64 through 70.
1117 */
1118 if (iop.field_valid & 0x02) {
1119 /*
1120 * Mode 3 and above are possible. Check in order from slow
1121 * to fast, so we wind up with the highest mode allowed.
1122 */
1123 if (iop.eide_pio_modes & 0x01)
1124 pio_mode = 3;
1125 if (iop.eide_pio_modes & 0x02)
1126 pio_mode = 4;
1127 if (ata_id_is_cfa((u16 *)&iop)) {
1128 if ((iop.cf_advanced_caps & 0x07) == 0x01)
1129 pio_mode = 5;
1130 if ((iop.cf_advanced_caps & 0x07) == 0x02)
1131 pio_mode = 6;
1132 }
1133 }
1134
1135 /* System-specific, depends on bus speeds, etc. */
1136 ide_set_piomode(pio_mode);
1137 #endif /* CONFIG_TUNE_PIO */
1138
1139 #if 0
1140 /*
1141 * Drive PIO mode autoselection
1142 */
1143 mode = iop.tPIO;
1144
1145 printf("tPIO = 0x%02x = %d\n", mode, mode);
1146 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1147 mode = 2;
1148 debug("Override tPIO -> 2\n");
1149 }
1150 if (iop.field_valid & 2) { /* drive implements ATA2? */
1151 debug("Drive implements ATA2\n");
1152 if (iop.capability & 8) { /* drive supports use_iordy? */
1153 cycle_time = iop.eide_pio_iordy;
1154 } else {
1155 cycle_time = iop.eide_pio;
1156 }
1157 debug("cycle time = %d\n", cycle_time);
1158 mode = 4;
1159 if (cycle_time > 120)
1160 mode = 3; /* 120 ns for PIO mode 4 */
1161 if (cycle_time > 180)
1162 mode = 2; /* 180 ns for PIO mode 3 */
1163 if (cycle_time > 240)
1164 mode = 1; /* 240 ns for PIO mode 4 */
1165 if (cycle_time > 383)
1166 mode = 0; /* 383 ns for PIO mode 4 */
1167 }
1168 printf("PIO mode to use: PIO %d\n", mode);
1169 #endif /* 0 */
1170
1171 #ifdef CONFIG_ATAPI
1172 if (dev_desc->if_type == IF_TYPE_ATAPI) {
1173 atapi_inquiry(dev_desc);
1174 return;
1175 }
1176 #endif /* CONFIG_ATAPI */
1177
1178 #ifdef __BIG_ENDIAN
1179 /* swap shorts */
1180 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
1181 #else /* ! __BIG_ENDIAN */
1182 /*
1183 * do not swap shorts on little endian
1184 *
1185 * See CF+ and CompactFlash Specification Revision 2.0:
1186 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1187 */
1188 dev_desc->lba = iop.lba_capacity;
1189 #endif /* __BIG_ENDIAN */
1190
1191 #ifdef CONFIG_LBA48
1192 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
1193 dev_desc->lba48 = 1;
1194 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
1195 ((unsigned long long) iop.lba48_capacity[1] << 16) |
1196 ((unsigned long long) iop.lba48_capacity[2] << 32) |
1197 ((unsigned long long) iop.lba48_capacity[3] << 48);
1198 } else {
1199 dev_desc->lba48 = 0;
1200 }
1201 #endif /* CONFIG_LBA48 */
1202 /* assuming HD */
1203 dev_desc->type = DEV_TYPE_HARDDISK;
1204 dev_desc->blksz = ATA_BLOCKSIZE;
1205 dev_desc->lun = 0; /* just to fill something in... */
1206
1207 #if 0 /* only used to test the powersaving mode,
1208 * if enabled, the drive goes after 5 sec
1209 * in standby mode */
1210 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1211 c = ide_wait(device, IDE_TIME_OUT);
1212 ide_outb(device, ATA_SECT_CNT, 1);
1213 ide_outb(device, ATA_LBA_LOW, 0);
1214 ide_outb(device, ATA_LBA_MID, 0);
1215 ide_outb(device, ATA_LBA_HIGH, 0);
1216 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1217 ide_outb(device, ATA_COMMAND, 0xe3);
1218 udelay(50);
1219 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
1220 #endif
1221 }
1222
1223
1224 /* ------------------------------------------------------------------------- */
1225
1226 ulong ide_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1227 {
1228 ulong n = 0;
1229 unsigned char c;
1230 unsigned char pwrsave = 0; /* power save */
1231
1232 #ifdef CONFIG_LBA48
1233 unsigned char lba48 = 0;
1234
1235 if (blknr & 0x0000fffff0000000ULL) {
1236 /* more than 28 bits used, use 48bit mode */
1237 lba48 = 1;
1238 }
1239 #endif
1240 debug("ide_read dev %d start %lX, blocks %lX buffer at %lX\n",
1241 device, blknr, blkcnt, (ulong) buffer);
1242
1243 ide_led(DEVICE_LED(device), 1); /* LED on */
1244
1245 /* Select device
1246 */
1247 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1248 c = ide_wait(device, IDE_TIME_OUT);
1249
1250 if (c & ATA_STAT_BUSY) {
1251 printf("IDE read: device %d not ready\n", device);
1252 goto IDE_READ_E;
1253 }
1254
1255 /* first check if the drive is in Powersaving mode, if yes,
1256 * increase the timeout value */
1257 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
1258 udelay(50);
1259
1260 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
1261
1262 if (c & ATA_STAT_BUSY) {
1263 printf("IDE read: device %d not ready\n", device);
1264 goto IDE_READ_E;
1265 }
1266 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1267 printf("No Powersaving mode %X\n", c);
1268 } else {
1269 c = ide_inb(device, ATA_SECT_CNT);
1270 debug("Powersaving %02X\n", c);
1271 if (c == 0)
1272 pwrsave = 1;
1273 }
1274
1275
1276 while (blkcnt-- > 0) {
1277
1278 c = ide_wait(device, IDE_TIME_OUT);
1279
1280 if (c & ATA_STAT_BUSY) {
1281 printf("IDE read: device %d not ready\n", device);
1282 break;
1283 }
1284 #ifdef CONFIG_LBA48
1285 if (lba48) {
1286 /* write high bits */
1287 ide_outb(device, ATA_SECT_CNT, 0);
1288 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1289 #ifdef CONFIG_SYS_64BIT_LBA
1290 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1291 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1292 #else
1293 ide_outb(device, ATA_LBA_MID, 0);
1294 ide_outb(device, ATA_LBA_HIGH, 0);
1295 #endif
1296 }
1297 #endif
1298 ide_outb(device, ATA_SECT_CNT, 1);
1299 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1300 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1301 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1302
1303 #ifdef CONFIG_LBA48
1304 if (lba48) {
1305 ide_outb(device, ATA_DEV_HD,
1306 ATA_LBA | ATA_DEVICE(device));
1307 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
1308
1309 } else
1310 #endif
1311 {
1312 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1313 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1314 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
1315 }
1316
1317 udelay(50);
1318
1319 if (pwrsave) {
1320 /* may take up to 4 sec */
1321 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
1322 pwrsave = 0;
1323 } else {
1324 /* can't take over 500 ms */
1325 c = ide_wait(device, IDE_TIME_OUT);
1326 }
1327
1328 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1329 ATA_STAT_DRQ) {
1330 #if defined(CONFIG_SYS_64BIT_LBA)
1331 printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n",
1332 device, blknr, c);
1333 #else
1334 printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1335 device, (ulong) blknr, c);
1336 #endif
1337 break;
1338 }
1339
1340 input_data(device, buffer, ATA_SECTORWORDS);
1341 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
1342
1343 ++n;
1344 ++blknr;
1345 buffer += ATA_BLOCKSIZE;
1346 }
1347 IDE_READ_E:
1348 ide_led(DEVICE_LED(device), 0); /* LED off */
1349 return (n);
1350 }
1351
1352 /* ------------------------------------------------------------------------- */
1353
1354
1355 ulong ide_write(int device, lbaint_t blknr, ulong blkcnt, const void *buffer)
1356 {
1357 ulong n = 0;
1358 unsigned char c;
1359
1360 #ifdef CONFIG_LBA48
1361 unsigned char lba48 = 0;
1362
1363 if (blknr & 0x0000fffff0000000ULL) {
1364 /* more than 28 bits used, use 48bit mode */
1365 lba48 = 1;
1366 }
1367 #endif
1368
1369 ide_led(DEVICE_LED(device), 1); /* LED on */
1370
1371 /* Select device
1372 */
1373 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1374
1375 while (blkcnt-- > 0) {
1376
1377 c = ide_wait(device, IDE_TIME_OUT);
1378
1379 if (c & ATA_STAT_BUSY) {
1380 printf("IDE read: device %d not ready\n", device);
1381 goto WR_OUT;
1382 }
1383 #ifdef CONFIG_LBA48
1384 if (lba48) {
1385 /* write high bits */
1386 ide_outb(device, ATA_SECT_CNT, 0);
1387 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1388 #ifdef CONFIG_SYS_64BIT_LBA
1389 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1390 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1391 #else
1392 ide_outb(device, ATA_LBA_MID, 0);
1393 ide_outb(device, ATA_LBA_HIGH, 0);
1394 #endif
1395 }
1396 #endif
1397 ide_outb(device, ATA_SECT_CNT, 1);
1398 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1399 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1400 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1401
1402 #ifdef CONFIG_LBA48
1403 if (lba48) {
1404 ide_outb(device, ATA_DEV_HD,
1405 ATA_LBA | ATA_DEVICE(device));
1406 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1407
1408 } else
1409 #endif
1410 {
1411 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1412 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1413 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
1414 }
1415
1416 udelay(50);
1417
1418 /* can't take over 500 ms */
1419 c = ide_wait(device, IDE_TIME_OUT);
1420
1421 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1422 ATA_STAT_DRQ) {
1423 #if defined(CONFIG_SYS_64BIT_LBA)
1424 printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n",
1425 device, blknr, c);
1426 #else
1427 printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1428 device, (ulong) blknr, c);
1429 #endif
1430 goto WR_OUT;
1431 }
1432
1433 output_data(device, buffer, ATA_SECTORWORDS);
1434 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
1435 ++n;
1436 ++blknr;
1437 buffer += ATA_BLOCKSIZE;
1438 }
1439 WR_OUT:
1440 ide_led(DEVICE_LED(device), 0); /* LED off */
1441 return (n);
1442 }
1443
1444 /* ------------------------------------------------------------------------- */
1445
1446 /*
1447 * copy src to dest, skipping leading and trailing blanks and null
1448 * terminate the string
1449 * "len" is the size of available memory including the terminating '\0'
1450 */
1451 static void ident_cpy(unsigned char *dst, unsigned char *src,
1452 unsigned int len)
1453 {
1454 unsigned char *end, *last;
1455
1456 last = dst;
1457 end = src + len - 1;
1458
1459 /* reserve space for '\0' */
1460 if (len < 2)
1461 goto OUT;
1462
1463 /* skip leading white space */
1464 while ((*src) && (src < end) && (*src == ' '))
1465 ++src;
1466
1467 /* copy string, omitting trailing white space */
1468 while ((*src) && (src < end)) {
1469 *dst++ = *src;
1470 if (*src++ != ' ')
1471 last = dst;
1472 }
1473 OUT:
1474 *last = '\0';
1475 }
1476
1477 /* ------------------------------------------------------------------------- */
1478
1479 /*
1480 * Wait until Busy bit is off, or timeout (in ms)
1481 * Return last status
1482 */
1483 static uchar ide_wait(int dev, ulong t)
1484 {
1485 ulong delay = 10 * t; /* poll every 100 us */
1486 uchar c;
1487
1488 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
1489 udelay(100);
1490 if (delay-- == 0)
1491 break;
1492 }
1493 return (c);
1494 }
1495
1496 /* ------------------------------------------------------------------------- */
1497
1498 #ifdef CONFIG_IDE_RESET
1499 extern void ide_set_reset(int idereset);
1500
1501 static void ide_reset(void)
1502 {
1503 #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
1504 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
1505 #endif
1506 int i;
1507
1508 curr_device = -1;
1509 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
1510 ide_bus_ok[i] = 0;
1511 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
1512 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1513
1514 ide_set_reset(1); /* assert reset */
1515
1516 /* the reset signal shall be asserted for et least 25 us */
1517 udelay(25);
1518
1519 WATCHDOG_RESET();
1520
1521 #ifdef CONFIG_SYS_PB_12V_ENABLE
1522 /* 12V Enable output OFF */
1523 immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE);
1524
1525 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
1526 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
1527 immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
1528
1529 /* wait 500 ms for the voltage to stabilize */
1530 for (i = 0; i < 500; ++i)
1531 udelay(1000);
1532
1533 /* 12V Enable output ON */
1534 immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE;
1535 #endif /* CONFIG_SYS_PB_12V_ENABLE */
1536
1537 #ifdef CONFIG_SYS_PB_IDE_MOTOR
1538 /* configure IDE Motor voltage monitor pin as input */
1539 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1540 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1541 immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1542
1543 /* wait up to 1 s for the motor voltage to stabilize */
1544 for (i = 0; i < 1000; ++i) {
1545 if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
1546 break;
1547 }
1548 udelay(1000);
1549 }
1550
1551 if (i == 1000) { /* Timeout */
1552 printf("\nWarning: 5V for IDE Motor missing\n");
1553 #ifdef CONFIG_STATUS_LED
1554 #ifdef STATUS_LED_YELLOW
1555 status_led_set(STATUS_LED_YELLOW, STATUS_LED_ON);
1556 #endif
1557 #ifdef STATUS_LED_GREEN
1558 status_led_set(STATUS_LED_GREEN, STATUS_LED_OFF);
1559 #endif
1560 #endif /* CONFIG_STATUS_LED */
1561 }
1562 #endif /* CONFIG_SYS_PB_IDE_MOTOR */
1563
1564 WATCHDOG_RESET();
1565
1566 /* de-assert RESET signal */
1567 ide_set_reset(0);
1568
1569 /* wait 250 ms */
1570 for (i = 0; i < 250; ++i)
1571 udelay(1000);
1572 }
1573
1574 #endif /* CONFIG_IDE_RESET */
1575
1576 /* ------------------------------------------------------------------------- */
1577
1578 #if defined(CONFIG_IDE_LED) && \
1579 !defined(CONFIG_CPC45) && \
1580 !defined(CONFIG_KUP4K) && \
1581 !defined(CONFIG_KUP4X)
1582
1583 static uchar led_buffer; /* Buffer for current LED status */
1584
1585 static void ide_led(uchar led, uchar status)
1586 {
1587 uchar *led_port = LED_PORT;
1588
1589 if (status) /* switch LED on */
1590 led_buffer |= led;
1591 else /* switch LED off */
1592 led_buffer &= ~led;
1593
1594 *led_port = led_buffer;
1595 }
1596
1597 #endif /* CONFIG_IDE_LED */
1598
1599 #if defined(CONFIG_OF_IDE_FIXUP)
1600 int ide_device_present(int dev)
1601 {
1602 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1603 return 0;
1604 return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
1605 }
1606 #endif
1607 /* ------------------------------------------------------------------------- */
1608
1609 #ifdef CONFIG_ATAPI
1610 /****************************************************************************
1611 * ATAPI Support
1612 */
1613
1614 #if defined(CONFIG_IDE_SWAP_IO)
1615 /* since ATAPI may use commands with not 4 bytes alligned length
1616 * we have our own transfer functions, 2 bytes alligned */
1617 static void output_data_shorts(int dev, ushort *sect_buf, int shorts)
1618 {
1619 #if defined(CONFIG_CPC45)
1620 uchar *dbuf;
1621 volatile uchar *pbuf_even;
1622 volatile uchar *pbuf_odd;
1623
1624 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
1625 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
1626 while (shorts--) {
1627 EIEIO;
1628 *pbuf_even = *dbuf++;
1629 EIEIO;
1630 *pbuf_odd = *dbuf++;
1631 }
1632 #else
1633 ushort *dbuf;
1634 volatile ushort *pbuf;
1635
1636 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
1637 dbuf = (ushort *) sect_buf;
1638
1639 debug("in output data shorts base for read is %lx\n",
1640 (unsigned long) pbuf);
1641
1642 while (shorts--) {
1643 EIEIO;
1644 *pbuf = *dbuf++;
1645 }
1646 #endif
1647 }
1648
1649 static void input_data_shorts(int dev, ushort *sect_buf, int shorts)
1650 {
1651 #if defined(CONFIG_CPC45)
1652 uchar *dbuf;
1653 volatile uchar *pbuf_even;
1654 volatile uchar *pbuf_odd;
1655
1656 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
1657 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
1658 while (shorts--) {
1659 EIEIO;
1660 *dbuf++ = *pbuf_even;
1661 EIEIO;
1662 *dbuf++ = *pbuf_odd;
1663 }
1664 #else
1665 ushort *dbuf;
1666 volatile ushort *pbuf;
1667
1668 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
1669 dbuf = (ushort *) sect_buf;
1670
1671 debug("in input data shorts base for read is %lx\n",
1672 (unsigned long) pbuf);
1673
1674 while (shorts--) {
1675 EIEIO;
1676 *dbuf++ = *pbuf;
1677 }
1678 #endif
1679 }
1680
1681 #else /* ! CONFIG_IDE_SWAP_IO */
1682 static void output_data_shorts(int dev, ushort *sect_buf, int shorts)
1683 {
1684 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
1685 }
1686
1687 static void input_data_shorts(int dev, ushort *sect_buf, int shorts)
1688 {
1689 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
1690 }
1691
1692 #endif /* CONFIG_IDE_SWAP_IO */
1693
1694 /*
1695 * Wait until (Status & mask) == res, or timeout (in ms)
1696 * Return last status
1697 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1698 * and then they set their DRQ Bit
1699 */
1700 static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
1701 {
1702 ulong delay = 10 * t; /* poll every 100 us */
1703 uchar c;
1704
1705 /* prevents to read the status before valid */
1706 c = ide_inb(dev, ATA_DEV_CTL);
1707
1708 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
1709 /* break if error occurs (doesn't make sense to wait more) */
1710 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
1711 break;
1712 udelay(100);
1713 if (delay-- == 0)
1714 break;
1715 }
1716 return (c);
1717 }
1718
1719 /*
1720 * issue an atapi command
1721 */
1722 unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
1723 unsigned char *buffer, int buflen)
1724 {
1725 unsigned char c, err, mask, res;
1726 int n;
1727
1728 ide_led(DEVICE_LED(device), 1); /* LED on */
1729
1730 /* Select device
1731 */
1732 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
1733 res = 0;
1734 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1735 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1736 if ((c & mask) != res) {
1737 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
1738 c);
1739 err = 0xFF;
1740 goto AI_OUT;
1741 }
1742 /* write taskfile */
1743 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
1744 ide_outb(device, ATA_SECT_CNT, 0);
1745 ide_outb(device, ATA_SECT_NUM, 0);
1746 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
1747 ide_outb(device, ATA_CYL_HIGH,
1748 (unsigned char) ((buflen >> 8) & 0xFF));
1749 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1750
1751 ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
1752 udelay(50);
1753
1754 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
1755 res = ATA_STAT_DRQ;
1756 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1757
1758 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1759 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
1760 device, c);
1761 err = 0xFF;
1762 goto AI_OUT;
1763 }
1764
1765 /* write command block */
1766 output_data_shorts(device, (unsigned short *) ccb, ccblen / 2);
1767
1768 /* ATAPI Command written wait for completition */
1769 udelay(5000); /* device must set bsy */
1770
1771 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
1772 /*
1773 * if no data wait for DRQ = 0 BSY = 0
1774 * if data wait for DRQ = 1 BSY = 0
1775 */
1776 res = 0;
1777 if (buflen)
1778 res = ATA_STAT_DRQ;
1779 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1780 if ((c & mask) != res) {
1781 if (c & ATA_STAT_ERR) {
1782 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
1783 debug("atapi_issue 1 returned sense key %X status %02X\n",
1784 err, c);
1785 } else {
1786 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
1787 ccb[0], c);
1788 err = 0xFF;
1789 }
1790 goto AI_OUT;
1791 }
1792 n = ide_inb(device, ATA_CYL_HIGH);
1793 n <<= 8;
1794 n += ide_inb(device, ATA_CYL_LOW);
1795 if (n > buflen) {
1796 printf("ERROR, transfer bytes %d requested only %d\n", n,
1797 buflen);
1798 err = 0xff;
1799 goto AI_OUT;
1800 }
1801 if ((n == 0) && (buflen < 0)) {
1802 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
1803 err = 0xff;
1804 goto AI_OUT;
1805 }
1806 if (n != buflen) {
1807 debug("WARNING, transfer bytes %d not equal with requested %d\n",
1808 n, buflen);
1809 }
1810 if (n != 0) { /* data transfer */
1811 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
1812 /* we transfer shorts */
1813 n >>= 1;
1814 /* ok now decide if it is an in or output */
1815 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
1816 debug("Write to device\n");
1817 output_data_shorts(device, (unsigned short *) buffer,
1818 n);
1819 } else {
1820 debug("Read from device @ %p shorts %d\n", buffer, n);
1821 input_data_shorts(device, (unsigned short *) buffer,
1822 n);
1823 }
1824 }
1825 udelay(5000); /* seems that some CD ROMs need this... */
1826 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
1827 res = 0;
1828 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1829 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1830 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
1831 debug("atapi_issue 2 returned sense key %X status %X\n", err,
1832 c);
1833 } else {
1834 err = 0;
1835 }
1836 AI_OUT:
1837 ide_led(DEVICE_LED(device), 0); /* LED off */
1838 return (err);
1839 }
1840
1841 /*
1842 * sending the command to atapi_issue. If an status other than good
1843 * returns, an request_sense will be issued
1844 */
1845
1846 #define ATAPI_DRIVE_NOT_READY 100
1847 #define ATAPI_UNIT_ATTN 10
1848
1849 unsigned char atapi_issue_autoreq(int device,
1850 unsigned char *ccb,
1851 int ccblen,
1852 unsigned char *buffer, int buflen)
1853 {
1854 unsigned char sense_data[18], sense_ccb[12];
1855 unsigned char res, key, asc, ascq;
1856 int notready, unitattn;
1857
1858 unitattn = ATAPI_UNIT_ATTN;
1859 notready = ATAPI_DRIVE_NOT_READY;
1860
1861 retry:
1862 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
1863 if (res == 0)
1864 return 0; /* Ok */
1865
1866 if (res == 0xFF)
1867 return 0xFF; /* error */
1868
1869 debug("(auto_req)atapi_issue returned sense key %X\n", res);
1870
1871 memset(sense_ccb, 0, sizeof(sense_ccb));
1872 memset(sense_data, 0, sizeof(sense_data));
1873 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
1874 sense_ccb[4] = 18; /* allocation Length */
1875
1876 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
1877 key = (sense_data[2] & 0xF);
1878 asc = (sense_data[12]);
1879 ascq = (sense_data[13]);
1880
1881 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
1882 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
1883 sense_data[0], key, asc, ascq);
1884
1885 if ((key == 0))
1886 return 0; /* ok device ready */
1887
1888 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
1889 if (unitattn-- > 0) {
1890 udelay(200 * 1000);
1891 goto retry;
1892 }
1893 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
1894 goto error;
1895 }
1896 if ((asc == 0x4) && (ascq == 0x1)) {
1897 /* not ready, but will be ready soon */
1898 if (notready-- > 0) {
1899 udelay(200 * 1000);
1900 goto retry;
1901 }
1902 printf("Drive not ready, tried %d times\n",
1903 ATAPI_DRIVE_NOT_READY);
1904 goto error;
1905 }
1906 if (asc == 0x3a) {
1907 debug("Media not present\n");
1908 goto error;
1909 }
1910
1911 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
1912 ascq);
1913 error:
1914 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
1915 return (0xFF);
1916 }
1917
1918
1919 static void atapi_inquiry(block_dev_desc_t *dev_desc)
1920 {
1921 unsigned char ccb[12]; /* Command descriptor block */
1922 unsigned char iobuf[64]; /* temp buf */
1923 unsigned char c;
1924 int device;
1925
1926 device = dev_desc->dev;
1927 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
1928 dev_desc->block_read = atapi_read;
1929
1930 memset(ccb, 0, sizeof(ccb));
1931 memset(iobuf, 0, sizeof(iobuf));
1932
1933 ccb[0] = ATAPI_CMD_INQUIRY;
1934 ccb[4] = 40; /* allocation Legnth */
1935 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 40);
1936
1937 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
1938 if (c != 0)
1939 return;
1940
1941 /* copy device ident strings */
1942 ident_cpy((unsigned char *) dev_desc->vendor, &iobuf[8], 8);
1943 ident_cpy((unsigned char *) dev_desc->product, &iobuf[16], 16);
1944 ident_cpy((unsigned char *) dev_desc->revision, &iobuf[32], 5);
1945
1946 dev_desc->lun = 0;
1947 dev_desc->lba = 0;
1948 dev_desc->blksz = 0;
1949 dev_desc->type = iobuf[0] & 0x1f;
1950
1951 if ((iobuf[1] & 0x80) == 0x80)
1952 dev_desc->removable = 1;
1953 else
1954 dev_desc->removable = 0;
1955
1956 memset(ccb, 0, sizeof(ccb));
1957 memset(iobuf, 0, sizeof(iobuf));
1958 ccb[0] = ATAPI_CMD_START_STOP;
1959 ccb[4] = 0x03; /* start */
1960
1961 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
1962
1963 debug("ATAPI_CMD_START_STOP returned %x\n", c);
1964 if (c != 0)
1965 return;
1966
1967 memset(ccb, 0, sizeof(ccb));
1968 memset(iobuf, 0, sizeof(iobuf));
1969 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
1970
1971 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
1972 if (c != 0)
1973 return;
1974
1975 memset(ccb, 0, sizeof(ccb));
1976 memset(iobuf, 0, sizeof(iobuf));
1977 ccb[0] = ATAPI_CMD_READ_CAP;
1978 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 8);
1979 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
1980 if (c != 0)
1981 return;
1982
1983 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
1984 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
1985 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
1986
1987 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
1988 ((unsigned long) iobuf[1] << 16) +
1989 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
1990 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
1991 ((unsigned long) iobuf[5] << 16) +
1992 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
1993 #ifdef CONFIG_LBA48
1994 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
1995 dev_desc->lba48 = 0;
1996 #endif
1997 return;
1998 }
1999
2000
2001 /*
2002 * atapi_read:
2003 * we transfer only one block per command, since the multiple DRQ per
2004 * command is not yet implemented
2005 */
2006 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
2007 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
2008 #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
2009
2010 ulong atapi_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
2011 {
2012 ulong n = 0;
2013 unsigned char ccb[12]; /* Command descriptor block */
2014 ulong cnt;
2015
2016 debug("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
2017 device, blknr, blkcnt, (ulong) buffer);
2018
2019 do {
2020 if (blkcnt > ATAPI_READ_MAX_BLOCK)
2021 cnt = ATAPI_READ_MAX_BLOCK;
2022 else
2023 cnt = blkcnt;
2024
2025 ccb[0] = ATAPI_CMD_READ_12;
2026 ccb[1] = 0; /* reserved */
2027 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
2028 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
2029 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
2030 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
2031 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
2032 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
2033 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
2034 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
2035 ccb[10] = 0; /* reserved */
2036 ccb[11] = 0; /* reserved */
2037
2038 if (atapi_issue_autoreq(device, ccb, 12,
2039 (unsigned char *) buffer,
2040 cnt * ATAPI_READ_BLOCK_SIZE)
2041 == 0xFF) {
2042 return (n);
2043 }
2044 n += cnt;
2045 blkcnt -= cnt;
2046 blknr += cnt;
2047 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
2048 } while (blkcnt > 0);
2049 return (n);
2050 }
2051
2052 /* ------------------------------------------------------------------------- */
2053
2054 #endif /* CONFIG_ATAPI */
2055
2056 U_BOOT_CMD(ide, 5, 1, do_ide,
2057 "IDE sub-system",
2058 "reset - reset IDE controller\n"
2059 "ide info - show available IDE devices\n"
2060 "ide device [dev] - show or set current device\n"
2061 "ide part [dev] - print partition table of one or all IDE devices\n"
2062 "ide read addr blk# cnt\n"
2063 "ide write addr blk# cnt - read/write `cnt'"
2064 " blocks starting at block `blk#'\n"
2065 " to/from memory address `addr'");
2066
2067 U_BOOT_CMD(diskboot, 3, 1, do_diskboot,
2068 "boot from IDE device", "loadAddr dev:part");
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