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git.ipfire.org Git - people/ms/u-boot.git/blob - common/cmd_reginfo.c
3 * Subodh Nijsure, SkyStream Networks, snijsure@skystream.com
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #if defined(CONFIG_8xx)
29 #elif defined (CONFIG_405GP)
30 #include <asm/processor.h>
32 #if (CONFIG_COMMANDS & CFG_CMD_REGINFO)
34 int do_reginfo (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
36 #if defined(CONFIG_8xx)
37 volatile immap_t
*immap
= (immap_t
*)CFG_IMMR
;
38 volatile memctl8xx_t
*memctl
= &immap
->im_memctl
;
39 volatile sysconf8xx_t
*sysconf
= &immap
->im_siu_conf
;
40 volatile sit8xx_t
*timers
= &immap
->im_sit
;
42 /* Hopefully more PowerPC knowledgable people will add code to display
43 * other useful registers
46 printf("\nSystem Configuration registers\n");
48 printf("\tIMMR\t0x%08X\n", get_immr(0));
50 printf("\tSIUMCR\t0x%08X", sysconf
->sc_siumcr
);
51 printf("\tSYPCR\t0x%08X\n",sysconf
->sc_sypcr
);
53 printf("\tSWT\t0x%08X", sysconf
->sc_swt
);
54 printf("\tSWSR\t0x%04X\n", sysconf
->sc_swsr
);
56 printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X\n",
57 sysconf
->sc_sipend
, sysconf
->sc_simask
);
58 printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X\n",
59 sysconf
->sc_siel
, sysconf
->sc_sivec
);
60 printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n",
61 sysconf
->sc_tesr
, sysconf
->sc_sdcr
);
63 printf("Memory Controller Registers\n");
65 printf("\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl
->memc_br0
, memctl
->memc_or0
);
66 printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl
->memc_br1
, memctl
->memc_or1
);
67 printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl
->memc_br2
, memctl
->memc_or2
);
68 printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl
->memc_br3
, memctl
->memc_or3
);
69 printf("\tBR4\t0x%08X\tOR4\t0x%08X \n", memctl
->memc_br4
, memctl
->memc_or4
);
70 printf("\tBR5\t0x%08X\tOR5\t0x%08X \n", memctl
->memc_br5
, memctl
->memc_or5
);
71 printf("\tBR6\t0x%08X\tOR6\t0x%08X \n", memctl
->memc_br6
, memctl
->memc_or6
);
72 printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", memctl
->memc_br7
, memctl
->memc_or7
);
75 printf("\tmamr\t0x%08X\tmbmr\t0x%08X \n",
76 memctl
->memc_mamr
, memctl
->memc_mbmr
);
77 printf("\tmstat\t0x%08X\tmptpr\t0x%08X \n",
78 memctl
->memc_mstat
, memctl
->memc_mptpr
);
79 printf("\tmdr\t0x%08X \n", memctl
->memc_mdr
);
81 printf("\nSystem Integration Timers\n");
82 printf("\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n",
83 timers
->sit_tbscr
, timers
->sit_rtcsc
);
84 printf("\tPISCR\t0x%08X \n", timers
->sit_piscr
);
87 * May be some CPM info here?
90 /* DBU[dave@cray.com] For the CRAY-L1, but should be generically 405gp */
91 #elif defined (CONFIG_405GP)
92 printf("\n405GP registers; MSR=%x\n",mfmsr());
93 printf ("\nUniversal Interrupt Controller Regs\n"
94 "uicsr uicsrs uicer uiccr uicpr uictr uicmsr uicvr uicvcr"
96 "%08x %08x %08x %08x %08x %08x %08x %08x %08x\n",
107 printf ("\nMemory (SDRAM) Configuration\n"
108 "besra besrsa besrb besrsb bear mcopt1 rtr pmit\n");
110 mtdcr(memcfga
,mem_besra
); printf ("%08x ", mfdcr(memcfgd
));
111 mtdcr(memcfga
,mem_besrsa
); printf ("%08x ", mfdcr(memcfgd
));
112 mtdcr(memcfga
,mem_besrb
); printf ("%08x ", mfdcr(memcfgd
));
113 mtdcr(memcfga
,mem_besrsb
); printf ("%08x ", mfdcr(memcfgd
));
114 mtdcr(memcfga
,mem_bear
); printf ("%08x ", mfdcr(memcfgd
));
115 mtdcr(memcfga
,mem_mcopt1
); printf ("%08x ", mfdcr(memcfgd
));
116 mtdcr(memcfga
,mem_rtr
); printf ("%08x ", mfdcr(memcfgd
));
117 mtdcr(memcfga
,mem_pmit
); printf ("%08x ", mfdcr(memcfgd
));
120 "mb0cf mb1cf mb2cf mb3cf sdtr1 ecccf eccerr\n");
121 mtdcr(memcfga
,mem_mb0cf
); printf ("%08x ", mfdcr(memcfgd
));
122 mtdcr(memcfga
,mem_mb1cf
); printf ("%08x ", mfdcr(memcfgd
));
123 mtdcr(memcfga
,mem_mb2cf
); printf ("%08x ", mfdcr(memcfgd
));
124 mtdcr(memcfga
,mem_mb3cf
); printf ("%08x ", mfdcr(memcfgd
));
125 mtdcr(memcfga
,mem_sdtr1
); printf ("%08x ", mfdcr(memcfgd
));
126 mtdcr(memcfga
,mem_ecccf
); printf ("%08x ", mfdcr(memcfgd
));
127 mtdcr(memcfga
,mem_eccerr
); printf ("%08x ", mfdcr(memcfgd
));
131 "dmasr dmasgc dmaadr\n" "%08x %08x %08x\n"
132 "dmacr_0 dmact_0 dmada_0 dmasa_0 dmasb_0\n" "%08x %08x %08x %08x %08x\n"
133 "dmacr_1 dmact_1 dmada_1 dmasa_1 dmasb_1\n" "%08x %08x %08x %08x %08x\n",
134 mfdcr(dmasr
), mfdcr(dmasgc
),mfdcr(dmaadr
),
135 mfdcr(dmacr0
), mfdcr(dmact0
),mfdcr(dmada0
), mfdcr(dmasa0
), mfdcr(dmasb0
),
136 mfdcr(dmacr1
), mfdcr(dmact1
),mfdcr(dmada1
), mfdcr(dmasa1
), mfdcr(dmasb1
));
139 "dmacr_2 dmact_2 dmada_2 dmasa_2 dmasb_2\n" "%08x %08x %08x %08x %08x\n"
140 "dmacr_3 dmact_3 dmada_3 dmasa_3 dmasb_3\n" "%08x %08x %08x %08x %08x\n",
141 mfdcr(dmacr2
), mfdcr(dmact2
),mfdcr(dmada2
), mfdcr(dmasa2
), mfdcr(dmasb2
),
142 mfdcr(dmacr3
), mfdcr(dmact3
),mfdcr(dmada3
), mfdcr(dmasa3
), mfdcr(dmasb3
) );
146 "pbear pbesr0 pbesr1 epcr\n");
147 mtdcr(ebccfga
,pbear
); printf ("%08x ", mfdcr(ebccfgd
));
148 mtdcr(ebccfga
,pbesr0
); printf ("%08x ", mfdcr(ebccfgd
));
149 mtdcr(ebccfga
,pbesr1
); printf ("%08x ", mfdcr(ebccfgd
));
150 mtdcr(ebccfga
,epcr
); printf ("%08x ", mfdcr(ebccfgd
));
153 "pb0cr pb0ap pb1cr bp1ap pb2cr pb2ap pb3cr pb3ap\n");
154 mtdcr(ebccfga
,pb0cr
); printf ("%08x ", mfdcr(ebccfgd
));
155 mtdcr(ebccfga
,pb0ap
); printf ("%08x ", mfdcr(ebccfgd
));
156 mtdcr(ebccfga
,pb1cr
); printf ("%08x ", mfdcr(ebccfgd
));
157 mtdcr(ebccfga
,pb1ap
); printf ("%08x ", mfdcr(ebccfgd
));
158 mtdcr(ebccfga
,pb2cr
); printf ("%08x ", mfdcr(ebccfgd
));
159 mtdcr(ebccfga
,pb2ap
); printf ("%08x ", mfdcr(ebccfgd
));
160 mtdcr(ebccfga
,pb3cr
); printf ("%08x ", mfdcr(ebccfgd
));
161 mtdcr(ebccfga
,pb3ap
); printf ("%08x ", mfdcr(ebccfgd
));
164 "pb4cr pb4ap pb5cr bp5ap pb6cr pb6ap pb7cr pb7ap\n");
165 mtdcr(ebccfga
,pb4cr
); printf ("%08x ", mfdcr(ebccfgd
));
166 mtdcr(ebccfga
,pb4ap
); printf ("%08x ", mfdcr(ebccfgd
));
167 mtdcr(ebccfga
,pb5cr
); printf ("%08x ", mfdcr(ebccfgd
));
168 mtdcr(ebccfga
,pb5ap
); printf ("%08x ", mfdcr(ebccfgd
));
169 mtdcr(ebccfga
,pb6cr
); printf ("%08x ", mfdcr(ebccfgd
));
170 mtdcr(ebccfga
,pb6ap
); printf ("%08x ", mfdcr(ebccfgd
));
171 mtdcr(ebccfga
,pb7cr
); printf ("%08x ", mfdcr(ebccfgd
));
172 mtdcr(ebccfga
,pb7ap
); printf ("%08x ", mfdcr(ebccfgd
));
175 #endif /*(CONFIG_405GP)*/
180 #endif /* CONFIG_8xx && CFG_CMD_REGINFO */