]>
git.ipfire.org Git - people/ms/u-boot.git/blob - common/cmd_tsi148.c
2 * (C) Copyright 2009 Reinhard Arlt, reinhard.arlt@esd-electronics.com
4 * base on universe.h by
6 * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 #define PCI_VENDOR PCI_VENDOR_ID_TUNDRA
36 #define PCI_DEVICE PCI_DEVICE_ID_TUNDRA_TSI148
38 typedef struct _TSI148_DEV TSI148_DEV
;
47 static TSI148_DEV
*dev
;
50 * Most of the TSI148 register are BIGENDIAN
51 * This is the reason for the __raw_writel(htonl(x), x) usage!
56 int j
, result
, lastError
= 0;
60 busdevfn
= pci_find_device(PCI_VENDOR
, PCI_DEVICE
, 0);
62 puts("Tsi148: No Tundra Tsi148 found!\n");
66 /* Lets turn Latency off */
67 pci_write_config_dword(busdevfn
, 0x0c, 0);
69 dev
= malloc(sizeof(*dev
));
71 puts("Tsi148: No memory!\n");
76 memset(dev
, 0, sizeof(*dev
));
77 dev
->busdevfn
= busdevfn
;
79 pci_read_config_dword(busdevfn
, PCI_BASE_ADDRESS_0
, &val
);
81 dev
->uregs
= (TSI148
*)val
;
83 debug("Tsi148: Base : %p\n", dev
->uregs
);
86 debug("Tsi148: Read via mapping, PCI_ID = %08X\n",
87 readl(&dev
->uregs
->pci_id
));
88 if (((PCI_DEVICE
<< 16) | PCI_VENDOR
) != readl(&dev
->uregs
->pci_id
)) {
89 printf("Tsi148: Cannot read PCI-ID via Mapping: %08x\n",
90 readl(&dev
->uregs
->pci_id
));
95 debug("Tsi148: PCI_BS = %08X\n", readl(&dev
->uregs
->pci_mbarl
));
97 dev
->pci_bs
= readl(&dev
->uregs
->pci_mbarl
);
99 /* turn off windows */
100 for (j
= 0; j
< 8; j
++) {
101 __raw_writel(htonl(0x00000000), &dev
->uregs
->outbound
[j
].otat
);
102 __raw_writel(htonl(0x00000000), &dev
->uregs
->inbound
[j
].itat
);
105 /* Tsi148 VME timeout etc */
106 __raw_writel(htonl(0x00000084), &dev
->uregs
->vctrl
);
109 if ((__raw_readl(&dev
->uregs
->vstat
) & 0x00000100) != 0)
110 printf("Tsi148: System Controller!\n");
112 printf("Tsi148: Not System Controller!\n");
116 * Lets turn off interrupts
118 /* Disable interrupts in Tsi148 first */
119 __raw_writel(htonl(0x00000000), &dev
->uregs
->inten
);
120 /* Disable interrupt out */
121 __raw_writel(htonl(0x00000000), &dev
->uregs
->inteo
);
123 /* Reset all IRQ's */
124 __raw_writel(htonl(0x03ff3f00), &dev
->uregs
->intc
);
125 /* Map all ints to 0 */
126 __raw_writel(htonl(0x00000000), &dev
->uregs
->intm1
);
127 __raw_writel(htonl(0x00000000), &dev
->uregs
->intm2
);
130 val
= __raw_readl(&dev
->uregs
->vstat
);
131 val
&= ~(0x00004000);
132 __raw_writel(val
, &dev
->uregs
->vstat
);
135 debug("Tsi148: register struct size %08x\n", sizeof(TSI148
));
149 * Create pci slave window (access: pci -> vme)
151 int tsi148_pci_slave_window(unsigned int pciAddr
, unsigned int vmeAddr
,
152 int size
, int vam
, int vdw
)
155 unsigned int ctl
= 0;
162 for (i
= 0; i
< 8; i
++) {
163 if (0x00000000 == readl(&dev
->uregs
->outbound
[i
].otat
))
168 printf("Tsi148: No Image available\n");
173 debug("Tsi148: Using image %d\n", i
);
175 printf("Tsi148: Pci addr %08x\n", pciAddr
);
177 __raw_writel(htonl(pciAddr
), &dev
->uregs
->outbound
[i
].otsal
);
178 __raw_writel(0x00000000, &dev
->uregs
->outbound
[i
].otsau
);
179 __raw_writel(htonl(pciAddr
+ size
), &dev
->uregs
->outbound
[i
].oteal
);
180 __raw_writel(0x00000000, &dev
->uregs
->outbound
[i
].oteau
);
181 __raw_writel(htonl(vmeAddr
- pciAddr
), &dev
->uregs
->outbound
[i
].otofl
);
182 __raw_writel(0x00000000, &dev
->uregs
->outbound
[i
].otofu
);
184 switch (vam
& VME_AM_Axx
) {
196 switch (vam
& VME_AM_Mxx
) {
205 if (vam
& VME_AM_SUP
)
208 switch (vdw
& VME_FLAG_Dxx
) {
217 ctl
|= 0x80040000; /* enable, no prefetch */
219 __raw_writel(htonl(ctl
), &dev
->uregs
->outbound
[i
].otat
);
221 debug("Tsi148: window-addr =%p\n",
222 &dev
->uregs
->outbound
[i
].otsau
);
223 debug("Tsi148: pci slave window[%d] attr =%08x\n",
224 i
, ntohl(__raw_readl(&dev
->uregs
->outbound
[i
].otat
)));
225 debug("Tsi148: pci slave window[%d] start =%08x\n",
226 i
, ntohl(__raw_readl(&dev
->uregs
->outbound
[i
].otsal
)));
227 debug("Tsi148: pci slave window[%d] end =%08x\n",
228 i
, ntohl(__raw_readl(&dev
->uregs
->outbound
[i
].oteal
)));
229 debug("Tsi148: pci slave window[%d] offset=%08x\n",
230 i
, ntohl(__raw_readl(&dev
->uregs
->outbound
[i
].otofl
)));
238 unsigned int tsi148_eval_vam(int vam
)
240 unsigned int ctl
= 0;
242 switch (vam
& VME_AM_Axx
) {
253 switch (vam
& VME_AM_Mxx
) {
260 case (VME_AM_PROG
| VME_AM_DATA
):
265 if (vam
& VME_AM_SUP
)
267 if (vam
& VME_AM_USR
)
274 * Create vme slave window (access: vme -> pci)
276 int tsi148_vme_slave_window(unsigned int vmeAddr
, unsigned int pciAddr
,
280 unsigned int ctl
= 0;
287 for (i
= 0; i
< 8; i
++) {
288 if (0x00000000 == readl(&dev
->uregs
->inbound
[i
].itat
))
293 printf("Tsi148: No Image available\n");
298 debug("Tsi148: Using image %d\n", i
);
300 __raw_writel(htonl(vmeAddr
), &dev
->uregs
->inbound
[i
].itsal
);
301 __raw_writel(0x00000000, &dev
->uregs
->inbound
[i
].itsau
);
302 __raw_writel(htonl(vmeAddr
+ size
), &dev
->uregs
->inbound
[i
].iteal
);
303 __raw_writel(0x00000000, &dev
->uregs
->inbound
[i
].iteau
);
304 __raw_writel(htonl(pciAddr
- vmeAddr
), &dev
->uregs
->inbound
[i
].itofl
);
305 if (vmeAddr
> pciAddr
)
306 __raw_writel(0xffffffff, &dev
->uregs
->inbound
[i
].itofu
);
308 __raw_writel(0x00000000, &dev
->uregs
->inbound
[i
].itofu
);
310 ctl
= tsi148_eval_vam(vam
);
311 ctl
|= 0x80000000; /* enable */
312 __raw_writel(htonl(ctl
), &dev
->uregs
->inbound
[i
].itat
);
314 debug("Tsi148: window-addr =%p\n",
315 &dev
->uregs
->inbound
[i
].itsau
);
316 debug("Tsi148: vme slave window[%d] attr =%08x\n",
317 i
, ntohl(__raw_readl(&dev
->uregs
->inbound
[i
].itat
)));
318 debug("Tsi148: vme slave window[%d] start =%08x\n",
319 i
, ntohl(__raw_readl(&dev
->uregs
->inbound
[i
].itsal
)));
320 debug("Tsi148: vme slave window[%d] end =%08x\n",
321 i
, ntohl(__raw_readl(&dev
->uregs
->inbound
[i
].iteal
)));
322 debug("Tsi148: vme slave window[%d] offset=%08x\n",
323 i
, ntohl(__raw_readl(&dev
->uregs
->inbound
[i
].itofl
)));
332 * Create vme slave window (access: vme -> gcsr)
334 int tsi148_vme_gcsr_window(unsigned int vmeAddr
, int vam
)
344 __raw_writel(htonl(vmeAddr
), &dev
->uregs
->gbal
);
345 __raw_writel(0x00000000, &dev
->uregs
->gbau
);
347 ctl
= tsi148_eval_vam(vam
);
348 ctl
|= 0x00000080; /* enable */
349 __raw_writel(htonl(ctl
), &dev
->uregs
->gcsrat
);
356 * Create vme slave window (access: vme -> crcsr)
358 int tsi148_vme_crcsr_window(unsigned int vmeAddr
)
368 __raw_writel(htonl(vmeAddr
), &dev
->uregs
->crol
);
369 __raw_writel(0x00000000, &dev
->uregs
->crou
);
371 ctl
= 0x00000080; /* enable */
372 __raw_writel(htonl(ctl
), &dev
->uregs
->crat
);
379 * Create vme slave window (access: vme -> crg)
381 int tsi148_vme_crg_window(unsigned int vmeAddr
, int vam
)
391 __raw_writel(htonl(vmeAddr
), &dev
->uregs
->cbal
);
392 __raw_writel(0x00000000, &dev
->uregs
->cbau
);
394 ctl
= tsi148_eval_vam(vam
);
395 ctl
|= 0x00000080; /* enable */
396 __raw_writel(htonl(ctl
), &dev
->uregs
->crgat
);
403 * Tundra Tsi148 configuration
405 int do_tsi148(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
407 ulong addr1
= 0, addr2
= 0, size
= 0, vam
= 0, vdw
= 0;
414 addr1
= simple_strtoul(argv
[2], NULL
, 16);
416 addr2
= simple_strtoul(argv
[3], NULL
, 16);
418 size
= simple_strtoul(argv
[4], NULL
, 16);
420 vam
= simple_strtoul(argv
[5], NULL
, 16);
422 vdw
= simple_strtoul(argv
[7], NULL
, 16);
426 if (strcmp(argv
[1], "crg") == 0) {
428 printf("Tsi148: Configuring VME CRG Window "
430 printf(" vme=%08lx vam=%02lx\n", addr1
, vam
);
431 tsi148_vme_crg_window(addr1
, vam
);
433 printf("Tsi148: Configuring VME CR/CSR Window "
435 printf(" pci=%08lx\n", addr1
);
436 tsi148_vme_crcsr_window(addr1
);
444 printf("Tsi148: Configuring VME GCSR Window (VME->GCSR):\n");
445 printf(" vme=%08lx vam=%02lx\n", addr1
, vam
);
446 tsi148_vme_gcsr_window(addr1
, vam
);
449 printf("Tsi148: Configuring VME Slave Window (VME->PCI):\n");
450 printf(" vme=%08lx pci=%08lx size=%08lx vam=%02lx\n",
451 addr1
, addr2
, size
, vam
);
452 tsi148_vme_slave_window(addr1
, addr2
, size
, vam
);
455 printf("Tsi148: Configuring PCI Slave Window (PCI->VME):\n");
456 printf(" pci=%08lx vme=%08lx size=%08lx vam=%02lx vdw=%02lx\n",
457 addr1
, addr2
, size
, vam
, vdw
);
458 tsi148_pci_slave_window(addr1
, addr2
, size
, vam
, vdw
);
461 printf("Tsi148: Command %s not supported!\n", argv
[1]);
468 tsi148
, 8, 1, do_tsi148
,
469 "initialize and configure Turndra Tsi148\n",
471 " - initialize tsi148\n"
472 "tsi148 vme [vme_addr] [pci_addr] [size] [vam]\n"
473 " - create vme slave window (access: vme->pci)\n"
474 "tsi148 pci [pci_addr] [vme_addr] [size] [vam] [vdw]\n"
475 " - create pci slave window (access: pci->vme)\n"
476 "tsi148 crg [vme_addr] [vam]\n"
477 " - create vme slave window: (access vme->CRG\n"
478 "tsi148 crcsr [pci_addr]\n"
479 " - create vme slave window: (access vme->CR/CSR\n"
480 "tsi148 gcsr [vme_addr] [vam]\n"
481 " - create vme slave window: (access vme->GCSR\n"
482 " [vam] = VMEbus Address-Modifier: 01 -> A16 Address Space\n"
483 " 02 -> A24 Address Space\n"
484 " 03 -> A32 Address Space\n"
485 " 04 -> Usr AM Code\n"
486 " 08 -> Supervisor AM Code\n"
487 " 10 -> Data AM Code\n"
488 " 20 -> Program AM Code\n"
489 " [vdw] = VMEbus Maximum Datawidth: 02 -> D16 Data Width\n"
490 " 03 -> D32 Data Width\n"