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* Use 1-byte-read instead of -write for iprobe() function
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1 /*
2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
25 * Neil Russell.
26 */
27
28 #include <common.h>
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
30 #include <ioports.h>
31 #endif
32 #include <i2c.h>
33
34 #if defined(CONFIG_SOFT_I2C)
35
36 /* #define DEBUG_I2C */
37
38
39 /*-----------------------------------------------------------------------
40 * Definitions
41 */
42
43 #define RETRIES 0
44
45
46 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
47 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
48
49
50 #ifdef DEBUG_I2C
51 #define PRINTD(fmt,args...) do { \
52 DECLARE_GLOBAL_DATA_PTR; \
53 if (gd->have_console) \
54 printf (fmt ,##args); \
55 } while (0)
56 #else
57 #define PRINTD(fmt,args...)
58 #endif
59
60 /*-----------------------------------------------------------------------
61 * Local functions
62 */
63 static void send_reset (void);
64 static void send_start (void);
65 static void send_stop (void);
66 static void send_ack (int);
67 static int write_byte (uchar byte);
68 static uchar read_byte (int);
69
70
71 /*-----------------------------------------------------------------------
72 * Send a reset sequence consisting of 9 clocks with the data signal high
73 * to clock any confused device back into an idle state. Also send a
74 * <stop> at the end of the sequence for belts & suspenders.
75 */
76 static void send_reset(void)
77 {
78 #ifdef CONFIG_MPC8260
79 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
80 #endif
81 #ifdef CONFIG_8xx
82 volatile immap_t *immr = (immap_t *)CFG_IMMR;
83 #endif
84 int j;
85
86 I2C_ACTIVE;
87 I2C_SDA(1);
88 for(j = 0; j < 9; j++) {
89 I2C_SCL(0);
90 I2C_DELAY;
91 I2C_DELAY;
92 I2C_SCL(1);
93 I2C_DELAY;
94 I2C_DELAY;
95 }
96 send_stop();
97 I2C_TRISTATE;
98 }
99
100 /*-----------------------------------------------------------------------
101 * START: High -> Low on SDA while SCL is High
102 */
103 static void send_start(void)
104 {
105 #ifdef CONFIG_MPC8260
106 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
107 #endif
108 #ifdef CONFIG_8xx
109 volatile immap_t *immr = (immap_t *)CFG_IMMR;
110 #endif
111
112 I2C_DELAY;
113 I2C_SDA(1);
114 I2C_ACTIVE;
115 I2C_DELAY;
116 I2C_SCL(1);
117 I2C_DELAY;
118 I2C_SDA(0);
119 I2C_DELAY;
120 }
121
122 /*-----------------------------------------------------------------------
123 * STOP: Low -> High on SDA while SCL is High
124 */
125 static void send_stop(void)
126 {
127 #ifdef CONFIG_MPC8260
128 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
129 #endif
130 #ifdef CONFIG_8xx
131 volatile immap_t *immr = (immap_t *)CFG_IMMR;
132 #endif
133
134 I2C_SCL(0);
135 I2C_DELAY;
136 I2C_SDA(0);
137 I2C_ACTIVE;
138 I2C_DELAY;
139 I2C_SCL(1);
140 I2C_DELAY;
141 I2C_SDA(1);
142 I2C_DELAY;
143 I2C_TRISTATE;
144 }
145
146
147 /*-----------------------------------------------------------------------
148 * ack should be I2C_ACK or I2C_NOACK
149 */
150 static void send_ack(int ack)
151 {
152 #ifdef CONFIG_MPC8260
153 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
154 #endif
155 #ifdef CONFIG_8xx
156 volatile immap_t *immr = (immap_t *)CFG_IMMR;
157 #endif
158
159 I2C_ACTIVE;
160 I2C_SCL(0);
161 I2C_DELAY;
162
163 I2C_SDA(ack);
164
165 I2C_ACTIVE;
166 I2C_DELAY;
167 I2C_SCL(1);
168 I2C_DELAY;
169 I2C_DELAY;
170 I2C_SCL(0);
171 I2C_DELAY;
172 }
173
174
175 /*-----------------------------------------------------------------------
176 * Send 8 bits and look for an acknowledgement.
177 */
178 static int write_byte(uchar data)
179 {
180 #ifdef CONFIG_MPC8260
181 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
182 #endif
183 #ifdef CONFIG_8xx
184 volatile immap_t *immr = (immap_t *)CFG_IMMR;
185 #endif
186 int j;
187 int nack;
188
189 I2C_ACTIVE;
190 for(j = 0; j < 8; j++) {
191 I2C_SCL(0);
192 I2C_DELAY;
193 I2C_SDA(data & 0x80);
194 I2C_DELAY;
195 I2C_SCL(1);
196 I2C_DELAY;
197 I2C_DELAY;
198
199 data <<= 1;
200 }
201
202 /*
203 * Look for an <ACK>(negative logic) and return it.
204 */
205 I2C_SCL(0);
206 I2C_DELAY;
207 I2C_SDA(1);
208 I2C_TRISTATE;
209 I2C_DELAY;
210 I2C_SCL(1);
211 I2C_DELAY;
212 I2C_DELAY;
213 nack = I2C_READ;
214 I2C_SCL(0);
215 I2C_DELAY;
216 I2C_ACTIVE;
217
218 return(nack); /* not a nack is an ack */
219 }
220
221
222 /*-----------------------------------------------------------------------
223 * if ack == I2C_ACK, ACK the byte so can continue reading, else
224 * send I2C_NOACK to end the read.
225 */
226 static uchar read_byte(int ack)
227 {
228 #ifdef CONFIG_MPC8260
229 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
230 #endif
231 #ifdef CONFIG_8xx
232 volatile immap_t *immr = (immap_t *)CFG_IMMR;
233 #endif
234 int data;
235 int j;
236
237 /*
238 * Read 8 bits, MSB first.
239 */
240 I2C_TRISTATE;
241 data = 0;
242 for(j = 0; j < 8; j++) {
243 I2C_SCL(0);
244 I2C_DELAY;
245 I2C_SCL(1);
246 I2C_DELAY;
247 data <<= 1;
248 data |= I2C_READ;
249 I2C_DELAY;
250 }
251 send_ack(ack);
252
253 return(data);
254 }
255
256 /*=====================================================================*/
257 /* Public Functions */
258 /*=====================================================================*/
259
260 /*-----------------------------------------------------------------------
261 * Initialization
262 */
263 void i2c_init (int speed, int slaveaddr)
264 {
265 #ifdef CONFIG_8xx
266 volatile immap_t *immr = (immap_t *)CFG_IMMR;
267 #endif
268
269 #ifdef I2C_INIT
270 I2C_INIT;
271 #endif
272 /*
273 * WARNING: Do NOT save speed in a static variable: if the
274 * I2C routines are called before RAM is initialized (to read
275 * the DIMM SPD, for instance), RAM won't be usable and your
276 * system will crash.
277 */
278 send_reset ();
279 }
280
281 /*-----------------------------------------------------------------------
282 * Probe to see if a chip is present. Also good for checking for the
283 * completion of EEPROM writes since the chip stops responding until
284 * the write completes (typically 10mSec).
285 */
286 int i2c_probe(uchar addr)
287 {
288 int rc;
289
290 /* perform 1 byte read transaction */
291 send_start();
292 rc = write_byte ((addr << 1) | 0);
293 send_stop();
294
295 return (rc ? 1 : 0);
296 }
297
298 /*-----------------------------------------------------------------------
299 * Read bytes
300 */
301 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
302 {
303 int shift;
304 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
305 chip, addr, alen, buffer, len);
306
307 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
308 /*
309 * EEPROM chips that implement "address overflow" are ones
310 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
311 * address and the extra bits end up in the "chip address"
312 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
313 * four 256 byte chips.
314 *
315 * Note that we consider the length of the address field to
316 * still be one byte because the extra address bits are
317 * hidden in the chip address.
318 */
319 chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
320
321 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
322 chip, addr);
323 #endif
324
325 /*
326 * Do the addressing portion of a write cycle to set the
327 * chip's address pointer. If the address length is zero,
328 * don't do the normal write cycle to set the address pointer,
329 * there is no address pointer in this chip.
330 */
331 send_start();
332 if(alen > 0) {
333 if(write_byte(chip << 1)) { /* write cycle */
334 send_stop();
335 PRINTD("i2c_read, no chip responded %02X\n", chip);
336 return(1);
337 }
338 shift = (alen-1) * 8;
339 while(alen-- > 0) {
340 if(write_byte(addr >> shift)) {
341 PRINTD("i2c_read, address not <ACK>ed\n");
342 return(1);
343 }
344 shift -= 8;
345 }
346 send_stop(); /* reportedly some chips need a full stop */
347 send_start();
348 }
349 /*
350 * Send the chip address again, this time for a read cycle.
351 * Then read the data. On the last byte, we do a NACK instead
352 * of an ACK(len == 0) to terminate the read.
353 */
354 write_byte((chip << 1) | 1); /* read cycle */
355 while(len-- > 0) {
356 *buffer++ = read_byte(len == 0);
357 }
358 send_stop();
359 return(0);
360 }
361
362 /*-----------------------------------------------------------------------
363 * Write bytes
364 */
365 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
366 {
367 int shift, failures = 0;
368
369 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
370 chip, addr, alen, buffer, len);
371
372 send_start();
373 if(write_byte(chip << 1)) { /* write cycle */
374 send_stop();
375 PRINTD("i2c_write, no chip responded %02X\n", chip);
376 return(1);
377 }
378 shift = (alen-1) * 8;
379 while(alen-- > 0) {
380 if(write_byte(addr >> shift)) {
381 PRINTD("i2c_write, address not <ACK>ed\n");
382 return(1);
383 }
384 shift -= 8;
385 }
386
387 while(len-- > 0) {
388 if(write_byte(*buffer++)) {
389 failures++;
390 }
391 }
392 send_stop();
393 return(failures);
394 }
395
396 /*-----------------------------------------------------------------------
397 * Read a register
398 */
399 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
400 {
401 char buf;
402
403 i2c_read(i2c_addr, reg, 1, &buf, 1);
404
405 return(buf);
406 }
407
408 /*-----------------------------------------------------------------------
409 * Write a register
410 */
411 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
412 {
413 i2c_write(i2c_addr, reg, 1, &val, 1);
414 }
415
416
417 #endif /* CONFIG_SOFT_I2C */