]> git.ipfire.org Git - people/ms/u-boot.git/blob - common/soft_i2c.c
* Code cleanup:
[people/ms/u-boot.git] / common / soft_i2c.c
1 /*
2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
25 * Neil Russell.
26 */
27
28 #include <common.h>
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
30 #include <ioports.h>
31 #endif
32 #include <i2c.h>
33
34 #if defined(CONFIG_SOFT_I2C)
35
36 /* #define DEBUG_I2C */
37
38
39 /*-----------------------------------------------------------------------
40 * Definitions
41 */
42
43 #define RETRIES 0
44
45
46 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
47 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
48
49
50 #ifdef DEBUG_I2C
51 #define PRINTD(fmt,args...) do { \
52 DECLARE_GLOBAL_DATA_PTR; \
53 if (gd->have_console) \
54 printf (fmt ,##args); \
55 } while (0)
56 #else
57 #define PRINTD(fmt,args...)
58 #endif
59
60 /*-----------------------------------------------------------------------
61 * Local functions
62 */
63 static void send_reset (void);
64 static void send_start (void);
65 static void send_stop (void);
66 static void send_ack (int);
67 static int write_byte (uchar byte);
68 static uchar read_byte (int);
69
70
71 /*-----------------------------------------------------------------------
72 * Send a reset sequence consisting of 9 clocks with the data signal high
73 * to clock any confused device back into an idle state. Also send a
74 * <stop> at the end of the sequence for belts & suspenders.
75 */
76 static void send_reset(void)
77 {
78 #ifdef CONFIG_MPC8260
79 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
80 #endif
81 #ifdef CONFIG_8xx
82 volatile immap_t *immr = (immap_t *)CFG_IMMR;
83 #endif
84 int j;
85
86 I2C_SCL(1);
87 I2C_SDA(1);
88 #ifdef I2C_INIT
89 I2C_INIT;
90 #endif
91 I2C_TRISTATE;
92 for(j = 0; j < 9; j++) {
93 I2C_SCL(0);
94 I2C_DELAY;
95 I2C_DELAY;
96 I2C_SCL(1);
97 I2C_DELAY;
98 I2C_DELAY;
99 }
100 send_stop();
101 I2C_TRISTATE;
102 }
103
104 /*-----------------------------------------------------------------------
105 * START: High -> Low on SDA while SCL is High
106 */
107 static void send_start(void)
108 {
109 #ifdef CONFIG_MPC8260
110 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
111 #endif
112 #ifdef CONFIG_8xx
113 volatile immap_t *immr = (immap_t *)CFG_IMMR;
114 #endif
115
116 I2C_DELAY;
117 I2C_SDA(1);
118 I2C_ACTIVE;
119 I2C_DELAY;
120 I2C_SCL(1);
121 I2C_DELAY;
122 I2C_SDA(0);
123 I2C_DELAY;
124 }
125
126 /*-----------------------------------------------------------------------
127 * STOP: Low -> High on SDA while SCL is High
128 */
129 static void send_stop(void)
130 {
131 #ifdef CONFIG_MPC8260
132 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
133 #endif
134 #ifdef CONFIG_8xx
135 volatile immap_t *immr = (immap_t *)CFG_IMMR;
136 #endif
137
138 I2C_SCL(0);
139 I2C_DELAY;
140 I2C_SDA(0);
141 I2C_ACTIVE;
142 I2C_DELAY;
143 I2C_SCL(1);
144 I2C_DELAY;
145 I2C_SDA(1);
146 I2C_DELAY;
147 I2C_TRISTATE;
148 }
149
150
151 /*-----------------------------------------------------------------------
152 * ack should be I2C_ACK or I2C_NOACK
153 */
154 static void send_ack(int ack)
155 {
156 #ifdef CONFIG_MPC8260
157 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
158 #endif
159 #ifdef CONFIG_8xx
160 volatile immap_t *immr = (immap_t *)CFG_IMMR;
161 #endif
162
163 I2C_ACTIVE;
164 I2C_SCL(0);
165 I2C_DELAY;
166
167 I2C_SDA(ack);
168
169 I2C_ACTIVE;
170 I2C_DELAY;
171 I2C_SCL(1);
172 I2C_DELAY;
173 I2C_DELAY;
174 I2C_SCL(0);
175 I2C_DELAY;
176 }
177
178
179 /*-----------------------------------------------------------------------
180 * Send 8 bits and look for an acknowledgement.
181 */
182 static int write_byte(uchar data)
183 {
184 #ifdef CONFIG_MPC8260
185 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
186 #endif
187 #ifdef CONFIG_8xx
188 volatile immap_t *immr = (immap_t *)CFG_IMMR;
189 #endif
190 int j;
191 int nack;
192
193 I2C_ACTIVE;
194 for(j = 0; j < 8; j++) {
195 I2C_SCL(0);
196 I2C_DELAY;
197 I2C_SDA(data & 0x80);
198 I2C_DELAY;
199 I2C_SCL(1);
200 I2C_DELAY;
201 I2C_DELAY;
202
203 data <<= 1;
204 }
205
206 /*
207 * Look for an <ACK>(negative logic) and return it.
208 */
209 I2C_SCL(0);
210 I2C_DELAY;
211 I2C_SDA(1);
212 I2C_TRISTATE;
213 I2C_DELAY;
214 I2C_SCL(1);
215 I2C_DELAY;
216 I2C_DELAY;
217 nack = I2C_READ;
218 I2C_SCL(0);
219 I2C_DELAY;
220 I2C_ACTIVE;
221
222 return(nack); /* not a nack is an ack */
223 }
224
225
226 /*-----------------------------------------------------------------------
227 * if ack == I2C_ACK, ACK the byte so can continue reading, else
228 * send I2C_NOACK to end the read.
229 */
230 static uchar read_byte(int ack)
231 {
232 #ifdef CONFIG_MPC8260
233 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
234 #endif
235 #ifdef CONFIG_8xx
236 volatile immap_t *immr = (immap_t *)CFG_IMMR;
237 #endif
238 int data;
239 int j;
240
241 /*
242 * Read 8 bits, MSB first.
243 */
244 I2C_TRISTATE;
245 data = 0;
246 for(j = 0; j < 8; j++) {
247 I2C_SCL(0);
248 I2C_DELAY;
249 I2C_SCL(1);
250 I2C_DELAY;
251 data <<= 1;
252 data |= I2C_READ;
253 I2C_DELAY;
254 }
255 send_ack(ack);
256
257 return(data);
258 }
259
260 /*=====================================================================*/
261 /* Public Functions */
262 /*=====================================================================*/
263
264 /*-----------------------------------------------------------------------
265 * Initialization
266 */
267 void i2c_init (int speed, int slaveaddr)
268 {
269 /*
270 * WARNING: Do NOT save speed in a static variable: if the
271 * I2C routines are called before RAM is initialized (to read
272 * the DIMM SPD, for instance), RAM won't be usable and your
273 * system will crash.
274 */
275 send_reset ();
276 }
277
278 /*-----------------------------------------------------------------------
279 * Probe to see if a chip is present. Also good for checking for the
280 * completion of EEPROM writes since the chip stops responding until
281 * the write completes (typically 10mSec).
282 */
283 int i2c_probe(uchar addr)
284 {
285 int rc;
286
287 /* perform 1 byte read transaction */
288 send_start();
289 rc = write_byte ((addr << 1) | 0);
290 send_stop();
291
292 return (rc ? 1 : 0);
293 }
294
295 /*-----------------------------------------------------------------------
296 * Read bytes
297 */
298 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
299 {
300 int shift;
301 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
302 chip, addr, alen, buffer, len);
303
304 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
305 /*
306 * EEPROM chips that implement "address overflow" are ones
307 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
308 * address and the extra bits end up in the "chip address"
309 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
310 * four 256 byte chips.
311 *
312 * Note that we consider the length of the address field to
313 * still be one byte because the extra address bits are
314 * hidden in the chip address.
315 */
316 chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
317
318 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
319 chip, addr);
320 #endif
321
322 /*
323 * Do the addressing portion of a write cycle to set the
324 * chip's address pointer. If the address length is zero,
325 * don't do the normal write cycle to set the address pointer,
326 * there is no address pointer in this chip.
327 */
328 send_start();
329 if(alen > 0) {
330 if(write_byte(chip << 1)) { /* write cycle */
331 send_stop();
332 PRINTD("i2c_read, no chip responded %02X\n", chip);
333 return(1);
334 }
335 shift = (alen-1) * 8;
336 while(alen-- > 0) {
337 if(write_byte(addr >> shift)) {
338 PRINTD("i2c_read, address not <ACK>ed\n");
339 return(1);
340 }
341 shift -= 8;
342 }
343 send_stop(); /* reportedly some chips need a full stop */
344 send_start();
345 }
346 /*
347 * Send the chip address again, this time for a read cycle.
348 * Then read the data. On the last byte, we do a NACK instead
349 * of an ACK(len == 0) to terminate the read.
350 */
351 write_byte((chip << 1) | 1); /* read cycle */
352 while(len-- > 0) {
353 *buffer++ = read_byte(len == 0);
354 }
355 send_stop();
356 return(0);
357 }
358
359 /*-----------------------------------------------------------------------
360 * Write bytes
361 */
362 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
363 {
364 int shift, failures = 0;
365
366 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
367 chip, addr, alen, buffer, len);
368
369 send_start();
370 if(write_byte(chip << 1)) { /* write cycle */
371 send_stop();
372 PRINTD("i2c_write, no chip responded %02X\n", chip);
373 return(1);
374 }
375 shift = (alen-1) * 8;
376 while(alen-- > 0) {
377 if(write_byte(addr >> shift)) {
378 PRINTD("i2c_write, address not <ACK>ed\n");
379 return(1);
380 }
381 shift -= 8;
382 }
383
384 while(len-- > 0) {
385 if(write_byte(*buffer++)) {
386 failures++;
387 }
388 }
389 send_stop();
390 return(failures);
391 }
392
393 /*-----------------------------------------------------------------------
394 * Read a register
395 */
396 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
397 {
398 char buf;
399
400 i2c_read(i2c_addr, reg, 1, &buf, 1);
401
402 return(buf);
403 }
404
405 /*-----------------------------------------------------------------------
406 * Write a register
407 */
408 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
409 {
410 i2c_write(i2c_addr, reg, 1, &val, 1);
411 }
412
413
414 #endif /* CONFIG_SOFT_I2C */