configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig

   1 CONFIG_ARM=y
   2 CONFIG_ARCH_ZYNQMP=y
   3 CONFIG_SYS_MALLOC_F_LEN=0x8000
   4 CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm018 dc4"
   5 CONFIG_SYS_TEXT_BASE=0x8000000
   6 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
   7 CONFIG_FIT=y
   8 CONFIG_FIT_VERBOSE=y
   9 CONFIG_SPL_LOAD_FIT=y
  10 # CONFIG_DISPLAY_CPUINFO is not set
  11 # CONFIG_DISPLAY_BOARDINFO is not set
  12 CONFIG_SPL=y
  13 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
  14 CONFIG_HUSH_PARSER=y
  15 CONFIG_SYS_PROMPT="ZynqMP> "
  16 # CONFIG_CMD_IMLS is not set
  17 CONFIG_CMD_MEMTEST=y
  18 # CONFIG_CMD_FLASH is not set
  19 CONFIG_CMD_MMC=y
  20 CONFIG_CMD_I2C=y
  21 CONFIG_CMD_TFTPPUT=y
  22 CONFIG_CMD_DHCP=y
  23 CONFIG_CMD_MII=y
  24 CONFIG_CMD_PING=y
  25 CONFIG_CMD_TIME=y
  26 CONFIG_CMD_TIMER=y
  27 CONFIG_CMD_EXT2=y
  28 CONFIG_CMD_EXT4=y
  29 CONFIG_CMD_EXT4_WRITE=y
  30 CONFIG_CMD_FAT=y
  31 CONFIG_CMD_FS_GENERIC=y
  32 CONFIG_SPL_OF_CONTROL=y
  33 CONFIG_OF_EMBED=y
  34 CONFIG_NET_RANDOM_ETHADDR=y
  35 CONFIG_SPL_DM=y
  36 CONFIG_SPL_DM_SEQ_ALIAS=y
  37 CONFIG_BLK=y
  38 CONFIG_FPGA_XILINX=y
  39 CONFIG_FPGA_ZYNQMPPL=y
  40 CONFIG_DM_GPIO=y
  41 CONFIG_DM_I2C=y
  42 CONFIG_SYS_I2C_CADENCE=y
  43 CONFIG_DM_MMC=y
  44 CONFIG_DM_MMC_OPS=y
  45 CONFIG_ZYNQ_SDHCI=y
  46 CONFIG_DM_ETH=y
  47 CONFIG_ZYNQ_GEM=y
  48 CONFIG_DEBUG_UART=y
  49 CONFIG_DEBUG_UART_ZYNQ=y
  50 CONFIG_DEBUG_UART_BASE=0xff000000
  51 CONFIG_DEBUG_UART_CLOCK=100000000
  52 CONFIG_DEBUG_UART_ANNOUNCE=y