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* Patches by Xianghua Xiao, 15 Oct 2003:
[people/ms/u-boot.git] / cpu / arm920t / usb_ohci.c
1 /*
2 * URB OHCI HCD (Host Controller Driver) for USB on the S3C2400.
3 *
4 * (C) Copyright 2003
5 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 *
25 * Note: Part of this code has been derived from linux
26 *
27 */
28 /*
29 * IMPORTANT NOTES
30 * 1 - you MUST define LITTLEENDIAN in the configuration file for the
31 * board or this driver will NOT work!
32 * 2 - this driver is intended for use with USB Mass Storage Devices
33 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
34 */
35
36 #include <common.h>
37 /* #include <pci.h> no PCI on the S3C2400 */
38
39 #ifdef CONFIG_USB_OHCI
40
41 #include <s3c2400.h>
42 #include <malloc.h>
43 #include <usb.h>
44 #include "usb_ohci.h"
45
46 #define OHCI_USE_NPS /* force NoPowerSwitching mode */
47 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
48
49
50 /* For initializing controller (mask in an HCFS mode too) */
51 #define OHCI_CONTROL_INIT \
52 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
53
54 #define readl(a) (*((vu_long *)(a)))
55 #define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
56
57 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
58
59 #undef DEBUG
60 #ifdef DEBUG
61 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
62 #else
63 #define dbg(format, arg...) do {} while(0)
64 #endif /* DEBUG */
65 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
66 #undef SHOW_INFO
67 #ifdef SHOW_INFO
68 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
69 #else
70 #define info(format, arg...) do {} while(0)
71 #endif
72
73 #define m16_swap(x) swap_16(x)
74 #define m32_swap(x) swap_32(x)
75
76 /* global ohci_t */
77 static ohci_t gohci;
78 /* this must be aligned to a 256 byte boundary */
79 struct ohci_hcca ghcca[1];
80 /* a pointer to the aligned storage */
81 struct ohci_hcca *phcca;
82 /* this allocates EDs for all possible endpoints */
83 struct ohci_device ohci_dev;
84 /* urb_priv */
85 urb_priv_t urb_priv;
86 /* RHSC flag */
87 int got_rhsc;
88 /* device which was disconnected */
89 struct usb_device *devgone;
90
91 /*-------------------------------------------------------------------------*/
92
93 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
94 * The erratum (#4) description is incorrect. AMD's workaround waits
95 * till some bits (mostly reserved) are clear; ok for all revs.
96 */
97 #define OHCI_QUIRK_AMD756 0xabcd
98 #define read_roothub(hc, register, mask) ({ \
99 u32 temp = readl (&hc->regs->roothub.register); \
100 if (hc->flags & OHCI_QUIRK_AMD756) \
101 while (temp & mask) \
102 temp = readl (&hc->regs->roothub.register); \
103 temp; })
104
105 static u32 roothub_a (struct ohci *hc)
106 { return read_roothub (hc, a, 0xfc0fe000); }
107 static inline u32 roothub_b (struct ohci *hc)
108 { return readl (&hc->regs->roothub.b); }
109 static inline u32 roothub_status (struct ohci *hc)
110 { return readl (&hc->regs->roothub.status); }
111 static u32 roothub_portstatus (struct ohci *hc, int i)
112 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
113
114
115 /* forward declaration */
116 static int hc_interrupt (void);
117 static void
118 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
119 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
120
121 /*-------------------------------------------------------------------------*
122 * URB support functions
123 *-------------------------------------------------------------------------*/
124
125 /* free HCD-private data associated with this URB */
126
127 static void urb_free_priv (urb_priv_t * urb)
128 {
129 int i;
130 int last;
131 struct td * td;
132
133 last = urb->length - 1;
134 if (last >= 0) {
135 for (i = 0; i <= last; i++) {
136 td = urb->td[i];
137 if (td) {
138 td->usb_dev = NULL;
139 urb->td[i] = NULL;
140 }
141 }
142 }
143 }
144
145 /*-------------------------------------------------------------------------*/
146
147 #ifdef DEBUG
148 static int sohci_get_current_frame_number (struct usb_device * dev);
149
150 /* debug| print the main components of an URB
151 * small: 0) header + data packets 1) just header */
152
153 static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
154 int transfer_len, struct devrequest * setup, char * str, int small)
155 {
156 urb_priv_t * purb = &urb_priv;
157
158 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
159 str,
160 sohci_get_current_frame_number (dev),
161 usb_pipedevice (pipe),
162 usb_pipeendpoint (pipe),
163 usb_pipeout (pipe)? 'O': 'I',
164 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
165 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
166 purb->actual_length,
167 transfer_len, dev->status);
168 #ifdef OHCI_VERBOSE_DEBUG
169 if (!small) {
170 int i, len;
171
172 if (usb_pipecontrol (pipe)) {
173 printf (__FILE__ ": cmd(8):");
174 for (i = 0; i < 8 ; i++)
175 printf (" %02x", ((__u8 *) setup) [i]);
176 printf ("\n");
177 }
178 if (transfer_len > 0 && buffer) {
179 printf (__FILE__ ": data(%d/%d):",
180 purb->actual_length,
181 transfer_len);
182 len = usb_pipeout (pipe)?
183 transfer_len: purb->actual_length;
184 for (i = 0; i < 16 && i < len; i++)
185 printf (" %02x", ((__u8 *) buffer) [i]);
186 printf ("%s\n", i < len? "...": "");
187 }
188 }
189 #endif
190 }
191
192 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
193 void ep_print_int_eds (ohci_t *ohci, char * str) {
194 int i, j;
195 __u32 * ed_p;
196 for (i= 0; i < 32; i++) {
197 j = 5;
198 ed_p = &(ohci->hcca->int_table [i]);
199 if (*ed_p == 0)
200 continue;
201 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
202 while (*ed_p != 0 && j--) {
203 ed_t *ed = (ed_t *)m32_swap(ed_p);
204 printf (" ed: %4x;", ed->hwINFO);
205 ed_p = &ed->hwNextED;
206 }
207 printf ("\n");
208 }
209 }
210
211 static void ohci_dump_intr_mask (char *label, __u32 mask)
212 {
213 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
214 label,
215 mask,
216 (mask & OHCI_INTR_MIE) ? " MIE" : "",
217 (mask & OHCI_INTR_OC) ? " OC" : "",
218 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
219 (mask & OHCI_INTR_FNO) ? " FNO" : "",
220 (mask & OHCI_INTR_UE) ? " UE" : "",
221 (mask & OHCI_INTR_RD) ? " RD" : "",
222 (mask & OHCI_INTR_SF) ? " SF" : "",
223 (mask & OHCI_INTR_WDH) ? " WDH" : "",
224 (mask & OHCI_INTR_SO) ? " SO" : ""
225 );
226 }
227
228 static void maybe_print_eds (char *label, __u32 value)
229 {
230 ed_t *edp = (ed_t *)value;
231
232 if (value) {
233 dbg ("%s %08x", label, value);
234 dbg ("%08x", edp->hwINFO);
235 dbg ("%08x", edp->hwTailP);
236 dbg ("%08x", edp->hwHeadP);
237 dbg ("%08x", edp->hwNextED);
238 }
239 }
240
241 static char * hcfs2string (int state)
242 {
243 switch (state) {
244 case OHCI_USB_RESET: return "reset";
245 case OHCI_USB_RESUME: return "resume";
246 case OHCI_USB_OPER: return "operational";
247 case OHCI_USB_SUSPEND: return "suspend";
248 }
249 return "?";
250 }
251
252 /* dump control and status registers */
253 static void ohci_dump_status (ohci_t *controller)
254 {
255 struct ohci_regs *regs = controller->regs;
256 __u32 temp;
257
258 temp = readl (&regs->revision) & 0xff;
259 if (temp != 0x10)
260 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
261
262 temp = readl (&regs->control);
263 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
264 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
265 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
266 (temp & OHCI_CTRL_IR) ? " IR" : "",
267 hcfs2string (temp & OHCI_CTRL_HCFS),
268 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
269 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
270 (temp & OHCI_CTRL_IE) ? " IE" : "",
271 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
272 temp & OHCI_CTRL_CBSR
273 );
274
275 temp = readl (&regs->cmdstatus);
276 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
277 (temp & OHCI_SOC) >> 16,
278 (temp & OHCI_OCR) ? " OCR" : "",
279 (temp & OHCI_BLF) ? " BLF" : "",
280 (temp & OHCI_CLF) ? " CLF" : "",
281 (temp & OHCI_HCR) ? " HCR" : ""
282 );
283
284 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
285 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
286
287 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
288
289 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
290 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
291
292 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
293 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
294
295 maybe_print_eds ("donehead", readl (&regs->donehead));
296 }
297
298 static void ohci_dump_roothub (ohci_t *controller, int verbose)
299 {
300 __u32 temp, ndp, i;
301
302 temp = roothub_a (controller);
303 ndp = (temp & RH_A_NDP);
304
305 if (verbose) {
306 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
307 ((temp & RH_A_POTPGT) >> 24) & 0xff,
308 (temp & RH_A_NOCP) ? " NOCP" : "",
309 (temp & RH_A_OCPM) ? " OCPM" : "",
310 (temp & RH_A_DT) ? " DT" : "",
311 (temp & RH_A_NPS) ? " NPS" : "",
312 (temp & RH_A_PSM) ? " PSM" : "",
313 ndp
314 );
315 temp = roothub_b (controller);
316 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
317 temp,
318 (temp & RH_B_PPCM) >> 16,
319 (temp & RH_B_DR)
320 );
321 temp = roothub_status (controller);
322 dbg ("roothub.status: %08x%s%s%s%s%s%s",
323 temp,
324 (temp & RH_HS_CRWE) ? " CRWE" : "",
325 (temp & RH_HS_OCIC) ? " OCIC" : "",
326 (temp & RH_HS_LPSC) ? " LPSC" : "",
327 (temp & RH_HS_DRWE) ? " DRWE" : "",
328 (temp & RH_HS_OCI) ? " OCI" : "",
329 (temp & RH_HS_LPS) ? " LPS" : ""
330 );
331 }
332
333 for (i = 0; i < ndp; i++) {
334 temp = roothub_portstatus (controller, i);
335 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
336 i,
337 temp,
338 (temp & RH_PS_PRSC) ? " PRSC" : "",
339 (temp & RH_PS_OCIC) ? " OCIC" : "",
340 (temp & RH_PS_PSSC) ? " PSSC" : "",
341 (temp & RH_PS_PESC) ? " PESC" : "",
342 (temp & RH_PS_CSC) ? " CSC" : "",
343
344 (temp & RH_PS_LSDA) ? " LSDA" : "",
345 (temp & RH_PS_PPS) ? " PPS" : "",
346 (temp & RH_PS_PRS) ? " PRS" : "",
347 (temp & RH_PS_POCI) ? " POCI" : "",
348 (temp & RH_PS_PSS) ? " PSS" : "",
349
350 (temp & RH_PS_PES) ? " PES" : "",
351 (temp & RH_PS_CCS) ? " CCS" : ""
352 );
353 }
354 }
355
356 static void ohci_dump (ohci_t *controller, int verbose)
357 {
358 dbg ("OHCI controller usb-%s state", controller->slot_name);
359
360 /* dumps some of the state we know about */
361 ohci_dump_status (controller);
362 if (verbose)
363 ep_print_int_eds (controller, "hcca");
364 dbg ("hcca frame #%04x", controller->hcca->frame_no);
365 ohci_dump_roothub (controller, 1);
366 }
367
368
369 #endif /* DEBUG */
370
371 /*-------------------------------------------------------------------------*
372 * Interface functions (URB)
373 *-------------------------------------------------------------------------*/
374
375 /* get a transfer request */
376
377 int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
378 int transfer_len, struct devrequest *setup, int interval)
379 {
380 ohci_t *ohci;
381 ed_t * ed;
382 urb_priv_t *purb_priv;
383 int i, size = 0;
384
385 ohci = &gohci;
386
387 /* when controller's hung, permit only roothub cleanup attempts
388 * such as powering down ports */
389 if (ohci->disabled) {
390 err("sohci_submit_job: EPIPE");
391 return -1;
392 }
393
394 /* every endpoint has a ed, locate and fill it */
395 if (!(ed = ep_add_ed (dev, pipe))) {
396 err("sohci_submit_job: ENOMEM");
397 return -1;
398 }
399
400 /* for the private part of the URB we need the number of TDs (size) */
401 switch (usb_pipetype (pipe)) {
402 case PIPE_BULK: /* one TD for every 4096 Byte */
403 size = (transfer_len - 1) / 4096 + 1;
404 break;
405 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
406 size = (transfer_len == 0)? 2:
407 (transfer_len - 1) / 4096 + 3;
408 break;
409 }
410
411 if (size >= (N_URB_TD - 1)) {
412 err("need %d TDs, only have %d", size, N_URB_TD);
413 return -1;
414 }
415 purb_priv = &urb_priv;
416 purb_priv->pipe = pipe;
417
418 /* fill the private part of the URB */
419 purb_priv->length = size;
420 purb_priv->ed = ed;
421 purb_priv->actual_length = 0;
422
423 /* allocate the TDs */
424 /* note that td[0] was allocated in ep_add_ed */
425 for (i = 0; i < size; i++) {
426 purb_priv->td[i] = td_alloc (dev);
427 if (!purb_priv->td[i]) {
428 purb_priv->length = i;
429 urb_free_priv (purb_priv);
430 err("sohci_submit_job: ENOMEM");
431 return -1;
432 }
433 }
434
435 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
436 urb_free_priv (purb_priv);
437 err("sohci_submit_job: EINVAL");
438 return -1;
439 }
440
441 /* link the ed into a chain if is not already */
442 if (ed->state != ED_OPER)
443 ep_link (ohci, ed);
444
445 /* fill the TDs and link it to the ed */
446 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
447
448 return 0;
449 }
450
451 /*-------------------------------------------------------------------------*/
452
453 #ifdef DEBUG
454 /* tell us the current USB frame number */
455
456 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
457 {
458 ohci_t *ohci = &gohci;
459
460 return m16_swap (ohci->hcca->frame_no);
461 }
462 #endif
463
464 /*-------------------------------------------------------------------------*
465 * ED handling functions
466 *-------------------------------------------------------------------------*/
467
468 /* link an ed into one of the HC chains */
469
470 static int ep_link (ohci_t *ohci, ed_t *edi)
471 {
472 volatile ed_t *ed = edi;
473
474 ed->state = ED_OPER;
475
476 switch (ed->type) {
477 case PIPE_CONTROL:
478 ed->hwNextED = 0;
479 if (ohci->ed_controltail == NULL) {
480 writel (ed, &ohci->regs->ed_controlhead);
481 } else {
482 ohci->ed_controltail->hwNextED = m32_swap (ed);
483 }
484 ed->ed_prev = ohci->ed_controltail;
485 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
486 !ohci->ed_rm_list[1] && !ohci->sleeping) {
487 ohci->hc_control |= OHCI_CTRL_CLE;
488 writel (ohci->hc_control, &ohci->regs->control);
489 }
490 ohci->ed_controltail = edi;
491 break;
492
493 case PIPE_BULK:
494 ed->hwNextED = 0;
495 if (ohci->ed_bulktail == NULL) {
496 writel (ed, &ohci->regs->ed_bulkhead);
497 } else {
498 ohci->ed_bulktail->hwNextED = m32_swap (ed);
499 }
500 ed->ed_prev = ohci->ed_bulktail;
501 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
502 !ohci->ed_rm_list[1] && !ohci->sleeping) {
503 ohci->hc_control |= OHCI_CTRL_BLE;
504 writel (ohci->hc_control, &ohci->regs->control);
505 }
506 ohci->ed_bulktail = edi;
507 break;
508 }
509 return 0;
510 }
511
512 /*-------------------------------------------------------------------------*/
513
514 /* unlink an ed from one of the HC chains.
515 * just the link to the ed is unlinked.
516 * the link from the ed still points to another operational ed or 0
517 * so the HC can eventually finish the processing of the unlinked ed */
518
519 static int ep_unlink (ohci_t *ohci, ed_t *ed)
520 {
521 ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
522
523 switch (ed->type) {
524 case PIPE_CONTROL:
525 if (ed->ed_prev == NULL) {
526 if (!ed->hwNextED) {
527 ohci->hc_control &= ~OHCI_CTRL_CLE;
528 writel (ohci->hc_control, &ohci->regs->control);
529 }
530 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
531 } else {
532 ed->ed_prev->hwNextED = ed->hwNextED;
533 }
534 if (ohci->ed_controltail == ed) {
535 ohci->ed_controltail = ed->ed_prev;
536 } else {
537 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
538 }
539 break;
540
541 case PIPE_BULK:
542 if (ed->ed_prev == NULL) {
543 if (!ed->hwNextED) {
544 ohci->hc_control &= ~OHCI_CTRL_BLE;
545 writel (ohci->hc_control, &ohci->regs->control);
546 }
547 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
548 } else {
549 ed->ed_prev->hwNextED = ed->hwNextED;
550 }
551 if (ohci->ed_bulktail == ed) {
552 ohci->ed_bulktail = ed->ed_prev;
553 } else {
554 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
555 }
556 break;
557 }
558 ed->state = ED_UNLINK;
559 return 0;
560 }
561
562
563 /*-------------------------------------------------------------------------*/
564
565 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
566 * but the USB stack is a little bit stateless so we do it at every transaction
567 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
568 * in all other cases the state is left unchanged
569 * the ed info fields are setted anyway even though most of them should not change */
570
571 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
572 {
573 td_t *td;
574 ed_t *ed_ret;
575 volatile ed_t *ed;
576
577 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
578 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
579
580 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
581 err("ep_add_ed: pending delete");
582 /* pending delete request */
583 return NULL;
584 }
585
586 if (ed->state == ED_NEW) {
587 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
588 /* dummy td; end of td list for ed */
589 td = td_alloc (usb_dev);
590 ed->hwTailP = m32_swap (td);
591 ed->hwHeadP = ed->hwTailP;
592 ed->state = ED_UNLINK;
593 ed->type = usb_pipetype (pipe);
594 ohci_dev.ed_cnt++;
595 }
596
597 ed->hwINFO = m32_swap (usb_pipedevice (pipe)
598 | usb_pipeendpoint (pipe) << 7
599 | (usb_pipeisoc (pipe)? 0x8000: 0)
600 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
601 | usb_pipeslow (pipe) << 13
602 | usb_maxpacket (usb_dev, pipe) << 16);
603
604 return ed_ret;
605 }
606
607 /*-------------------------------------------------------------------------*
608 * TD handling functions
609 *-------------------------------------------------------------------------*/
610
611 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
612
613 static void td_fill (ohci_t *ohci, unsigned int info,
614 void *data, int len,
615 struct usb_device *dev, int index, urb_priv_t *urb_priv)
616 {
617 volatile td_t *td, *td_pt;
618 #ifdef OHCI_FILL_TRACE
619 int i;
620 #endif
621
622 if (index > urb_priv->length) {
623 err("index > length");
624 return;
625 }
626 /* use this td as the next dummy */
627 td_pt = urb_priv->td [index];
628 td_pt->hwNextTD = 0;
629
630 /* fill the old dummy TD */
631 td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
632
633 td->ed = urb_priv->ed;
634 td->next_dl_td = NULL;
635 td->index = index;
636 td->data = (__u32)data;
637 #ifdef OHCI_FILL_TRACE
638 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
639 for (i = 0; i < len; i++)
640 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
641 printf("\n");
642 }
643 #endif
644 if (!len)
645 data = 0;
646
647 td->hwINFO = m32_swap (info);
648 td->hwCBP = m32_swap (data);
649 if (data)
650 td->hwBE = m32_swap (data + len - 1);
651 else
652 td->hwBE = 0;
653 td->hwNextTD = m32_swap (td_pt);
654 td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
655
656 /* append to queue */
657 td->ed->hwTailP = td->hwNextTD;
658 }
659
660 /*-------------------------------------------------------------------------*/
661
662 /* prepare all TDs of a transfer */
663
664 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
665 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
666 {
667 ohci_t *ohci = &gohci;
668 int data_len = transfer_len;
669 void *data;
670 int cnt = 0;
671 __u32 info = 0;
672 unsigned int toggle = 0;
673
674 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
675 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
676 toggle = TD_T_TOGGLE;
677 } else {
678 toggle = TD_T_DATA0;
679 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
680 }
681 urb->td_cnt = 0;
682 if (data_len)
683 data = buffer;
684 else
685 data = 0;
686
687 switch (usb_pipetype (pipe)) {
688 case PIPE_BULK:
689 info = usb_pipeout (pipe)?
690 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
691 while(data_len > 4096) {
692 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
693 data += 4096; data_len -= 4096; cnt++;
694 }
695 info = usb_pipeout (pipe)?
696 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
697 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
698 cnt++;
699
700 if (!ohci->sleeping)
701 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
702 break;
703
704 case PIPE_CONTROL:
705 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
706 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
707 if (data_len > 0) {
708 info = usb_pipeout (pipe)?
709 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
710 /* NOTE: mishandles transfers >8K, some >4K */
711 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
712 }
713 info = usb_pipeout (pipe)?
714 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
715 td_fill (ohci, info, data, 0, dev, cnt++, urb);
716 if (!ohci->sleeping)
717 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
718 break;
719 }
720 if (urb->length != cnt)
721 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
722 }
723
724 /*-------------------------------------------------------------------------*
725 * Done List handling functions
726 *-------------------------------------------------------------------------*/
727
728
729 /* calculate the transfer length and update the urb */
730
731 static void dl_transfer_length(td_t * td)
732 {
733 __u32 tdINFO, tdBE, tdCBP;
734 urb_priv_t *lurb_priv = &urb_priv;
735
736 tdINFO = m32_swap (td->hwINFO);
737 tdBE = m32_swap (td->hwBE);
738 tdCBP = m32_swap (td->hwCBP);
739
740
741 if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
742 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
743 if (tdBE != 0) {
744 if (td->hwCBP == 0)
745 lurb_priv->actual_length += tdBE - td->data + 1;
746 else
747 lurb_priv->actual_length += tdCBP - td->data;
748 }
749 }
750 }
751
752 /*-------------------------------------------------------------------------*/
753
754 /* replies to the request have to be on a FIFO basis so
755 * we reverse the reversed done-list */
756
757 static td_t * dl_reverse_done_list (ohci_t *ohci)
758 {
759 __u32 td_list_hc;
760 td_t *td_rev = NULL;
761 td_t *td_list = NULL;
762 urb_priv_t *lurb_priv = NULL;
763
764 td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
765 ohci->hcca->done_head = 0;
766
767 while (td_list_hc) {
768 td_list = (td_t *)td_list_hc;
769
770 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
771 lurb_priv = &urb_priv;
772 dbg(" USB-error/status: %x : %p",
773 TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
774 if (td_list->ed->hwHeadP & m32_swap (0x1)) {
775 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
776 td_list->ed->hwHeadP =
777 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
778 (td_list->ed->hwHeadP & m32_swap (0x2));
779 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
780 } else
781 td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
782 }
783 }
784
785 td_list->next_dl_td = td_rev;
786 td_rev = td_list;
787 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
788 }
789 return td_list;
790 }
791
792 /*-------------------------------------------------------------------------*/
793
794 /* td done list */
795 static int dl_done_list (ohci_t *ohci, td_t *td_list)
796 {
797 td_t *td_list_next = NULL;
798 ed_t *ed;
799 int cc = 0;
800 int stat = 0;
801 /* urb_t *urb; */
802 urb_priv_t *lurb_priv;
803 __u32 tdINFO, edHeadP, edTailP;
804
805 while (td_list) {
806 td_list_next = td_list->next_dl_td;
807
808 lurb_priv = &urb_priv;
809 tdINFO = m32_swap (td_list->hwINFO);
810
811 ed = td_list->ed;
812
813 dl_transfer_length(td_list);
814
815 /* error code of transfer */
816 cc = TD_CC_GET (tdINFO);
817 if (cc != 0) {
818 dbg("ConditionCode %#x", cc);
819 stat = cc_to_error[cc];
820 }
821
822 if (ed->state != ED_NEW) {
823 edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
824 edTailP = m32_swap (ed->hwTailP);
825
826 /* unlink eds if they are not busy */
827 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
828 ep_unlink (ohci, ed);
829 }
830
831 td_list = td_list_next;
832 }
833 return stat;
834 }
835
836 /*-------------------------------------------------------------------------*
837 * Virtual Root Hub
838 *-------------------------------------------------------------------------*/
839
840 /* Device descriptor */
841 static __u8 root_hub_dev_des[] =
842 {
843 0x12, /* __u8 bLength; */
844 0x01, /* __u8 bDescriptorType; Device */
845 0x10, /* __u16 bcdUSB; v1.1 */
846 0x01,
847 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
848 0x00, /* __u8 bDeviceSubClass; */
849 0x00, /* __u8 bDeviceProtocol; */
850 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
851 0x00, /* __u16 idVendor; */
852 0x00,
853 0x00, /* __u16 idProduct; */
854 0x00,
855 0x00, /* __u16 bcdDevice; */
856 0x00,
857 0x00, /* __u8 iManufacturer; */
858 0x01, /* __u8 iProduct; */
859 0x00, /* __u8 iSerialNumber; */
860 0x01 /* __u8 bNumConfigurations; */
861 };
862
863
864 /* Configuration descriptor */
865 static __u8 root_hub_config_des[] =
866 {
867 0x09, /* __u8 bLength; */
868 0x02, /* __u8 bDescriptorType; Configuration */
869 0x19, /* __u16 wTotalLength; */
870 0x00,
871 0x01, /* __u8 bNumInterfaces; */
872 0x01, /* __u8 bConfigurationValue; */
873 0x00, /* __u8 iConfiguration; */
874 0x40, /* __u8 bmAttributes;
875 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
876 0x00, /* __u8 MaxPower; */
877
878 /* interface */
879 0x09, /* __u8 if_bLength; */
880 0x04, /* __u8 if_bDescriptorType; Interface */
881 0x00, /* __u8 if_bInterfaceNumber; */
882 0x00, /* __u8 if_bAlternateSetting; */
883 0x01, /* __u8 if_bNumEndpoints; */
884 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
885 0x00, /* __u8 if_bInterfaceSubClass; */
886 0x00, /* __u8 if_bInterfaceProtocol; */
887 0x00, /* __u8 if_iInterface; */
888
889 /* endpoint */
890 0x07, /* __u8 ep_bLength; */
891 0x05, /* __u8 ep_bDescriptorType; Endpoint */
892 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
893 0x03, /* __u8 ep_bmAttributes; Interrupt */
894 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
895 0x00,
896 0xff /* __u8 ep_bInterval; 255 ms */
897 };
898
899 static unsigned char root_hub_str_index0[] =
900 {
901 0x04, /* __u8 bLength; */
902 0x03, /* __u8 bDescriptorType; String-descriptor */
903 0x09, /* __u8 lang ID */
904 0x04, /* __u8 lang ID */
905 };
906
907 static unsigned char root_hub_str_index1[] =
908 {
909 28, /* __u8 bLength; */
910 0x03, /* __u8 bDescriptorType; String-descriptor */
911 'O', /* __u8 Unicode */
912 0, /* __u8 Unicode */
913 'H', /* __u8 Unicode */
914 0, /* __u8 Unicode */
915 'C', /* __u8 Unicode */
916 0, /* __u8 Unicode */
917 'I', /* __u8 Unicode */
918 0, /* __u8 Unicode */
919 ' ', /* __u8 Unicode */
920 0, /* __u8 Unicode */
921 'R', /* __u8 Unicode */
922 0, /* __u8 Unicode */
923 'o', /* __u8 Unicode */
924 0, /* __u8 Unicode */
925 'o', /* __u8 Unicode */
926 0, /* __u8 Unicode */
927 't', /* __u8 Unicode */
928 0, /* __u8 Unicode */
929 ' ', /* __u8 Unicode */
930 0, /* __u8 Unicode */
931 'H', /* __u8 Unicode */
932 0, /* __u8 Unicode */
933 'u', /* __u8 Unicode */
934 0, /* __u8 Unicode */
935 'b', /* __u8 Unicode */
936 0, /* __u8 Unicode */
937 };
938
939 /* Hub class-specific descriptor is constructed dynamically */
940
941
942 /*-------------------------------------------------------------------------*/
943
944 #define OK(x) len = (x); break
945 #ifdef DEBUG
946 #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
947 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
948 #else
949 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
950 #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
951 #endif
952 #define RD_RH_STAT roothub_status(&gohci)
953 #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
954
955 /* request to virtual root hub */
956
957 int rh_check_port_status(ohci_t *controller)
958 {
959 __u32 temp, ndp, i;
960 int res;
961
962 res = -1;
963 temp = roothub_a (controller);
964 ndp = (temp & RH_A_NDP);
965 for (i = 0; i < ndp; i++) {
966 temp = roothub_portstatus (controller, i);
967 /* check for a device disconnect */
968 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
969 (RH_PS_PESC | RH_PS_CSC)) &&
970 ((temp & RH_PS_CCS) == 0)) {
971 res = i;
972 break;
973 }
974 }
975 return res;
976 }
977
978 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
979 void *buffer, int transfer_len, struct devrequest *cmd)
980 {
981 void * data = buffer;
982 int leni = transfer_len;
983 int len = 0;
984 int stat = 0;
985 __u32 datab[4];
986 __u8 *data_buf = (__u8 *)datab;
987 __u16 bmRType_bReq;
988 __u16 wValue;
989 __u16 wIndex;
990 __u16 wLength;
991
992 #ifdef DEBUG
993 urb_priv.actual_length = 0;
994 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
995 #else
996 wait_ms(1);
997 #endif
998 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
999 info("Root-Hub submit IRQ: NOT implemented");
1000 return 0;
1001 }
1002
1003 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1004 wValue = m16_swap (cmd->value);
1005 wIndex = m16_swap (cmd->index);
1006 wLength = m16_swap (cmd->length);
1007
1008 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1009 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1010
1011 switch (bmRType_bReq) {
1012 /* Request Destination:
1013 without flags: Device,
1014 RH_INTERFACE: interface,
1015 RH_ENDPOINT: endpoint,
1016 RH_CLASS means HUB here,
1017 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1018 */
1019
1020 case RH_GET_STATUS:
1021 *(__u16 *) data_buf = m16_swap (1); OK (2);
1022 case RH_GET_STATUS | RH_INTERFACE:
1023 *(__u16 *) data_buf = m16_swap (0); OK (2);
1024 case RH_GET_STATUS | RH_ENDPOINT:
1025 *(__u16 *) data_buf = m16_swap (0); OK (2);
1026 case RH_GET_STATUS | RH_CLASS:
1027 *(__u32 *) data_buf = m32_swap (
1028 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1029 OK (4);
1030 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1031 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1032
1033 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1034 switch (wValue) {
1035 case (RH_ENDPOINT_STALL): OK (0);
1036 }
1037 break;
1038
1039 case RH_CLEAR_FEATURE | RH_CLASS:
1040 switch (wValue) {
1041 case RH_C_HUB_LOCAL_POWER:
1042 OK(0);
1043 case (RH_C_HUB_OVER_CURRENT):
1044 WR_RH_STAT(RH_HS_OCIC); OK (0);
1045 }
1046 break;
1047
1048 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1049 switch (wValue) {
1050 case (RH_PORT_ENABLE):
1051 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1052 case (RH_PORT_SUSPEND):
1053 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1054 case (RH_PORT_POWER):
1055 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1056 case (RH_C_PORT_CONNECTION):
1057 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1058 case (RH_C_PORT_ENABLE):
1059 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1060 case (RH_C_PORT_SUSPEND):
1061 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1062 case (RH_C_PORT_OVER_CURRENT):
1063 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1064 case (RH_C_PORT_RESET):
1065 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1066 }
1067 break;
1068
1069 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1070 switch (wValue) {
1071 case (RH_PORT_SUSPEND):
1072 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1073 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1074 if (RD_RH_PORTSTAT & RH_PS_CCS)
1075 WR_RH_PORTSTAT (RH_PS_PRS);
1076 OK (0);
1077 case (RH_PORT_POWER):
1078 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1079 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1080 if (RD_RH_PORTSTAT & RH_PS_CCS)
1081 WR_RH_PORTSTAT (RH_PS_PES );
1082 OK (0);
1083 }
1084 break;
1085
1086 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1087
1088 case RH_GET_DESCRIPTOR:
1089 switch ((wValue & 0xff00) >> 8) {
1090 case (0x01): /* device descriptor */
1091 len = min_t(unsigned int,
1092 leni,
1093 min_t(unsigned int,
1094 sizeof (root_hub_dev_des),
1095 wLength));
1096 data_buf = root_hub_dev_des; OK(len);
1097 case (0x02): /* configuration descriptor */
1098 len = min_t(unsigned int,
1099 leni,
1100 min_t(unsigned int,
1101 sizeof (root_hub_config_des),
1102 wLength));
1103 data_buf = root_hub_config_des; OK(len);
1104 case (0x03): /* string descriptors */
1105 if(wValue==0x0300) {
1106 len = min_t(unsigned int,
1107 leni,
1108 min_t(unsigned int,
1109 sizeof (root_hub_str_index0),
1110 wLength));
1111 data_buf = root_hub_str_index0;
1112 OK(len);
1113 }
1114 if(wValue==0x0301) {
1115 len = min_t(unsigned int,
1116 leni,
1117 min_t(unsigned int,
1118 sizeof (root_hub_str_index1),
1119 wLength));
1120 data_buf = root_hub_str_index1;
1121 OK(len);
1122 }
1123 default:
1124 stat = USB_ST_STALLED;
1125 }
1126 break;
1127
1128 case RH_GET_DESCRIPTOR | RH_CLASS:
1129 {
1130 __u32 temp = roothub_a (&gohci);
1131
1132 data_buf [0] = 9; /* min length; */
1133 data_buf [1] = 0x29;
1134 data_buf [2] = temp & RH_A_NDP;
1135 data_buf [3] = 0;
1136 if (temp & RH_A_PSM) /* per-port power switching? */
1137 data_buf [3] |= 0x1;
1138 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1139 data_buf [3] |= 0x10;
1140 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1141 data_buf [3] |= 0x8;
1142
1143 /* corresponds to data_buf[4-7] */
1144 datab [1] = 0;
1145 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1146 temp = roothub_b (&gohci);
1147 data_buf [7] = temp & RH_B_DR;
1148 if (data_buf [2] < 7) {
1149 data_buf [8] = 0xff;
1150 } else {
1151 data_buf [0] += 2;
1152 data_buf [8] = (temp & RH_B_DR) >> 8;
1153 data_buf [10] = data_buf [9] = 0xff;
1154 }
1155
1156 len = min_t(unsigned int, leni,
1157 min_t(unsigned int, data_buf [0], wLength));
1158 OK (len);
1159 }
1160
1161 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1162
1163 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1164
1165 default:
1166 dbg ("unsupported root hub command");
1167 stat = USB_ST_STALLED;
1168 }
1169
1170 #ifdef DEBUG
1171 ohci_dump_roothub (&gohci, 1);
1172 #else
1173 wait_ms(1);
1174 #endif
1175
1176 len = min_t(int, len, leni);
1177 if (data != data_buf)
1178 memcpy (data, data_buf, len);
1179 dev->act_len = len;
1180 dev->status = stat;
1181
1182 #ifdef DEBUG
1183 if (transfer_len)
1184 urb_priv.actual_length = transfer_len;
1185 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1186 #else
1187 wait_ms(1);
1188 #endif
1189
1190 return stat;
1191 }
1192
1193 /*-------------------------------------------------------------------------*/
1194
1195 /* common code for handling submit messages - used for all but root hub */
1196 /* accesses. */
1197 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1198 int transfer_len, struct devrequest *setup, int interval)
1199 {
1200 int stat = 0;
1201 int maxsize = usb_maxpacket(dev, pipe);
1202 int timeout;
1203
1204 /* device pulled? Shortcut the action. */
1205 if (devgone == dev) {
1206 dev->status = USB_ST_CRC_ERR;
1207 return 0;
1208 }
1209
1210 #ifdef DEBUG
1211 urb_priv.actual_length = 0;
1212 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1213 #else
1214 wait_ms(1);
1215 #endif
1216 if (!maxsize) {
1217 err("submit_common_message: pipesize for pipe %lx is zero",
1218 pipe);
1219 return -1;
1220 }
1221
1222 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1223 err("sohci_submit_job failed");
1224 return -1;
1225 }
1226
1227 wait_ms(10);
1228 /* ohci_dump_status(&gohci); */
1229
1230 /* allow more time for a BULK device to react - some are slow */
1231 #define BULK_TO 5000 /* timeout in milliseconds */
1232 if (usb_pipetype (pipe) == PIPE_BULK)
1233 timeout = BULK_TO;
1234 else
1235 timeout = 100;
1236
1237 /* wait for it to complete */
1238 for (;;) {
1239 /* check whether the controller is done */
1240 stat = hc_interrupt();
1241 if (stat < 0) {
1242 stat = USB_ST_CRC_ERR;
1243 break;
1244 }
1245 if (stat >= 0 && stat != 0xff) {
1246 /* 0xff is returned for an SF-interrupt */
1247 break;
1248 }
1249 if (--timeout) {
1250 wait_ms(1);
1251 } else {
1252 err("CTL:TIMEOUT ");
1253 stat = USB_ST_CRC_ERR;
1254 break;
1255 }
1256 }
1257 /* we got an Root Hub Status Change interrupt */
1258 if (got_rhsc) {
1259 #ifdef DEBUG
1260 ohci_dump_roothub (&gohci, 1);
1261 #endif
1262 got_rhsc = 0;
1263 /* abuse timeout */
1264 timeout = rh_check_port_status(&gohci);
1265 if (timeout >= 0) {
1266 #if 0 /* this does nothing useful, but leave it here in case that changes */
1267 /* the called routine adds 1 to the passed value */
1268 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1269 #endif
1270 /*
1271 * XXX
1272 * This is potentially dangerous because it assumes
1273 * that only one device is ever plugged in!
1274 */
1275 devgone = dev;
1276 }
1277 }
1278
1279 dev->status = stat;
1280 dev->act_len = transfer_len;
1281
1282 #ifdef DEBUG
1283 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1284 #else
1285 wait_ms(1);
1286 #endif
1287
1288 /* free TDs in urb_priv */
1289 urb_free_priv (&urb_priv);
1290 return 0;
1291 }
1292
1293 /* submit routines called from usb.c */
1294 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1295 int transfer_len)
1296 {
1297 info("submit_bulk_msg");
1298 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1299 }
1300
1301 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1302 int transfer_len, struct devrequest *setup)
1303 {
1304 int maxsize = usb_maxpacket(dev, pipe);
1305
1306 info("submit_control_msg");
1307 #ifdef DEBUG
1308 urb_priv.actual_length = 0;
1309 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1310 #else
1311 wait_ms(1);
1312 #endif
1313 if (!maxsize) {
1314 err("submit_control_message: pipesize for pipe %lx is zero",
1315 pipe);
1316 return -1;
1317 }
1318 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1319 gohci.rh.dev = dev;
1320 /* root hub - redirect */
1321 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1322 setup);
1323 }
1324
1325 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1326 }
1327
1328 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1329 int transfer_len, int interval)
1330 {
1331 info("submit_int_msg");
1332 return -1;
1333 }
1334
1335 /*-------------------------------------------------------------------------*
1336 * HC functions
1337 *-------------------------------------------------------------------------*/
1338
1339 /* reset the HC and BUS */
1340
1341 static int hc_reset (ohci_t *ohci)
1342 {
1343 int timeout = 30;
1344 int smm_timeout = 50; /* 0,5 sec */
1345
1346 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1347 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1348 info("USB HC TakeOver from SMM");
1349 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1350 wait_ms (10);
1351 if (--smm_timeout == 0) {
1352 err("USB HC TakeOver failed!");
1353 return -1;
1354 }
1355 }
1356 }
1357
1358 /* Disable HC interrupts */
1359 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1360
1361 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1362 ohci->slot_name,
1363 readl (&ohci->regs->control));
1364
1365 /* Reset USB (needed by some controllers) */
1366 writel (0, &ohci->regs->control);
1367
1368 /* HC Reset requires max 10 us delay */
1369 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1370 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1371 if (--timeout == 0) {
1372 err("USB HC reset timed out!");
1373 return -1;
1374 }
1375 udelay (1);
1376 }
1377 return 0;
1378 }
1379
1380 /*-------------------------------------------------------------------------*/
1381
1382 /* Start an OHCI controller, set the BUS operational
1383 * enable interrupts
1384 * connect the virtual root hub */
1385
1386 static int hc_start (ohci_t * ohci)
1387 {
1388 __u32 mask;
1389 unsigned int fminterval;
1390
1391 ohci->disabled = 1;
1392
1393 /* Tell the controller where the control and bulk lists are
1394 * The lists are empty now. */
1395
1396 writel (0, &ohci->regs->ed_controlhead);
1397 writel (0, &ohci->regs->ed_bulkhead);
1398
1399 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1400
1401 fminterval = 0x2edf;
1402 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1403 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1404 writel (fminterval, &ohci->regs->fminterval);
1405 writel (0x628, &ohci->regs->lsthresh);
1406
1407 /* start controller operations */
1408 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1409 ohci->disabled = 0;
1410 writel (ohci->hc_control, &ohci->regs->control);
1411
1412 /* disable all interrupts */
1413 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1414 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1415 OHCI_INTR_OC | OHCI_INTR_MIE);
1416 writel (mask, &ohci->regs->intrdisable);
1417 /* clear all interrupts */
1418 mask &= ~OHCI_INTR_MIE;
1419 writel (mask, &ohci->regs->intrstatus);
1420 /* Choose the interrupts we care about now - but w/o MIE */
1421 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1422 writel (mask, &ohci->regs->intrenable);
1423
1424 #ifdef OHCI_USE_NPS
1425 /* required for AMD-756 and some Mac platforms */
1426 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1427 &ohci->regs->roothub.a);
1428 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1429 #endif /* OHCI_USE_NPS */
1430
1431 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1432 /* POTPGT delay is bits 24-31, in 2 ms units. */
1433 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1434
1435 /* connect the virtual root hub */
1436 ohci->rh.devnum = 0;
1437
1438 return 0;
1439 }
1440
1441 /*-------------------------------------------------------------------------*/
1442
1443 /* an interrupt happens */
1444
1445 static int
1446 hc_interrupt (void)
1447 {
1448 ohci_t *ohci = &gohci;
1449 struct ohci_regs *regs = ohci->regs;
1450 int ints;
1451 int stat = -1;
1452
1453 if ((ohci->hcca->done_head != 0) && !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1454 ints = OHCI_INTR_WDH;
1455 } else {
1456 ints = readl (&regs->intrstatus);
1457 }
1458
1459 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1460
1461 if (ints & OHCI_INTR_RHSC) {
1462 got_rhsc = 1;
1463 }
1464
1465 if (ints & OHCI_INTR_UE) {
1466 ohci->disabled++;
1467 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1468 ohci->slot_name);
1469 /* e.g. due to PCI Master/Target Abort */
1470
1471 #ifdef DEBUG
1472 ohci_dump (ohci, 1);
1473 #else
1474 wait_ms(1);
1475 #endif
1476 /* FIXME: be optimistic, hope that bug won't repeat often. */
1477 /* Make some non-interrupt context restart the controller. */
1478 /* Count and limit the retries though; either hardware or */
1479 /* software errors can go forever... */
1480 hc_reset (ohci);
1481 return -1;
1482 }
1483
1484 if (ints & OHCI_INTR_WDH) {
1485 wait_ms(1);
1486 writel (OHCI_INTR_WDH, &regs->intrdisable);
1487 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1488 writel (OHCI_INTR_WDH, &regs->intrenable);
1489 }
1490
1491 if (ints & OHCI_INTR_SO) {
1492 dbg("USB Schedule overrun\n");
1493 writel (OHCI_INTR_SO, &regs->intrenable);
1494 stat = -1;
1495 }
1496
1497 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1498 if (ints & OHCI_INTR_SF) {
1499 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1500 wait_ms(1);
1501 writel (OHCI_INTR_SF, &regs->intrdisable);
1502 if (ohci->ed_rm_list[frame] != NULL)
1503 writel (OHCI_INTR_SF, &regs->intrenable);
1504 stat = 0xff;
1505 }
1506
1507 writel (ints, &regs->intrstatus);
1508 return stat;
1509 }
1510
1511 /*-------------------------------------------------------------------------*/
1512
1513 /*-------------------------------------------------------------------------*/
1514
1515 /* De-allocate all resources.. */
1516
1517 static void hc_release_ohci (ohci_t *ohci)
1518 {
1519 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1520
1521 if (!ohci->disabled)
1522 hc_reset (ohci);
1523 }
1524
1525 /*-------------------------------------------------------------------------*/
1526
1527 /*
1528 * low level initalisation routine, called from usb.c
1529 */
1530 static char ohci_inited = 0;
1531
1532 int usb_lowlevel_init(void)
1533 {
1534 S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
1535 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1536
1537 /*
1538 * Set the 48 MHz UPLL clocking. Values are taken from
1539 * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
1540 */
1541 clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2);
1542 gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
1543
1544 /*
1545 * Enable USB host clock.
1546 */
1547 clk_power->CLKCON |= (1 << 4);
1548
1549 memset (&gohci, 0, sizeof (ohci_t));
1550 memset (&urb_priv, 0, sizeof (urb_priv_t));
1551
1552 /* align the storage */
1553 if ((__u32)&ghcca[0] & 0xff) {
1554 err("HCCA not aligned!!");
1555 return -1;
1556 }
1557 phcca = &ghcca[0];
1558 info("aligned ghcca %p", phcca);
1559 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1560 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1561 err("EDs not aligned!!");
1562 return -1;
1563 }
1564 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1565 if ((__u32)gtd & 0x7) {
1566 err("TDs not aligned!!");
1567 return -1;
1568 }
1569 ptd = gtd;
1570 gohci.hcca = phcca;
1571 memset (phcca, 0, sizeof (struct ohci_hcca));
1572
1573 gohci.disabled = 1;
1574 gohci.sleeping = 0;
1575 gohci.irq = -1;
1576 gohci.regs = (struct ohci_regs *)S3C24X0_USB_HOST_BASE;
1577
1578 gohci.flags = 0;
1579 gohci.slot_name = "s3c2400";
1580
1581 if (hc_reset (&gohci) < 0) {
1582 hc_release_ohci (&gohci);
1583 /* Initialization failed */
1584 clk_power->CLKCON &= ~(1 << 4);
1585 return -1;
1586 }
1587
1588 /* FIXME this is a second HC reset; why?? */
1589 writel (gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1590 wait_ms (10);
1591
1592 if (hc_start (&gohci) < 0) {
1593 err ("can't start usb-%s", gohci.slot_name);
1594 hc_release_ohci (&gohci);
1595 /* Initialization failed */
1596 clk_power->CLKCON &= ~(1 << 4);
1597 return -1;
1598 }
1599
1600 #ifdef DEBUG
1601 ohci_dump (&gohci, 1);
1602 #else
1603 wait_ms(1);
1604 #endif
1605 ohci_inited = 1;
1606 return 0;
1607 }
1608
1609 int usb_lowlevel_stop(void)
1610 {
1611 S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
1612
1613 /* this gets called really early - before the controller has */
1614 /* even been initialized! */
1615 if (!ohci_inited)
1616 return 0;
1617 /* TODO release any interrupts, etc. */
1618 /* call hc_release_ohci() here ? */
1619 hc_reset (&gohci);
1620 /* may not want to do this */
1621 clk_power->CLKCON &= ~(1 << 4);
1622 return 0;
1623 }
1624
1625 #endif /* CONFIG_USB_OHCI */
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