]> git.ipfire.org Git - people/ms/u-boot.git/blob - cpu/arm926ejs/interrupts.c
* Patches by Reinhard Meyer, 14 Feb 2004:
[people/ms/u-boot.git] / cpu / arm926ejs / interrupts.c
1 /*
2 * (C) Copyright 2003
3 * Texas Instruments <www.ti.com>
4 *
5 * (C) Copyright 2002
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
9 * (C) Copyright 2002
10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11 * Alex Zuepke <azu@sysgo.de>
12 *
13 * (C) Copyright 2002
14 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
15 *
16 * See file CREDITS for list of people who contributed to this
17 * project.
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License as
21 * published by the Free Software Foundation; either version 2 of
22 * the License, or (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * MA 02111-1307 USA
33 */
34
35 #include <common.h>
36 #include <arm925t.h>
37
38 #include <asm/proc-armv/ptrace.h>
39
40 extern void reset_cpu(ulong addr);
41 #define TIMER_LOAD_VAL 0xffffffff
42
43 /* macro to read the 32 bit timer */
44 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+8))
45
46 #ifdef CONFIG_USE_IRQ
47 /* enable IRQ interrupts */
48 void enable_interrupts (void)
49 {
50 unsigned long temp;
51 __asm__ __volatile__("mrs %0, cpsr\n"
52 "bic %0, %0, #0x80\n"
53 "msr cpsr_c, %0"
54 : "=r" (temp)
55 :
56 : "memory");
57 }
58
59
60 /*
61 * disable IRQ/FIQ interrupts
62 * returns true if interrupts had been enabled before we disabled them
63 */
64 int disable_interrupts (void)
65 {
66 unsigned long old,temp;
67 __asm__ __volatile__("mrs %0, cpsr\n"
68 "orr %1, %0, #0xc0\n"
69 "msr cpsr_c, %1"
70 : "=r" (old), "=r" (temp)
71 :
72 : "memory");
73 return (old & 0x80) == 0;
74 }
75 #else
76 void enable_interrupts (void)
77 {
78 return;
79 }
80 int disable_interrupts (void)
81 {
82 return 0;
83 }
84 #endif
85
86
87 void bad_mode (void)
88 {
89 panic ("Resetting CPU ...\n");
90 reset_cpu (0);
91 }
92
93 void show_regs (struct pt_regs *regs)
94 {
95 unsigned long flags;
96 const char *processor_modes[] = {
97 "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
98 "UK4_26", "UK5_26", "UK6_26", "UK7_26",
99 "UK8_26", "UK9_26", "UK10_26", "UK11_26",
100 "UK12_26", "UK13_26", "UK14_26", "UK15_26",
101 "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
102 "UK4_32", "UK5_32", "UK6_32", "ABT_32",
103 "UK8_32", "UK9_32", "UK10_32", "UND_32",
104 "UK12_32", "UK13_32", "UK14_32", "SYS_32",
105 };
106
107 flags = condition_codes (regs);
108
109 printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
110 "sp : %08lx ip : %08lx fp : %08lx\n",
111 instruction_pointer (regs),
112 regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
113 printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
114 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
115 printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
116 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
117 printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
118 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
119 printf ("Flags: %c%c%c%c",
120 flags & CC_N_BIT ? 'N' : 'n',
121 flags & CC_Z_BIT ? 'Z' : 'z',
122 flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
123 printf (" IRQs %s FIQs %s Mode %s%s\n",
124 interrupts_enabled (regs) ? "on" : "off",
125 fast_interrupts_enabled (regs) ? "on" : "off",
126 processor_modes[processor_mode (regs)],
127 thumb_mode (regs) ? " (T)" : "");
128 }
129
130 void do_undefined_instruction (struct pt_regs *pt_regs)
131 {
132 printf ("undefined instruction\n");
133 show_regs (pt_regs);
134 bad_mode ();
135 }
136
137 void do_software_interrupt (struct pt_regs *pt_regs)
138 {
139 printf ("software interrupt\n");
140 show_regs (pt_regs);
141 bad_mode ();
142 }
143
144 void do_prefetch_abort (struct pt_regs *pt_regs)
145 {
146 printf ("prefetch abort\n");
147 show_regs (pt_regs);
148 bad_mode ();
149 }
150
151 void do_data_abort (struct pt_regs *pt_regs)
152 {
153 printf ("data abort\n");
154 show_regs (pt_regs);
155 bad_mode ();
156 }
157
158 void do_not_used (struct pt_regs *pt_regs)
159 {
160 printf ("not used\n");
161 show_regs (pt_regs);
162 bad_mode ();
163 }
164
165 void do_fiq (struct pt_regs *pt_regs)
166 {
167 printf ("fast interrupt request\n");
168 show_regs (pt_regs);
169 bad_mode ();
170 }
171
172 void do_irq (struct pt_regs *pt_regs)
173 {
174 printf ("interrupt request\n");
175 show_regs (pt_regs);
176 bad_mode ();
177 }
178
179 static ulong timestamp;
180 static ulong lastdec;
181
182 /* nothing really to do with interrupts, just starts up a counter. */
183 int interrupt_init (void)
184 {
185 int32_t val;
186
187 /* Start the decrementer ticking down from 0xffffffff */
188 *((int32_t *) (CFG_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
189 val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
190 *((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
191
192 /* init the timestamp and lastdec value */
193 reset_timer_masked();
194
195 return (0);
196 }
197
198 /*
199 * timer without interrupts
200 */
201
202 void reset_timer (void)
203 {
204 reset_timer_masked ();
205 }
206
207 ulong get_timer (ulong base)
208 {
209 return get_timer_masked () - base;
210 }
211
212 void set_timer (ulong t)
213 {
214 timestamp = t;
215 }
216
217 /* delay x useconds AND perserve advance timstamp value */
218 void udelay (unsigned long usec)
219 {
220 ulong tmo, tmp;
221
222 if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
223 tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
224 tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
225 tmo /= 1000; /* finish normalize. */
226 }else{ /* else small number, don't kill it prior to HZ multiply */
227 tmo = usec * CFG_HZ;
228 tmo /= (1000*1000);
229 }
230
231 tmp = get_timer (0); /* get current timestamp */
232 if( (tmo + tmp) < tmp ) /* if setting this fordward will roll time stamp */
233 reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
234 else
235 tmo += tmp; /* else, set advancing stamp wake up time */
236
237 while (get_timer_masked () < tmo)/* loop till event */
238 /*NOP*/;
239 }
240
241 void reset_timer_masked (void)
242 {
243 /* reset time */
244 lastdec = READ_TIMER; /* capure current decrementer value time */
245 timestamp = 0; /* start "advancing" time stamp from 0 */
246 }
247
248 ulong get_timer_masked (void)
249 {
250 ulong now = READ_TIMER; /* current tick value */
251
252 if (lastdec >= now) { /* normal mode (non roll) */
253 /* normal mode */
254 timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
255 } else { /* we have overflow of the count down timer */
256 /* nts = ts + ld + (TLV - now)
257 * ts=old stamp, ld=time that passed before passing through -1
258 * (TLV-now) amount of time after passing though -1
259 * nts = new "advancing time stamp"...it could also roll and cause problems.
260 */
261 timestamp += lastdec + TIMER_LOAD_VAL - now;
262 }
263 lastdec = now;
264
265 return timestamp;
266 }
267
268 /* waits specified delay value and resets timestamp */
269 void udelay_masked (unsigned long usec)
270 {
271 ulong tmo, tmp;
272
273 if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
274 tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
275 tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
276 tmo /= 1000; /* finish normalize. */
277 }else{ /* else small number, don't kill it prior to HZ multiply */
278 tmo = usec * CFG_HZ;
279 tmo /= (1000*1000);
280 }
281
282 reset_timer_masked (); /* set "advancing" timestamp to 0, set lastdec vaule */
283
284 while (get_timer_masked () < tmo) /* wait for time stamp to overtake tick number.*/
285 /*NOP*/;
286 }
287
288 /*
289 * This function is derived from PowerPC code (read timebase as long long).
290 * On ARM it just returns the timer value.
291 */
292 unsigned long long get_ticks(void)
293 {
294 return get_timer(0);
295 }
296
297 /*
298 * This function is derived from PowerPC code (timebase clock frequency).
299 * On ARM it returns the number of timer ticks per second.
300 */
301 ulong get_tbclk (void)
302 {
303 ulong tbclk;
304
305 tbclk = CFG_HZ;
306 return tbclk;
307 }