cpu/mcf52x2/start.S

   1 /*
   2  * Copyright (C) 2003   Josef Baumgartner <josef.baumgartner@telex.de>
   3  * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <config.h>
  25 #include "version.h"
  26
  27 #ifndef  CONFIG_IDENT_STRING
  28 #define  CONFIG_IDENT_STRING ""
  29 #endif
  30
  31
  32 #define _START  _start
  33 #define _FAULT  _fault
  34
  35
  36 #define SAVE_ALL                                                \
  37         move.w  #0x2700,%sr;            /* disable intrs */     \
  38         subl    #60,%sp;                /* space for 15 regs */ \
  39         moveml  %d0-%d7/%a0-%a6,%sp@;                           \
  40
  41 #define RESTORE_ALL                                             \
  42         moveml  %sp@,%d0-%d7/%a0-%a6;                           \
  43         addl    #60,%sp;                /* space for 15 regs */ \
  44         rte
  45
  46 /* If we come from a pre-loader we don't need an initial exception
  47  * table.
  48  */
  49 #if !defined(CONFIG_MONITOR_IS_IN_RAM)
  50
  51 .text
  52 /*
  53  *      Vector table. This is used for initial platform startup.
  54  *      These vectors are to catch any un-intended traps.
  55  */
  56 _vectors:
  57
  58 .long   0x00000000              /* Flash offset is 0 until we setup CS0 */
  59 #if defined(CONFIG_M5282) && (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
  60 .long   _start - TEXT_BASE
  61 #else
  62 .long   _START
  63 #endif
  64
  65 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  66 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  67 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  68 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  69 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  70 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  71 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  72 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  73
  74 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  75 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  76 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  77 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  78 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  79 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  80 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  81 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  82
  83 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  84 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  85 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  86 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  87 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  88 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  89 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  90 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  91
  92 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  93 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  94 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  95 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  96 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  97 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  98 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  99 .long   _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 100
 101 #endif
 102
 103         .text
 104
 105
 106 #if defined(CONFIG_SYS_INT_FLASH_BASE) && \
 107     (defined(CONFIG_M5282) || defined(CONFIG_M5281))
 108         #if (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
 109                 .long   0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
 110                 .long   0xFFFFFFFF /* all sectors protected */
 111                 .long   0x00000000 /* supervisor/User restriction */
 112                 .long   0x00000000 /* programm/data space restriction */
 113                 .long   0x00000000 /* Flash security */
 114         #endif
 115 #endif
 116         .globl  _start
 117 _start:
 118         nop
 119         nop
 120         move.w #0x2700,%sr
 121
 122 #if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5253)
 123         move.l  #(CONFIG_SYS_MBAR + 1), %d0             /* set MBAR address + valid flag */
 124         move.c  %d0, %MBAR
 125
 126         /*** The 5249 has MBAR2 as well ***/
 127 #ifdef CONFIG_SYS_MBAR2
 128         move.l  #(CONFIG_SYS_MBAR2 + 1), %d0            /* Get MBAR2 address */
 129         movec   %d0, #0xc0e                     /* Set MBAR2 */
 130 #endif
 131
 132         move.l  #(CONFIG_SYS_INIT_RAM_ADDR + 1), %d0
 133         movec   %d0, %RAMBAR0
 134 #endif /* CONFIG_M5272 || CONFIG_M5249 || CONFIG_M5253 */
 135
 136 #if defined(CONFIG_M5282) || defined(CONFIG_M5271)
 137         /* Initialize IPSBAR */
 138         move.l  #(CONFIG_SYS_MBAR + 1), %d0             /* set IPSBAR address + valid flag */
 139         move.l  %d0, 0x40000000
 140
 141         /* Initialize RAMBAR1: locate SRAM and validate it */
 142         move.l  #(CONFIG_SYS_INIT_RAM_ADDR + 0x21), %d0
 143         movec   %d0, %RAMBAR1
 144
 145 #if defined(CONFIG_M5282)
 146 #if (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
 147         /* Setup code in SRAM to initialize FLASHBAR, if start from internal Flash */
 148
 149         move.l #(_flashbar_setup-CONFIG_SYS_INT_FLASH_BASE), %a0
 150         move.l #(_flashbar_setup_end-CONFIG_SYS_INT_FLASH_BASE), %a1
 151         move.l #(CONFIG_SYS_INIT_RAM_ADDR), %a2
 152 _copy_flash:
 153         move.l (%a0)+, (%a2)+
 154         cmp.l %a0, %a1
 155         bgt.s _copy_flash
 156         jmp CONFIG_SYS_INIT_RAM_ADDR
 157
 158 _flashbar_setup:
 159         /* Initialize FLASHBAR: locate internal Flash and validate it */
 160         move.l  #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
 161         movec   %d0, %FLASHBAR
 162         jmp _after_flashbar_copy.L      /* Force jump to absolute address */
 163 _flashbar_setup_end:
 164         nop
 165 _after_flashbar_copy:
 166 #else
 167         /* Setup code to initialize FLASHBAR, if start from external Memory */
 168         move.l  #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
 169         movec   %d0, %FLASHBAR
 170 #endif /* (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */
 171
 172 #endif
 173 #endif
 174         /* if we come from a pre-loader we have no exception table and
 175          * therefore no VBR to set
 176          */
 177 #if !defined(CONFIG_MONITOR_IS_IN_RAM)
 178 #if defined(CONFIG_M5282) && (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
 179         move.l  #CONFIG_SYS_INT_FLASH_BASE, %d0
 180 #else
 181         move.l  #CONFIG_SYS_FLASH_BASE, %d0
 182 #endif
 183         movec   %d0, %VBR
 184 #endif
 185
 186 #ifdef CONFIG_M5275
 187         /* Initialize IPSBAR */
 188         move.l  #(CONFIG_SYS_MBAR + 1), %d0             /* set IPSBAR address + valid flag */
 189         move.l  %d0, 0x40000000
 190 /*      movec   %d0, %MBAR */
 191
 192         /* Initialize RAMBAR: locate SRAM and validate it */
 193         move.l  #(CONFIG_SYS_INIT_RAM_ADDR + 0x21), %d0
 194         movec   %d0, %RAMBAR1
 195 #endif
 196
 197 #if 0
 198         /* invalidate and disable cache */
 199         move.l  #0x01000000, %d0                /* Invalidate cache cmd */
 200         movec   %d0, %CACR                      /* Invalidate cache */
 201         move.l  #0, %d0
 202         movec   %d0, %ACR0
 203         movec   %d0, %ACR1
 204 #endif
 205
 206         /* set stackpointer to end of internal ram to get some stackspace for the first c-code */
 207         move.l  #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
 208         clr.l %sp@-
 209
 210         move.l #__got_start, %a5                /* put relocation table address to a5 */
 211
 212         bsr cpu_init_f                          /* run low-level CPU init code (from flash) */
 213         bsr board_init_f                        /* run low-level board init code (from flash) */
 214
 215         /* board_init_f() does not return */
 216
 217 /*------------------------------------------------------------------------------*/
 218
 219 /*
 220  * void relocate_code (addr_sp, gd, addr_moni)
 221  *
 222  * This "function" does not return, instead it continues in RAM
 223  * after relocating the monitor code.
 224  *
 225  * r3 = dest
 226  * r4 = src
 227  * r5 = length in bytes
 228  * r6 = cachelinesize
 229  */
 230         .globl  relocate_code
 231 relocate_code:
 232         link.w %a6,#0
 233         move.l 8(%a6), %sp              /* set new stack pointer */
 234
 235         move.l 12(%a6), %d0             /* Save copy of Global Data pointer */
 236         move.l 16(%a6), %a0             /* Save copy of Destination Address */
 237
 238         move.l #CONFIG_SYS_MONITOR_BASE, %a1
 239         move.l #__init_end, %a2
 240         move.l %a0, %a3
 241         /* copy the code to RAM */
 242 1:
 243         move.l (%a1)+, (%a3)+
 244         cmp.l  %a1,%a2
 245         bgt.s    1b
 246
 247 /*
 248  * We are done. Do not return, instead branch to second part of board
 249  * initialization, now running from RAM.
 250  */
 251         move.l  %a0, %a1
 252         add.l   #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
 253         jmp     (%a1)
 254
 255 in_ram:
 256
 257 clear_bss:
 258         /*
 259          * Now clear BSS segment
 260          */
 261         move.l  %a0, %a1
 262         add.l   #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
 263         move.l  %a0, %d1
 264         add.l   #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
 265 6:
 266         clr.l   (%a1)+
 267         cmp.l   %a1,%d1
 268         bgt.s   6b
 269
 270         /*
 271          * fix got table in RAM
 272          */
 273         move.l  %a0, %a1
 274         add.l   #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
 275         move.l  %a1,%a5         /* * fix got pointer register a5 */
 276
 277         move.l  %a0, %a2
 278         add.l   #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
 279
 280 7:
 281         move.l  (%a1),%d1
 282         sub.l   #_start,%d1
 283         add.l   %a0,%d1
 284         move.l  %d1,(%a1)+
 285         cmp.l   %a2, %a1
 286         bne     7b
 287
 288 #if defined(CONFIG_M5281) || defined(CONFIG_M5282)
 289         /* patch the 3 accesspoints to 3 ichache_state */
 290         /* quick and dirty */
 291
 292         move.l  %a0,%d1
 293         add.l   #(icache_state - CONFIG_SYS_MONITOR_BASE),%d1
 294         move.l  %a0,%a1
 295         add.l   #(icache_state_access_1+2 - CONFIG_SYS_MONITOR_BASE),%a1
 296         move.l  %d1,(%a1)
 297         move.l  %a0,%a1
 298         add.l   #(icache_state_access_2+2 - CONFIG_SYS_MONITOR_BASE),%a1
 299         move.l  %d1,(%a1)
 300         move.l  %a0,%a1
 301         add.l   #(icache_state_access_3+2 - CONFIG_SYS_MONITOR_BASE),%a1
 302         move.l  %d1,(%a1)
 303 #endif
 304
 305         /* calculate relative jump to board_init_r in ram */
 306         move.l %a0, %a1
 307         add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
 308
 309         /* set parameters for board_init_r */
 310         move.l %a0,-(%sp)               /* dest_addr */
 311         move.l %d0,-(%sp)               /* gd */
 312 #if defined(DEBUG) && (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) && \
 313     defined(CONFIG_SYS_HALT_BEFOR_RAM_JUMP)
 314         halt
 315 #endif
 316         jsr     (%a1)
 317
 318 /*------------------------------------------------------------------------------*/
 319 /* exception code */
 320         .globl _fault
 321 _fault:
 322         jmp _fault
 323
 324         .globl  _exc_handler
 325 _exc_handler:
 326         SAVE_ALL
 327         movel   %sp,%sp@-
 328         bsr exc_handler
 329         addql   #4,%sp
 330         RESTORE_ALL
 331
 332         .globl  _int_handler
 333 _int_handler:
 334         SAVE_ALL
 335         movel   %sp,%sp@-
 336         bsr int_handler
 337         addql   #4,%sp
 338         RESTORE_ALL
 339
 340 /*------------------------------------------------------------------------------*/
 341 /* cache functions */
 342 #ifdef  CONFIG_M5271
 343         .globl  icache_enable
 344 icache_enable:
 345         move.l  #0x01000000, %d0                /* Invalidate cache cmd */
 346         movec   %d0, %CACR                      /* Invalidate cache */
 347         move.l  #(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0  /* Setup cache mask */
 348         movec   %d0, %ACR0                      /* Enable cache */
 349
 350         move.l  #0x80000200, %d0                /* Setup cache mask */
 351         movec   %d0, %CACR                      /* Enable cache */
 352         nop
 353
 354         move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
 355         moveq   #1, %d0
 356         move.l  %d0, (%a1)
 357         rts
 358 #endif
 359
 360 #ifdef  CONFIG_M5272
 361         .globl  icache_enable
 362 icache_enable:
 363         move.l  #0x01000000, %d0                /* Invalidate cache cmd */
 364         movec   %d0, %CACR                      /* Invalidate cache */
 365         move.l  #0x0000c000, %d0                /* Setup cache mask */
 366         movec   %d0, %ACR0                      /* Enable cache */
 367         move.l  #0xff00c000, %d0                /* Setup cache mask */
 368         movec   %d0, %ACR1                      /* Enable cache */
 369         move.l  #0x80000100, %d0                /* Setup cache mask */
 370         movec   %d0, %CACR                      /* Enable cache */
 371         moveq   #1, %d0
 372         move.l  %d0, icache_state
 373         rts
 374 #endif
 375
 376 #if  defined(CONFIG_M5275)
 377 /*
 378  * Instruction cache only
 379  */
 380         .globl  icache_enable
 381 icache_enable:
 382         move.l  #0x01400000, %d0                /* Invalidate cache cmd */
 383         movec   %d0, %CACR                      /* Invalidate cache */
 384         move.l  #0x0000c000, %d0                /* Setup SDRAM caching */
 385         movec   %d0, %ACR0                      /* Enable cache */
 386         move.l  #0x00000000, %d0                /* No other caching */
 387         movec   %d0, %ACR1                      /* Enable cache */
 388         move.l  #0x80400100, %d0                /* Setup cache mask */
 389         movec   %d0, %CACR                      /* Enable cache */
 390         moveq   #1, %d0
 391         move.l  %d0, icache_state
 392         rts
 393 #endif
 394
 395 #ifdef CONFIG_M5282
 396         .globl  icache_enable
 397 icache_enable:
 398         move.l  #0x01000000, %d0                /* Invalidate cache cmd */
 399         movec   %d0, %CACR                      /* Invalidate cache */
 400         move.l  #0x0000c000, %d0                /* Setup cache mask */
 401         movec   %d0, %ACR0                      /* Enable cache */
 402         move.l  #0xff00c000, %d0                /* Setup cache mask */
 403         movec   %d0, %ACR1                      /* Enable cache */
 404         move.l  #0x80400100, %d0                /* Setup cache mask, data cache disabel*/
 405         movec   %d0, %CACR                      /* Enable cache */
 406         moveq   #1, %d0
 407 icache_state_access_1:
 408         move.l  %d0, icache_state
 409         rts
 410 #endif
 411
 412 #if defined(CONFIG_M5249) || defined(CONFIG_M5253)
 413         .globl  icache_enable
 414 icache_enable:
 415         /*
 416          *  Note: The 5249 Documentation doesn't give a bit position for CINV!
 417          *  From the 5272 and the 5307 documentation, I have deduced that it is
 418          *  probably CACR[24]. Should someone say something to Motorola?
 419          *      ~Jeremy
 420          */
 421         move.l  #0x01000000, %d0                /* Invalidate whole cache */
 422         move.c  %d0,%CACR
 423         move.l  #0xff00c000, %d0                /* Set FLASH cachable: always match (SM=0b10) */
 424         move.c  %d0, %ACR0
 425         move.l  #0x0000c000, %d0                /* Set SDRAM cachable: always match (SM=0b10) */
 426         move.c  %d0, %ACR1
 427         move.l  #0x90000200, %d0                /* Set cache enable cmd */
 428         move.c  %d0,%CACR
 429         moveq   #1, %d0
 430         move.l  %d0, icache_state
 431         rts
 432 #endif
 433
 434         .globl  icache_disable
 435 icache_disable:
 436         move.l  #0x00000100, %d0                /* Setup cache mask */
 437         movec   %d0, %CACR                      /* Enable cache */
 438         clr.l   %d0                             /* Setup cache mask */
 439         movec   %d0, %ACR0                      /* Enable cache */
 440         movec   %d0, %ACR1                      /* Enable cache */
 441         moveq   #0, %d0
 442 icache_state_access_2:
 443         move.l  %d0, icache_state
 444         rts
 445
 446         .globl  icache_status
 447 icache_status:
 448 icache_state_access_3:
 449         move.l  #(icache_state), %a0
 450         move.l  (%a0), %d0
 451         rts
 452
 453         .data
 454 icache_state:
 455         .long   0       /* cache is diabled on inirialization */
 456
 457         .globl  dcache_enable
 458 dcache_enable:
 459         /* dummy function */
 460         rts
 461
 462         .globl  dcache_disable
 463 dcache_disable:
 464         /* dummy function */
 465         rts
 466
 467         .globl  dcache_status
 468 dcache_status:
 469         /* dummy function */
 470         rts
 471
 472 /*------------------------------------------------------------------------------*/
 473
 474         .globl  version_string
 475 version_string:
 476         .ascii U_BOOT_VERSION
 477         .ascii " (", __DATE__, " - ", __TIME__, ")"
 478         .ascii CONFIG_IDENT_STRING, "\0"
 479         .align 4