cpu/mpc5xxx/cpu.c

   1 /*
   2  * (C) Copyright 2000-2003
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * CPU specific code for the MPC5xxx CPUs
  26  */
  27
  28 #include <common.h>
  29 #include <watchdog.h>
  30 #include <command.h>
  31 #include <mpc5xxx.h>
  32 #include <asm/processor.h>
  33
  34 int checkcpu (void)
  35 {
  36         DECLARE_GLOBAL_DATA_PTR;
  37
  38         ulong clock = gd->cpu_clk;
  39         char buf[32];
  40 #ifndef CONFIG_MGT5100
  41         uint svr;
  42 #endif
  43
  44         puts ("CPU:   ");
  45
  46 #ifdef CONFIG_MGT5100
  47         puts   (CPU_ID_STR);
  48         printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
  49 #else
  50         svr = get_svr ();
  51         switch (SVR_VER (svr)) {
  52         case SVR_MPC5200:
  53                 printf ("MPC5200");
  54                 break;
  55         default:
  56                 printf ("MPC52??  (SVR %08x)", svr);
  57                 break;
  58         }
  59
  60         printf (" v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr));
  61 #endif
  62
  63         printf (" at %s MHz\n", strmhz (buf, clock));
  64
  65         return 0;
  66 }
  67
  68 /* ------------------------------------------------------------------------- */
  69
  70 int
  71 do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
  72 {
  73         ulong msr;
  74         /* Interrupts and MMU off */
  75         __asm__ __volatile__ ("mfmsr    %0":"=r" (msr):);
  76
  77         msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
  78         __asm__ __volatile__ ("mtmsr    %0"::"r" (msr));
  79
  80         /* Charge the watchdog timer */
  81         *(vu_long *)(MPC5XXX_GPT0_COUNTER) = 0x0001000f;
  82         *(vu_long *)(MPC5XXX_GPT0_ENABLE) = 0x9004; /* wden|ce|timer_ms */
  83         while(1);
  84
  85         return 1;
  86
  87 }
  88
  89 /* ------------------------------------------------------------------------- */
  90
  91 /*
  92  * Get timebase clock frequency (like cpu_clk in Hz)
  93  *
  94  */
  95 unsigned long get_tbclk (void)
  96 {
  97         DECLARE_GLOBAL_DATA_PTR;
  98
  99         ulong tbclk;
 100
 101         tbclk = (gd->bus_clk + 3L) / 4L;
 102
 103         return (tbclk);
 104 }
 105
 106 /* ------------------------------------------------------------------------- */