cpu/sa1100/cpu.c

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Alex Zuepke <azu@sysgo.de>
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 /*
  30  * CPU specific code
  31  */
  32
  33 #include <common.h>
  34 #include <command.h>
  35
  36 int cpu_init (void)
  37 {
  38         /*
  39          * setup up stacks if necessary
  40          */
  41 #ifdef CONFIG_USE_IRQ
  42         DECLARE_GLOBAL_DATA_PTR;
  43
  44         IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
  45         FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
  46 #endif
  47         return 0;
  48 }
  49
  50 int cleanup_before_linux (void)
  51 {
  52         /*
  53          * this function is called just before we call linux
  54          * it prepares the processor for linux
  55          *
  56          * just disable everything that can disturb booting linux
  57          */
  58
  59         unsigned long i;
  60
  61         disable_interrupts ();
  62
  63         /* turn off I-cache */
  64         asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
  65         i &= ~0x1000;
  66         asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
  67
  68         /* flush I-cache */
  69         asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
  70
  71         return (0);
  72 }
  73
  74 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  75 {
  76         printf ("resetting ...\n");
  77
  78         udelay (50000);                         /* wait 50 ms */
  79         disable_interrupts ();
  80         reset_cpu (0);
  81
  82         /*NOTREACHED*/
  83         return (0);
  84 }
  85
  86 /* taken from blob */
  87 void icache_enable (void)
  88 {
  89         register u32 i;
  90
  91         /* read control register */
  92         asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
  93
  94         /* set i-cache */
  95         i |= 0x1000;
  96
  97         /* write back to control register */
  98         asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
  99 }
 100
 101 void icache_disable (void)
 102 {
 103         register u32 i;
 104
 105         /* read control register */
 106         asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
 107
 108         /* clear i-cache */
 109         i &= ~0x1000;
 110
 111         /* write back to control register */
 112         asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
 113
 114         /* flush i-cache */
 115         asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
 116 }
 117
 118 int icache_status (void)
 119 {
 120         register u32 i;
 121
 122         /* read control register */
 123         asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
 124
 125         /* return bit */
 126         return (i & 0x1000);
 127 }
 128
 129 /* we will never enable dcache, because we have to setup MMU first */
 130 void dcache_enable (void)
 131 {
 132         return;
 133 }
 134
 135 void dcache_disable (void)
 136 {
 137         return;
 138 }
 139
 140 int dcache_status (void)
 141 {
 142         return 0;                                       /* always off */
 143 }