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1 Andes Technology SoC AE250
2 ===========================
3
4 AE250 is the mainline SoC produced by Andes Technology using NX25 CPU core
5 base on RISC-V architecture.
6
7 AE250 has integrated both AHB and APB bus and many periphals for application
8 and product development.
9
10 NX25-AE250
11 =========
12
13 NX25-AE250 is the SoC with AE250 hardcore CPU.
14
15 Configurations
16 ==============
17
18 CONFIG_SKIP_LOWLEVEL_INIT:
19 If you want to boot this system from SPI ROM and bypass e-bios (the
20 other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT
21 in "include/configs/nx25-ae250.h".
22
23 Build and boot steps
24 ====================
25
26 build:
27 1. Prepare the toolchains and make sure the $PATH to toolchains is correct.
28 2. Use `make nx25-ae250_defconfig` in u-boot root to build the image.
29
30 Verification
31 ====================
32
33 Target
34 ====================
35 1. startup
36 2. relocation
37 3. timer driver
38 4. uart driver
39 5. mac driver
40 6. mmc driver
41 7. spi driver
42
43 Steps
44 ====================
45 1. Define CONFIG_SKIP_LOWLEVEL_INIT to build u-boot which is loaded via gdb from ram.
46 2. Undefine CONFIG_SKIP_LOWLEVEL_INIT to build u-boot which is booted from spi rom.
47 3. Ping a server by mac driver
48 4. Scan sd card and copy u-boot image which is booted from flash to ram by sd driver.
49 5. Burn this u-boot image to spi rom by spi driver
50 6. Re-boot u-boot from spi flash with power off and power on.
51
52 Messages
53 ====================
54 U-Boot 2018.01-rc2-00033-g824f89a (Dec 21 2017 - 16:51:26 +0800)
55
56 DRAM: 1 GiB
57 MMC: mmc@f0e00000: 0
58 SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
59 In: serial@f0300000
60 Out: serial@f0300000
61 Err: serial@f0300000
62 Net:
63 Warning: mac@e0100000 (eth0) using random MAC address - be:dd:d7:e4:e8:10
64 eth0: mac@e0100000
65
66 RISC-V # version
67 U-Boot 2018.01-rc2-00033-gb265b91-dirty (Dec 22 2017 - 13:54:21 +0800)
68
69 riscv32-unknown-linux-gnu-gcc (GCC) 7.2.0
70 GNU ld (GNU Binutils) 2.29
71
72 RISC-V # setenv ipaddr 10.0.4.200 ;
73 RISC-V # setenv serverip 10.0.4.97 ;
74 RISC-V # ping 10.0.4.97 ;
75 Using mac@e0100000 device
76 host 10.0.4.97 is alive
77
78 RISC-V # mmc rescan
79 RISC-V # fatls mmc 0:1
80 318907 u-boot-ae250-64.bin
81 1252 hello_world_ae250_32.bin
82 328787 u-boot-ae250-32.bin
83
84 3 file(s), 0 dir(s)
85
86 RISC-V # sf probe 0:0 50000000 0
87 SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
88
89 RISC-V # sf test 0x100000 0x1000
90 SPI flash test:
91 0 erase: 36 ticks, 111 KiB/s 0.888 Mbps
92 1 check: 29 ticks, 137 KiB/s 1.096 Mbps
93 2 write: 40 ticks, 100 KiB/s 0.800 Mbps
94 3 read: 20 ticks, 200 KiB/s 1.600 Mbps
95 Test passed
96 0 erase: 36 ticks, 111 KiB/s 0.888 Mbps
97 1 check: 29 ticks, 137 KiB/s 1.096 Mbps
98 2 write: 40 ticks, 100 KiB/s 0.800 Mbps
99 3 read: 20 ticks, 200 KiB/s 1.600 Mbps
100
101 RISC-V # fatload mmc 0:1 0x600000 u-boot-ae250-32.bin
102 reading u-boot-ae250-32.bin
103 328787 bytes read in 324 ms (990.2 KiB/s)
104
105 RISC-V # sf erase 0x0 0x51000
106 SF: 331776 bytes @ 0x0 Erased: OK
107
108 RISC-V # sf write 0x600000 0x0 0x50453
109 device 0 offset 0x0, size 0x50453
110 SF: 328787 bytes @ 0x0 Written: OK
111
112 RISC-V # crc32 0x600000 0x50453
113 crc32 for 00600000 ... 00650452 ==> 692dc44a
114
115 RISC-V # crc32 0x80000000 0x50453
116 crc32 for 80000000 ... 80050452 ==> 692dc44a
117 RISC-V #
118
119 *** power-off and power-on, this U-Boot is booted from spi flash ***
120
121 U-Boot 2018.01-rc2-00032-gf67dd47-dirty (Dec 21 2017 - 13:56:03 +0800)
122
123 DRAM: 1 GiB
124 MMC: mmc@f0e00000: 0
125 SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
126 In: serial@f0300000
127 Out: serial@f0300000
128 Err: serial@f0300000
129 Net:
130 Warning: mac@e0100000 (eth0) using random MAC address - ee:4c:58:29:32:f5
131 eth0: mac@e0100000
132 RISC-V #
133
134 TODO
135 ====================
136
137 Boot bbl and riscv-linux