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1 Freescale Alaska MPC8220 board
2 ==============================
3
4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
5 Created 9/21/04
6 ===========================================
7
8
9 Changed files:
10 ==============
11
12 - Makefile added MPC8220 and Alaska8220_config
13 - MAKEALL added MPC8220 and Alaska8220
14 - README added CONFIG_MPC8220, Alaska8220_config
15
16 - common/cmd_bdinfo.c added board information members for MPC8220
17 - common/cmd_bootm.c added clocks for MPC8220 in do_bootm_linux()
18
19 - include/common.h added CONFIG_MPC8220
20
21 - include/asm-ppc/u-boot.h added board information members for MPC8220
22 - include/asm-ppc/global_data.h added global variables - inp_clk, pci_clk,
23 vco_clk, pev_clk, flb_clk, and bExtUart
24
25 - arch/powerpc/lib/board.c added CONFIG_MPC8220 support
26
27 - net/eth.c added FEC support for MPC8220
28
29 Added files:
30 ============
31 - board/alaska directory for Alaska MPC8220
32 - board/alaska/alaska.c Alaska dram and BATs setup
33 - board/alaska/extserial.c external serial (debug card serial) support
34 - board/alaska/flash.c Socket (AMD) and Onboard (INTEL) flash support
35 - board/alaska/serial.c to determine which int/ext serial to use
36 - board/alaska/Makefile Makefile
37 - board/alaska/config.mk config make
38 - board/alaska/u-boot.lds Linker description
39
40 - arch/powerpc/cpu/mpc8220/dma.h multi-channel dma header file
41 - arch/powerpc/cpu/mpc8220/dramSetup.h dram setup header file
42 - arch/powerpc/cpu/mpc8220/fec.h MPC8220 FEC header file
43 - arch/powerpc/cpu/mpc8220/cpu.c cpu specific code
44 - arch/powerpc/cpu/mpc8220/cpu_init.c Flexbus ChipSelect and Mux pins setup
45 - arch/powerpc/cpu/mpc8220/dramSetup.c MPC8220 DDR SDRAM setup
46 - arch/powerpc/cpu/mpc8220/fec.c MPC8220 FEC driver
47 - arch/powerpc/cpu/mpc8220/i2c.c MPC8220 I2C driver
48 - arch/powerpc/cpu/mpc8220/interrupts.c interrupt support (not enable)
49 - arch/powerpc/cpu/mpc8220/loadtask.c load dma
50 - arch/powerpc/cpu/mpc8220/speed.c system, pci, flexbus, pev, and cpu clock
51 - arch/powerpc/cpu/mpc8220/traps.c exception
52 - arch/powerpc/cpu/mpc8220/uart.c MPC8220 UART driver
53 - arch/powerpc/cpu/mpc8220/Makefile Makefile
54 - arch/powerpc/cpu/mpc8220/config.mk config make
55 - arch/powerpc/cpu/mpc8220/fec_dma_task.S MPC8220 FEC multi-channel dma program
56 - arch/powerpc/cpu/mpc8220/io.S io functions
57 - arch/powerpc/cpu/mpc8220/start.S start up
58
59 - include/mpc8220.h
60
61 - include/asm-ppc/immap_8220.h
62
63 - include/configs/Alaska8220.h
64
65
66 1. SWITCH SETTINGS
67 ==================
68 1.1 SW1: 0 - Boot from Socket Flash (AMD) or 1 - Onboard Flash (INTEL)
69 SW2: 0 - Select MPC8220 UART or 1 - Debug Card UART
70 SW3: unsed
71 SW4: 0 - 1284 or 1 - FEC1
72 SW5: 0 - PEV or 1 - FEC2
73
74
75 2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
76 ===========================================
77 2.1. For the initial bringup, we adopted a consistent memory scheme between u-boot and
78 linux kernel, you can customize it based on your system requirements:
79 DDR: 0x00000000-0x1fffffff (max 512MB)
80 MBAR: 0xf0000000-0xf0027fff (128KB)
81 CPLD: 0xf1000000-0xf103ffff (256KB)
82 FPGA: 0xf2000000-0xf203ffff (256KB)
83 Flash: 0xfe000000-0xffffffff (max 32MB)
84
85 3. DEFINITIONS AND COMPILATION
86 ==============================
87 3.1 Explanation on NEW definitions in include/configs/alaska8220.h
88 CONFIG_MPC8220 MPC8220 specific
89 CONFIG_ALASKA8220 Alaska board specific
90 CONFIG_SYS_MPC8220_CLKIN Define Alaska Input Clock
91 CONFIG_PSC_CONSOLE Enable MPC8220 UART
92 CONFIG_EXTUART_CONSOLE Enable External 16552 UART
93 CONFIG_SYS_AMD_BOOT To determine the u-boot is booted from AMD or Intel
94 CONFIG_SYS_MBAR MBAR base address
95 CONFIG_SYS_DEFAULT_MBAR Reset MBAR base address
96
97 3.2 Compilation
98 export CROSS_COMPILE=cross-compile-prefix
99 cd u-boot-1-1-x
100 make distclean
101 make Alaska8220_config
102 make
103
104
105 4. SCREEN DUMP
106 ==============
107 4.1 Alaska MPC8220 board
108 Boot from AMD (NOTE: May not show exactly the same)
109
110 U-Boot 1.1.1 (Sep 22 2004 - 22:14:41)
111
112 CPU: MPC8220 (JTAG ID 1640301d) at 300 MHz
113 Bus 120 MHz, CPU 300 MHz, PCI 30 MHz, VCO 480 MHz
114 Board: Alaska MPC8220 Evaluation Board
115 I2C: 93 kHz, ready
116 DRAM: 256 MB
117 Reserving 167k for U-Boot at: 0ffd6000
118 FLASH: 16.5 MB
119 *** Warning - bad CRC, using default environment
120
121 In: serial
122 Out: serial
123 Err: serial
124 Net: FEC ETHERNET
125 => flinfo
126
127 Bank # 1: INTEL 28F128J3A
128 Size: 8 MB in 64 Sectors
129 Sector Start Addresses:
130 FE000000 FE020000 FE040000 FE060000 FE080000
131 FE0A0000 FE0C0000 FE0E0000 FE100000 FE120000
132 FE140000 FE160000 FE180000 FE1A0000 FE1C0000
133 FE1E0000 FE200000 FE220000 FE240000 FE260000
134 FE280000 FE2A0000 FE2C0000 FE2E0000 FE300000
135 FE320000 FE340000 FE360000 FE380000 FE3A0000
136 FE3C0000 FE3E0000 FE400000 FE420000 FE440000
137 FE460000 FE480000 FE4A0000 FE4C0000 FE4E0000
138 FE500000 FE520000 FE540000 FE560000 FE580000
139 FE5A0000 FE5C0000 FE5E0000 FE600000 FE620000
140 FE640000 FE660000 FE680000 FE6A0000 FE6C0000
141 FE6E0000 FE700000 FE720000 FE740000 FE760000
142 FE780000 FE7A0000 FE7C0000 FE7E0000
143
144 Bank # 2: INTEL 28F128J3A
145 Size: 8 MB in 64 Sectors
146 Sector Start Addresses:
147 FE800000 FE820000 FE840000 FE860000 FE880000
148 FE8A0000 FE8C0000 FE8E0000 FE900000 FE920000
149 FE940000 FE960000 FE980000 FE9A0000 FE9C0000
150 FE9E0000 FEA00000 FEA20000 FEA40000 FEA60000
151 FEA80000 FEAA0000 FEAC0000 FEAE0000 FEB00000
152 FEB20000 FEB40000 FEB60000 FEB80000 FEBA0000
153 FEBC0000 FEBE0000 FEC00000 FEC20000 FEC40000
154 FEC60000 FEC80000 FECA0000 FECC0000 FECE0000
155 FED00000 FED20000 FED40000 FED60000 FED80000
156 FEDA0000 FEDC0000 FEDE0000 FEE00000 FEE20000
157 FEE40000 FEE60000 FEE80000 FEEA0000 FEEC0000
158 FEEE0000 FEF00000 (RO) FEF20000 (RO) FEF40000 FEF60000
159 FEF80000 FEFA0000 FEFC0000 FEFE0000 (RO)
160
161 Bank # 3: AMD AMD29F040B
162 Size: 0 MB in 7 Sectors
163 Sector Start Addresses:
164 FFF00000 (RO) FFF10000 (RO) FFF20000 (RO) FFF30000 FFF40000
165 FFF50000 FFF60000
166
167 Bank # 4: AMD AMD29F040B
168 Size: 0 MB in 1 Sectors
169 Sector Start Addresses:
170 FFF70000 (RO)
171 => bdinfo
172
173 memstart = 0xF0009800
174 memsize = 0x10000000
175 flashstart = 0xFFF00000
176 flashsize = 0x01080000
177 flashoffset = 0x00025000
178 sramstart = 0xF0020000
179 sramsize = 0x00008000
180 bootflags = 0x00000001
181 intfreq = 300 MHz
182 busfreq = 120 MHz
183 inpfreq = 30 MHz
184 flbfreq = 30 MHz
185 pcifreq = 30 MHz
186 vcofreq = 480 MHz
187 pevfreq = 81 MHz
188 ethaddr = 00:E0:0C:BC:E0:60
189 eth1addr = 00:E0:0C:BC:E0:61
190 IP addr = 192.162.1.2
191 baudrate = 115200 bps
192 => printenv
193 bootargs=root=/dev/ram rw
194 bootdelay=5
195 baudrate=115200
196 ethaddr=00:e0:0c:bc:e0:60
197 eth1addr=00:e0:0c:bc:e0:61
198 ipaddr=192.162.1.2
199 serverip=192.162.1.1
200 gatewayip=192.162.1.1
201 netmask=255.255.255.0
202 hostname=Alaska
203 stdin=serial
204 stdout=serial
205 stderr=serial
206 ethact=FEC ETHERNET
207
208 Environment size: 268/65532 bytes
209 => setenv ipaddr 192.160.1.2
210 => setenv serverip 192.160.1.1
211 => setenv gatewayip 192.160.1.1
212 => saveenv
213 Saving Environment to Flash...
214
215 .
216 Un-Protected 1 sectors
217 Erasing Flash...
218 Erasing sector 0 ... done
219 Erased 1 sectors
220 Writing to Flash... done
221
222 .
223 Protected 1 sectors
224 => tftp 0x10000 linux.elf
225 Using FEC ETHERNET device
226 TFTP from server 192.160.1.1; our IP address is 192.160.1.2; sending through gateway 192.160.1.1
227 Filename 'linux.elf'.
228 Load address: 0x10000
229 Loading: invalid RARP header
230 #################################################################
231 #################################################################
232 #################################################################
233 #################################################################
234 #################################################################
235 #################################################################
236 #################################################################
237 #################################################################
238 ##################################################
239 done
240 Bytes transferred = 2917494 (2c8476 hex)
241 => bootelf
242 Loading .text @ 0x00a00000 (23820 bytes)
243 Loading .data @ 0x00a06000 (2752512 bytes)
244 Clearing .bss @ 0x00ca6000 (12764 bytes)
245 ## Starting application at 0x00a00000 ...
246
247 Collect some entropy from RAM........done
248 loaded at: 00A00000 00CA91DC
249 zimage at: 00A06A93 00AD7756
250 initrd at: 00AD8000 00CA5565
251 avail ram: 00CAA000 014AA000
252
253 Linux/PPC load: ip=off console=ttyS0,115200
254 Uncompressing Linux...done.
255 Now booting the kernel
256 Total memory in system: 256 MB
257 Memory BAT mapping: BAT2=256Mb, BAT3=0Mb, residual: 0Mb
258 Linux version 2.4.21-rc1 (r61688@bluesocks.sps.mot.com) (gcc version 3.3.1) #17 Wed Sep 8 11:49:16 CDT 2004
259 Motorola Alaska port (C) 2003 Motorola, Inc.
260 CPLD rev 3
261 CPLD switches 0x1b
262 Set Pin Mux for FEC1
263 Set Pin Mux for FEC2
264 Alaska Pin Multiplexing:
265 Port Configuration Register 0 = 0
266 Port Configuration Register 1 = 0
267 Port Configuration Register 2 = 0
268 Port Configuration Register 3 = 50000000
269 Port Configuration Register 3 - PCI = 51400180
270 Setup Alaska FPGA PIC:
271 Interrupt Enable Register *(u32) = 0
272 Interrupt Status Register = 2f0000
273 Interrupt Enable Register in_be32 = 0
274 Interrupt Status Register = 2f0000
275 Interrupt Enable Register in_le32 = 0
276 Interrupt Status Register = 2f00
277 Interrupt Enable Register readl = 0
278 Interrupt Status Register = 2f00
279 Interrupt Enable Register = 0
280 Interrupt Status Register = 2f0000
281 Setup Alaska PCI Controller:
282 On node 0 totalpages: 65536
283 zone(0): 65536 pages.
284 zone(1): 0 pages.
285 zone(2): 0 pages.
286 Kernel command line: ip=off console=ttyS0,115200
287 Using XLB clock (120.00 MHz) to set up decrementer
288 Calibrating delay loop... 199.88 BogoMIPS
289 Memory: 254792k available (1476k kernel code, 708k data, 228k init, 0k highmem)
290 Dentry cache hash table entries: 32768 (order: 6, 262144 bytes)
291 Inode cache hash table entries: 16384 (order: 5, 131072 bytes)
292 Mount cache hash table entries: 512 (order: 0, 4096 bytes)
293 Buffer-cache hash table entries: 16384 (order: 4, 65536 bytes)
294 Page-cache hash table entries: 65536 (order: 6, 262144 bytes)
295 POSIX conformance testing by UNIFIX
296 PCI: Probing PCI hardware
297 PCI: (pcibios_init) Global-Hose = 0xc029d000
298 Scanning bus 00
299 Fixups for bus 00
300 Bus scan for 00 returning with max=00
301 PCI: (pcibios_init) finished pci_scan_bus(hose->first_busno = 0, hose->ops = c01a1a74, hose = c029d000)
302 PCI: (pcibios_init) PCI Bus Count = 0 =?= Next Bus# = 1
303 PCI: (pcibios_init@pci_fixup_irqs) finished machine dependent PCI interrupt routing!
304 PCI: bridge rsrc 81000000..81ffffff (100), parent c01a7f88
305 PCI: bridge rsrc 84000000..87ffffff (200), parent c01a7fa4
306 PCI: (pcibios_init) finished allocating and assigning resources!
307 initDma!
308 Using 90 DMA buffer descriptors
309 descUsed f0023600, descriptors f002360c freeSram f0024140
310 unmask SDMA tasks: 0xf0008018 = 0x6f000000
311 Linux NET4.0 for Linux 2.4
312 Based upon Swansea University Computer Society NET3.039
313 Initializing RT netlink socket
314 Starting kswapd
315 Journalled Block Device driver loaded
316 JFFS version 1.0, (C) 1999, 2000 Axis Communications AB
317 JFFS2 version 2.1. (C) 2001 Red Hat, Inc., designed by Axis Communications AB.
318 pty: 256 Unix98 ptys configured
319 tracek: Copyright (C) Motorola, 2003.
320 Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled
321 ttyS00 at 0xf1001008 (irq = 73) is a ST16650
322 ttyS01 at 0xf1001010 (irq = 74) is a ST16650
323 elp-fpanel: Copyright (C) Motorola, 2003.
324 fpanel: fpanelWait timeout
325 elp-engine: Copyright (C) Motorola, 2003.
326 Video disabled due to configuration switch 4
327 Alpine 1284 driver: Copyright (C) Motorola, 2003.
328 1284 disabled due to configuration switch 5
329 Alpine USB driver: Copyright (C) Motorola, 2003.
330 OK
331 USB: Descriptor download completed OK
332 enable_irq(41) unbalanced
333 enable_irq(75) unbalanced
334 elp-dmaram: Copyright (C) Motorola, 2003.
335 Total memory in system: 256 MB
336 elp_dmaram: offset is 0x10000000, size is 0
337 Xicor NVRAM driver: Copyright (C) Motorola, 2003.
338 elp-video: Copyright (C) Motorola, 2003.
339 Video disabled due to configuration switch 4
340 elp-pfm: Copyright (C) Motorola, 2003.
341 paddle: Copyright (C) Motorola, 2001, present.
342 RAMDISK driver initialized: 16 RAM disks of 12288K size 1024 blocksize
343 loop: loaded (max 8 devices)
344 PPP generic driver version 2.4.2
345 PPP Deflate Compression module registered
346 Uniform Multi-Platform E-IDE driver Revision: 7.00beta-2.4
347 ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx
348 init_alaska_mtd: chip probing count 0
349 cfi_cmdset_0001: Erase suspend on write enabled
350 Using buffer write method
351 init_alaska_mtd: bank1, name:ALASKA0, size:16777216bytes
352 ALASKA flash0: Using Static image partition definition
353 Creating 3 MTD partitions on "ALASKA0":
354 0x00000000-0x00280000 : "kernel"
355 0x00280000-0x00fe0000 : "user"
356 0x00fe0000-0x01000000 : "signature"
357 mgt_fec_module_init
358 mgt_fec_init()
359 mgt_fec_init
360 mgt_init_fec_dev(0xc05f6000,0)
361 dev c05f6000 fec_priv c05f6160 fec f0009000
362 mgt_init_fec_dev(0xc05f6800,1)
363 dev c05f6800 fec_priv c05f6960 fec f0009800
364 NET4: Linux TCP/IP 1.0 for NET4.0
365 IP Protocols: ICMP, UDP, TCP, IGMP
366 IP: routing cache hash table of 2048 buckets, 16Kbytes
367 TCP: Hash tables configured (established 16384 bind 32768)
368 NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
369 RAMDISK: Compressed image found at block 0
370 Freeing initrd memory: 1845k freed
371 JFFS: Trying to mount a non-mtd device.
372 VFS: Mounted root (romfs filesystem) readonly.
373 Freeing unused kernel memory: 228k init
374 INIT: version 2.78 booting
375 INIT: Entering runlevel: 1
376 "Space, a great big place of unknown stuff." -Dexter, for our MotD.
377 [01/Jan/1970:00:00:01 +0000] boa: server version Boa/0.94.8.3
378 [01/Jan/1970:00:00:01 +0000] boa: server built Sep 7 2004 at 17:40:55.
379 [01/Jan/1970:00:00:01 +0000] boa: starting server pid=28, port 80
380 Mounting flash filesystem, will take a minute...
381 /etc/rc: line 30: /dev/lp0: No such devish-2.05b#
382 sh-2.05b# ifup eth0
383 client (v0.9.9-pre) started
384 adapter index 2
385 adapter hardware address 00:e0:0c:bc:e0:60
386 execle'ing /usr/share/udhcpc/default.script
387 /sbin/ifconfig eth0
388 eth0 Link encap:Ethernet HWaddr 00:E0:0C:BC:E0:60
389 BROADCAST MULTICAST MTU:1500 Metric:1
390 mgt_fec_open
391 Rfec request irq
392 X fec_open: rcv_ring_size 8, xmt_ring_size 8
393 packmgt_fec_open(): call netif_start_queue()
394 ets:0 errors:0 dropped:0 overruns:0 frame:0
395 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
396 collisions:0 txqueuelen:100
397 RX bytes:0 (0.0 b) TX bytes:0 (0.0 b)
398 Base address:0x9000
399
400 /sbin/ifconfig eth0 up
401 entering raw listen mode
402 Opening raw socket on ifindex 2
403 adding option 0x35
404 adding option 0x3d
405 adding option 0x3c
406 Sending discover...
407 Waiting on select...
408 unrelated/bogus packet
409 Waiting on select...
410 oooooh!!! got some!
411 adding option 0x35
412 adding option 0x3d
413 adding option 0x3c
414 adding option 0x32
415 adding option 0x36
416 Sending select for 163.12.48.146...
417 Waiting on select...
418 oooooh!!! got some!
419 Waiting on select...
420 oooooh!!! got some!
421 Lease of 163.12.48.146 obtained, lease time 345600
422 execle'ing /usr/share/udhcpc/default.script
423 /sbin/ifconfig eth0 163.12.48.146 netmask 255.255.254.0
424 /sbin/ifconfig eth0 up
425 deleting routers
426 /sbin/route del default
427 /sbin/route add default gw 163.12.49.254 dev eth0
428 adding dns 163.12.252.230
429 adding dns 192.55.22.4
430 adding dns 192.5.249.4
431 entering none listen mode
432 sh-2.05b#
433
434 5. REPROGRAM U-BOOT
435 ===================
436 5.1 Reprogram u-boot (boot from AMD)
437 1. Unprotect the boot sector
438 => protect off bank 3
439 2. Download new u-boot binary file
440 => tftp 0x10000 u-boot.bin
441 3. Erase bootsector (max 7 sectors)
442 => erase 0xfff00000 0xfff6ffff
443 4. Program the u-boot to flash
444 => cp.b 0x10000 0xfff00000
445 5. Reset for the new u-boot to take place
446 => reset
447
448 5.2 Reprogram u-boot (boot from AMD program at INTEL)
449 1. Unprotect the boot sector
450 => protect off bank 2
451 2. Download new u-boot binary file
452 => tftp 0x10000 u-boot.bin
453 3. Erase bootsector (max 7 sectors)
454 => erase 0xfef00000 0xfefdffff
455 4. Program the u-boot to flash
456 => cp.b 0x10000 0xfef00000
457 5. Reset for the new u-boot to take place
458 => reset
459
460 5.3 Reprogram u-boot (boot from INTEL)
461 1. Unprotect the boot sector
462 => protect off bank 4
463 2. Download new u-boot binary file
464 => tftp 0x10000 u-boot.bin
465 3. Erase bootsector (max 7 sectors)
466 => erase 0xfff00000 0xfffdffff
467 4. Program the u-boot to flash
468 => cp.b 0x10000 0xfff00000
469 5. Reset for the new u-boot to take place
470 => reset
471
472 5.4 Reprogram u-boot (boot from INTEL program at AMD)
473 1. Unprotect the boot sector
474 => protect off bank 1
475 2. Download new u-boot binary file
476 => tftp 0x10000 u-boot.bin
477 3. Erase bootsector (max 7 sectors)
478 => erase 0xfe080000 0xfe0effff
479 4. Program the u-boot to flash
480 => cp.b 0x10000 0xfe080000
481 5. Reset for the new u-boot to take place
482 => reset