doc/README.rockchip

   1 #
   2 # Copyright (C) 2015 Google. Inc
   3 # Written by Simon Glass <sjg@chromium.org>
   4 #
   5 # SPDX-License-Identifier:      GPL-2.0+
   6 #
   7
   8 U-Boot on Rockchip
   9 ==================
  10
  11 There are several repositories available with versions of U-Boot that support
  12 many Rockchip devices [1] [2].
  13
  14 The current mainline support is experimental only and is not useful for
  15 anything. It should provide a base on which to build.
  16
  17 So far only support for the RK3288 and RK3036 is provided.
  18
  19
  20 Prerequisites
  21 =============
  22
  23 You will need:
  24
  25    - Firefly RK3288 board or something else with a supported RockChip SoC
  26    - Power connection to 5V using the supplied micro-USB power cable
  27    - Separate USB serial cable attached to your computer and the Firefly
  28         (connect to the micro-USB connector below the logo)
  29    - rkflashtool [3]
  30    - openssl (sudo apt-get install openssl)
  31    - Serial UART connection [4]
  32    - Suitable ARM cross compiler, e.g.:
  33         sudo apt-get install gcc-4.7-arm-linux-gnueabi
  34
  35
  36 Building
  37 ========
  38
  39 At present seven RK3288 boards are supported:
  40
  41    - EVB RK3288 - use evb-rk3288 configuration
  42    - Fennec RK3288 - use fennec-rk3288 configuration
  43    - Firefly RK3288 - use firefly-rk3288 configuration
  44    - Hisense Chromebook - use chromebook_jerry configuration
  45    - Miniarm RK3288 - use miniarm-rk3288 configuration
  46    - PopMetal RK3288 - use popmetal-rk3288 configuration
  47    - Radxa Rock 2 - use rock2 configuration
  48
  49 Two RK3036 board are supported:
  50
  51    - EVB RK3036 - use evb-rk3036 configuration
  52    - Kylin - use kylin_rk3036 configuration
  53
  54 For example:
  55
  56    CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
  57
  58 (or you can use another cross compiler if you prefer)
  59
  60
  61 Writing to the board with USB
  62 =============================
  63
  64 For USB to work you must get your board into ROM boot mode, either by erasing
  65 your MMC or (perhaps) holding the recovery button when you boot the board.
  66 To erase your MMC, you can boot into Linux and type (as root)
  67
  68    dd if=/dev/zero of=/dev/mmcblk0 bs=1M
  69
  70 Connect your board's OTG port to your computer.
  71
  72 To create a suitable image and write it to the board:
  73
  74    ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
  75         ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
  76    cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
  77
  78 If all goes well you should something like:
  79
  80    U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
  81    Card did not respond to voltage select!
  82    spl: mmc init failed with error: -17
  83    ### ERROR ### Please RESET the board ###
  84
  85 You will need to reset the board before each time you try. Yes, that's all
  86 it does so far. If support for the Rockchip USB protocol or DFU were added
  87 in SPL then we could in principle load U-Boot and boot to a prompt from USB
  88 as several other platforms do. However it does not seem to be possible to
  89 use the existing boot ROM code from SPL.
  90
  91
  92 Booting from an SD card
  93 =======================
  94
  95 To write an image that boots from an SD card (assumed to be /dev/sdc):
  96
  97    ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
  98         firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
  99    sudo dd if=out of=/dev/sdc seek=64 && \
 100    sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
 101
 102 This puts the Rockchip header and SPL image first and then places the U-Boot
 103 image at block 256 (i.e. 128KB from the start of the SD card). This
 104 corresponds with this setting in U-Boot:
 105
 106    #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR      256
 107
 108 Put this SD (or micro-SD) card into your board and reset it. You should see
 109 something like:
 110
 111    U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
 112
 113    Model: Radxa Rock 2 Square
 114    DRAM:  2 GiB
 115    MMC:   dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
 116    *** Warning - bad CRC, using default environment
 117
 118    In:    serial
 119    Out:   vop@ff940000.vidconsole
 120    Err:   serial
 121    Net:   Net Initialization Skipped
 122    No ethernet found.
 123    Hit any key to stop autoboot:  0
 124    =>
 125
 126 The rockchip bootrom can load and boot an initial spl, then continue to
 127 load a second-level bootloader(ie. U-BOOT) as soon as it returns to bootrom.
 128 Therefore RK3288 has another loading sequence like RK3036. The option of
 129 U-Boot is controlled with this setting in U-Boot:
 130
 131         #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
 132
 133 You can create the image via the following operations:
 134
 135    ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
 136         firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
 137    cat firefly-rk3288/u-boot-dtb.bin >> out && \
 138    sudo dd if=out of=/dev/sdc seek=64
 139
 140 If you have an HDMI cable attached you should see a video console.
 141
 142 For evb_rk3036 board:
 143         ./evb-rk3036/tools/mkimage -n rk3036 -T rksd  -d evb-rk3036/spl/u-boot-spl.bin out && \
 144         cat evb-rk3036/u-boot-dtb.bin >> out && \
 145         sudo dd if=out of=/dev/sdc seek=64
 146
 147 Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
 148       debug uart must be disabled
 149
 150 Using fastboot on rk3288
 151 ========================
 152 - Write GPT partition layout to mmc device which fastboot want to use it to
 153 store the image
 154
 155         => gpt write mmc 1 $partitions
 156
 157 - Invoke fastboot command to prepare
 158
 159         => fastboot 1
 160
 161 - Start fastboot request on PC
 162
 163         fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
 164
 165 You should see something like:
 166
 167         => fastboot 1
 168         WARNING: unknown variable: partition-type:loader
 169         Starting download of 357796 bytes
 170         ..
 171         downloading of 357796 bytes finished
 172         Flashing Raw Image
 173         ........ wrote 357888 bytes to 'loader'
 174
 175 Booting from SPI
 176 ================
 177
 178 To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
 179
 180    ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
 181         -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
 182    dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
 183    cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
 184    dd if=out.bin of=out.bin.pad bs=4M conv=sync
 185
 186 This converts the SPL image to the required SPI format by adding the Rockchip
 187 header and skipping every 2KB block. Then the U-Boot image is written at
 188 offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
 189 The position of U-Boot is controlled with this setting in U-Boot:
 190
 191    #define CONFIG_SYS_SPI_U_BOOT_OFFS   (128 << 10)
 192
 193 If you have a Dediprog em100pro connected then you can write the image with:
 194
 195       sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
 196
 197 When booting you should see something like:
 198
 199    U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
 200
 201
 202    U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
 203
 204    Model: Google Jerry
 205    DRAM:  2 GiB
 206    MMC:
 207    Using default environment
 208
 209    In:    serial@ff690000
 210    Out:   serial@ff690000
 211    Err:   serial@ff690000
 212    =>
 213
 214 Future work
 215 ===========
 216
 217 Immediate priorities are:
 218
 219 - USB host
 220 - USB device
 221 - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
 222 - Ethernet
 223 - NAND flash
 224 - Support for other Rockchip parts
 225 - Boot U-Boot proper over USB OTG (at present only SPL works)
 226
 227
 228 Development Notes
 229 =================
 230
 231 There are plenty of patches in the links below to help with this work.
 232
 233 [1] https://github.com/rkchrome/uboot.git
 234 [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
 235 [3] https://github.com/linux-rockchip/rkflashtool.git
 236 [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
 237
 238 rkimage
 239 -------
 240
 241 rkimage.c produces an SPL image suitable for sending directly to the boot ROM
 242 over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
 243 followed by u-boot-spl-dtb.bin.
 244
 245 The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
 246 starts at 0xff700000 and extends to 0xff718000 where we put the stack.
 247
 248 rksd
 249 ----
 250
 251 rksd.c produces an image consisting of 32KB of empty space, a header and
 252 u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
 253 most of the fields are unused by U-Boot. We just need to specify the
 254 signature, a flag and the block offset and size of the SPL image.
 255
 256 The header occupies a single block but we pad it out to 4 blocks. The header
 257 is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
 258 image can be encoded too but we don't do that.
 259
 260 The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
 261 or 0x40 blocks. This is a severe and annoying limitation. There may be a way
 262 around this limitation, since there is plenty of SRAM, but at present the
 263 board refuses to boot if this limit is exceeded.
 264
 265 The image produced is padded up to a block boundary (512 bytes). It should be
 266 written to the start of an SD card using dd.
 267
 268 Since this image is set to load U-Boot from the SD card at block offset,
 269 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
 270 u-boot-dtb.img to the SD card at that offset. See above for instructions.
 271
 272 rkspi
 273 -----
 274
 275 rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
 276 resulting image is then spread out so that only the first 2KB of each 4KB
 277 sector is used. The header is the same as with rksd and the maximum size is
 278 also 32KB (before spreading). The image should be written to the start of
 279 SPI flash.
 280
 281 See above for instructions on how to write a SPI image.
 282
 283 rkmux.py
 284 --------
 285
 286 You can use this script to create #defines for SoC register access. See the
 287 script for usage.
 288
 289
 290 Device tree and driver model
 291 ----------------------------
 292
 293 Where possible driver model is used to provide a structure to the
 294 functionality. Device tree is used for configuration. However these have an
 295 overhead and in SPL with a 32KB size limit some shortcuts have been taken.
 296 In general all Rockchip drivers should use these features, with SPL-specific
 297 modifications where required.
 298
 299 GPT partition layout
 300 ----------------------------
 301
 302 Rockchip use a unified GPT partition layout  in open source support.
 303 With this GPT partition layout, uboot can be compatilbe with other components,
 304 like miniloader, trusted-os, arm-trust-firmware.
 305
 306 There are some documents about partitions in the links below.
 307 http://rockchip.wikidot.com/partitions
 308
 309 --
 310 Simon Glass <sjg@chromium.org>
 311 24 June 2015