doc/README.uniphier

   1 U-Boot for UniPhier SoC family
   2 ==============================
   3
   4
   5 Tested toolchains
   6 -----------------
   7
   8  (a) Ubuntu packages  (CROSS_COMPILE=arm-linux-gnueabi-)
   9
  10   If you are building U-Boot on Ubuntu, its standard package is recommended.
  11   You can install it as follows:
  12
  13     $ sudo apt-get install gcc-arm-linux-gnueabi-
  14
  15  (b) Linaro compilers  (CROSS_COMPILE=arm-linux-gnueabihf-)
  16
  17   You can download pre-built toolchains from:
  18
  19     http://www.linaro.org/downloads/
  20
  21  (c) kernel.org compilers  (CROSS_COMPILE=arm-unknown-linux-gnueabi-)
  22
  23   You can download pre-built toolchains from:
  24
  25     ftp://www.kernel.org/pub/tools/crosstool/files/bin/
  26
  27
  28 Compile the source
  29 ------------------
  30
  31 PH1-sLD3 reference board:
  32     $ make uniphier_sld3_defconfig
  33     $ make CROSS_COMPILE=arm-linux-gnueabi-
  34
  35 PH1-LD4 reference board:
  36     $ make uniphier_ld4_sld8_defconfig
  37     $ make CROSS_COMPILE=arm-linux-gnueabi-
  38
  39 PH1-sLD8 reference board:
  40     $ make uniphier_ld4_sld8_defconfig
  41     $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-sld8-ref
  42
  43 PH1-Pro4 reference board:
  44     $ make uniphier_pro4_defconfig
  45     $ make CROSS_COMPILE=arm-linux-gnueabi-
  46
  47 PH1-Pro4 Ace board:
  48     $ make uniphier_pro4_defconfig
  49     $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro4-ace
  50
  51 PH1-Pro4 Sanji board:
  52     $ make uniphier_pro4_defconfig
  53     $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro4-sanji
  54
  55 PH1-Pro5 4KBOX Board:
  56     $ make uniphier_pxs2_ld6b_defconfig
  57     $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro5-4kbox
  58
  59 ProXstream2 Gentil board:
  60     $ make uniphier_pxs2_ld6b_defconfig
  61     $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-proxstream2-gentil
  62
  63 ProXstream2 Vodka board:
  64     $ make uniphier_pxs2_ld6b_defconfig
  65     $ make CROSS_COMPILE=arm-linux-gnueabi-
  66
  67 PH1-LD6b reference board:
  68     $ make uniphier_pxs2_ld6b_defconfig
  69     $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld6b-ref
  70
  71 You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-"
  72 to use your favorite compiler.
  73
  74
  75 Burn U-Boot images to NAND
  76 --------------------------
  77
  78 Write two files to the NAND device as follows:
  79  - spl/u-boot-spl.bin at the offset address 0x00000000
  80  - u-boot.img         at the offset address 0x00010000
  81
  82 If a TFTP server is available, the images can be easily updated.
  83 Just copy the u-boot-spl-dtb.bin and u-boot-dtb.img to the TFTP public
  84 directory, and then run the following command at the U-Boot command line:
  85
  86   => run nandupdate
  87
  88
  89 Burn U-Boot images to eMMC
  90 --------------------------
  91
  92 Write two files to the Boot partition 1 of the eMMC device as follows:
  93  - spl/u-boot-spl.bin at the offset address 0x00000000
  94  - u-boot.img         at the offset address 0x00010000
  95
  96 If a TFTP server is available, the images can be easily updated.
  97 Just copy the u-boot-spl-dtb.bin and u-boot-dtb.img to the TFTP public
  98 directory, and then run the following command at the U-Boot command line:
  99
 100   => run emmcupdate
 101
 102
 103 UniPhier specific commands
 104 --------------------------
 105
 106  - pinmon (enabled by CONFIG_CMD_PINMON)
 107      shows the boot mode pins that has been latched at the power-on reset
 108
 109  - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP)
 110      shows the DDR PHY parameters set by the PHY training
 111
 112
 113 Supported devices
 114 -----------------
 115
 116  - UART (on-chip)
 117  - NAND
 118  - SD/eMMC
 119  - USB 2.0 (EHCI)
 120  - USB 3.0 (xHCI)
 121  - GPIO
 122  - LAN (on-board SMSC9118)
 123  - I2C
 124  - EEPROM (connected to the on-board I2C bus)
 125  - Support card (SRAM, NOR flash, some peripherals)
 126
 127
 128 Micro Support Card
 129 ------------------
 130
 131 The recommended bit switch settings are as follows:
 132
 133  SW2    OFF(1)/ON(0)   Description
 134  ------------------------------------------
 135  bit 1   <----         BKSZ[0]
 136  bit 2   ---->         BKSZ[1]
 137  bit 3   <----         SoC Bus Width 16/32
 138  bit 4   <----         SERIAL_SEL[0]
 139  bit 5   ---->         SERIAL_SEL[1]
 140  bit 6   ---->         BOOTSWAP_EN
 141  bit 7   <----         CS1/CS5
 142  bit 8   <----         SOC_SERIAL_DISABLE
 143
 144  SW8    OFF(1)/ON(0)   Description
 145  ------------------------------------------
 146  bit 1    <----        CS1_SPLIT
 147  bit 2    <----        CASE9_ON
 148  bit 3    <----        CASE10_ON
 149  bit 4  Don't Care     Reserve
 150  bit 5  Don't Care     Reserve
 151  bit 6  Don't Care     Reserve
 152  bit 7    ---->        BURST_EN
 153  bit 8    ---->        FLASHBUS32_16
 154
 155 The BKSZ[1:0] specifies the address range of memory slot and peripherals
 156 as follows:
 157
 158  BKSZ    Description              RAM slot            Peripherals
 159  --------------------------------------------------------------------
 160  0b00   15MB RAM / 1MB Peri    00000000-00efffff    00f00000-00ffffff
 161  0b01   31MB RAM / 1MB Peri    00000000-01efffff    01f00000-01ffffff
 162  0b10   64MB RAM / 1MB Peri    00000000-03efffff    03f00000-03ffffff
 163  0b11  127MB RAM / 1MB Peri    00000000-07efffff    07f00000-07ffffff
 164
 165 Set BSKZ[1:0] to 0b01 for U-Boot.
 166 This mode is the most handy because EA[24] is always supported by the save pin
 167 mode of the system bus.  On the other hand, EA[25] is not supported for some
 168 newer SoCs.  Even if it is, EA[25] is not connected on most of the boards.
 169
 170 --
 171 Masahiro Yamada <yamada.masahiro@socionext.com>
 172 Feb. 2016