2 * Copyright (C) 2008,2010 Freescale Semiconductor, Inc.
3 * Dave Liu <daveliu@freescale.com>
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/processor.h>
12 #include <asm/fsl_serdes.h>
19 #ifndef CONFIG_SYS_SATA1_FLAGS
20 #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
22 #ifndef CONFIG_SYS_SATA2_FLAGS
23 #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
26 static struct fsl_sata_info fsl_sata_info
[] = {
28 {CONFIG_SYS_SATA1
, CONFIG_SYS_SATA1_FLAGS
},
33 {CONFIG_SYS_SATA2
, CONFIG_SYS_SATA2_FLAGS
},
39 static inline void sdelay(unsigned long sec
)
42 for (i
= 0; i
< sec
; i
++)
46 static void fsl_sata_dump_sfis(struct sata_fis_d2h
*s
)
48 printf("Status FIS dump:\n\r");
49 printf("fis_type: %02x\n\r", s
->fis_type
);
50 printf("pm_port_i: %02x\n\r", s
->pm_port_i
);
51 printf("status: %02x\n\r", s
->status
);
52 printf("error: %02x\n\r", s
->error
);
53 printf("lba_low: %02x\n\r", s
->lba_low
);
54 printf("lba_mid: %02x\n\r", s
->lba_mid
);
55 printf("lba_high: %02x\n\r", s
->lba_high
);
56 printf("device: %02x\n\r", s
->device
);
57 printf("lba_low_exp: %02x\n\r", s
->lba_low_exp
);
58 printf("lba_mid_exp: %02x\n\r", s
->lba_mid_exp
);
59 printf("lba_high_exp: %02x\n\r", s
->lba_high_exp
);
60 printf("res1: %02x\n\r", s
->res1
);
61 printf("sector_count: %02x\n\r", s
->sector_count
);
62 printf("sector_count_exp: %02x\n\r", s
->sector_count_exp
);
65 static int ata_wait_register(unsigned __iomem
*addr
, u32 mask
,
66 u32 val
, u32 timeout_msec
)
71 for (i
= 0; (((temp
= in_le32(addr
)) & mask
) != val
)
72 && i
< timeout_msec
; i
++)
74 return (i
< timeout_msec
) ? 0 : -1;
77 int init_sata(int dev
)
80 cmd_hdr_tbl_t
*cmd_hdr
;
83 fsl_sata_reg_t __iomem
*reg
;
88 if (dev
< 0 || dev
> (CONFIG_SYS_SATA_MAX_DEVICE
- 1)) {
89 printf("the sata index %d is out of ranges\n\r", dev
);
94 if ((dev
== 0) && (!is_serdes_configured(SATA1
))) {
95 printf("SATA%d [dev = %d] is not enabled\n", dev
+1, dev
);
98 if ((dev
== 1) && (!is_serdes_configured(SATA2
))) {
99 printf("SATA%d [dev = %d] is not enabled\n", dev
+1, dev
);
104 /* Allocate SATA device driver struct */
105 sata
= (fsl_sata_t
*)malloc(sizeof(fsl_sata_t
));
107 printf("alloc the sata device struct failed\n\r");
110 /* Zero all of the device driver struct */
111 memset((void *)sata
, 0, sizeof(fsl_sata_t
));
113 /* Save the private struct to block device struct */
114 sata_dev_desc
[dev
].priv
= (void *)sata
;
116 snprintf(sata
->name
, 12, "SATA%d", dev
);
118 /* Set the controller register base address to device struct */
119 reg
= (fsl_sata_reg_t
*)(fsl_sata_info
[dev
].sata_reg_base
);
120 sata
->reg_base
= reg
;
122 /* Allocate the command header table, 4 bytes aligned */
123 length
= sizeof(struct cmd_hdr_tbl
);
124 align
= SATA_HC_CMD_HDR_TBL_ALIGN
;
125 sata
->cmd_hdr_tbl_offset
= (void *)malloc(length
+ align
);
127 printf("alloc the command header failed\n\r");
131 cmd_hdr
= (cmd_hdr_tbl_t
*)(((u32
)sata
->cmd_hdr_tbl_offset
+ align
)
133 sata
->cmd_hdr
= cmd_hdr
;
135 /* Zero all of the command header table */
136 memset((void *)sata
->cmd_hdr_tbl_offset
, 0, length
+ align
);
138 /* Allocate command descriptor for all command */
139 length
= sizeof(struct cmd_desc
) * SATA_HC_MAX_CMD
;
140 align
= SATA_HC_CMD_DESC_ALIGN
;
141 sata
->cmd_desc_offset
= (void *)malloc(length
+ align
);
142 if (!sata
->cmd_desc_offset
) {
143 printf("alloc the command descriptor failed\n\r");
146 sata
->cmd_desc
= (cmd_desc_t
*)(((u32
)sata
->cmd_desc_offset
+ align
)
148 /* Zero all of command descriptor */
149 memset((void *)sata
->cmd_desc_offset
, 0, length
+ align
);
151 /* Link the command descriptor to command header */
152 for (i
= 0; i
< SATA_HC_MAX_CMD
; i
++) {
153 cda
= ((u32
)sata
->cmd_desc
+ SATA_HC_CMD_DESC_SIZE
* i
)
154 & ~(CMD_HDR_CDA_ALIGN
- 1);
155 cmd_hdr
->cmd_slot
[i
].cda
= cpu_to_le32(cda
);
158 /* To have safe state, force the controller offline */
159 val32
= in_le32(®
->hcontrol
);
160 val32
&= ~HCONTROL_ONOFF
;
161 val32
|= HCONTROL_FORCE_OFFLINE
;
162 out_le32(®
->hcontrol
, val32
);
164 /* Wait the controller offline */
165 ata_wait_register(®
->hstatus
, HSTATUS_ONOFF
, 0, 1000);
167 /* Set the command header base address to CHBA register to tell DMA */
168 out_le32(®
->chba
, (u32
)cmd_hdr
& ~0x3);
170 /* Snoop for the command header */
171 val32
= in_le32(®
->hcontrol
);
172 val32
|= HCONTROL_HDR_SNOOP
;
173 out_le32(®
->hcontrol
, val32
);
175 /* Disable all of interrupts */
176 val32
= in_le32(®
->hcontrol
);
177 val32
&= ~HCONTROL_INT_EN_ALL
;
178 out_le32(®
->hcontrol
, val32
);
180 /* Clear all of interrupts */
181 val32
= in_le32(®
->hstatus
);
182 out_le32(®
->hstatus
, val32
);
184 /* Set the ICC, no interrupt coalescing */
185 out_le32(®
->icc
, 0x01000000);
187 /* No PM attatched, the SATA device direct connect */
188 out_le32(®
->cqpmp
, 0);
190 /* Clear SError register */
191 val32
= in_le32(®
->serror
);
192 out_le32(®
->serror
, val32
);
194 /* Clear CER register */
195 val32
= in_le32(®
->cer
);
196 out_le32(®
->cer
, val32
);
198 /* Clear DER register */
199 val32
= in_le32(®
->der
);
200 out_le32(®
->der
, val32
);
202 /* No device detection or initialization action requested */
203 out_le32(®
->scontrol
, 0x00000300);
205 /* Configure the transport layer, default value */
206 out_le32(®
->transcfg
, 0x08000016);
208 /* Configure the link layer, default value */
209 out_le32(®
->linkcfg
, 0x0000ff34);
211 /* Bring the controller online */
212 val32
= in_le32(®
->hcontrol
);
213 val32
|= HCONTROL_ONOFF
;
214 out_le32(®
->hcontrol
, val32
);
218 /* print sata device name */
220 printf("%s ", sata
->name
);
222 printf(" %s ", sata
->name
);
224 /* Wait PHY RDY signal changed for 500ms */
225 ata_wait_register(®
->hstatus
, HSTATUS_PHY_RDY
,
226 HSTATUS_PHY_RDY
, 500);
229 val32
= in_le32(®
->hstatus
);
230 if (val32
& HSTATUS_PHY_RDY
) {
234 printf("(No RDY)\n\r");
238 /* Wait for signature updated, which is 1st D2H */
239 ata_wait_register(®
->hstatus
, HSTATUS_SIGNATURE
,
240 HSTATUS_SIGNATURE
, 10000);
242 if (val32
& HSTATUS_SIGNATURE
) {
243 sig
= in_le32(®
->sig
);
244 debug("Signature updated, the sig =%08x\n\r", sig
);
245 sata
->ata_device_type
= ata_dev_classify(sig
);
248 /* Check the speed */
249 val32
= in_le32(®
->sstatus
);
250 if ((val32
& SSTATUS_SPD_MASK
) == SSTATUS_SPD_GEN1
)
251 printf("(1.5 Gbps)\n\r");
252 else if ((val32
& SSTATUS_SPD_MASK
) == SSTATUS_SPD_GEN2
)
253 printf("(3 Gbps)\n\r");
258 int reset_sata(int dev
)
263 static void fsl_sata_dump_regs(fsl_sata_reg_t __iomem
*reg
)
265 printf("\n\rSATA: %08x\n\r", (u32
)reg
);
266 printf("CQR: %08x\n\r", in_le32(®
->cqr
));
267 printf("CAR: %08x\n\r", in_le32(®
->car
));
268 printf("CCR: %08x\n\r", in_le32(®
->ccr
));
269 printf("CER: %08x\n\r", in_le32(®
->cer
));
270 printf("CQR: %08x\n\r", in_le32(®
->cqr
));
271 printf("DER: %08x\n\r", in_le32(®
->der
));
272 printf("CHBA: %08x\n\r", in_le32(®
->chba
));
273 printf("HStatus: %08x\n\r", in_le32(®
->hstatus
));
274 printf("HControl: %08x\n\r", in_le32(®
->hcontrol
));
275 printf("CQPMP: %08x\n\r", in_le32(®
->cqpmp
));
276 printf("SIG: %08x\n\r", in_le32(®
->sig
));
277 printf("ICC: %08x\n\r", in_le32(®
->icc
));
278 printf("SStatus: %08x\n\r", in_le32(®
->sstatus
));
279 printf("SError: %08x\n\r", in_le32(®
->serror
));
280 printf("SControl: %08x\n\r", in_le32(®
->scontrol
));
281 printf("SNotification: %08x\n\r", in_le32(®
->snotification
));
282 printf("TransCfg: %08x\n\r", in_le32(®
->transcfg
));
283 printf("TransStatus: %08x\n\r", in_le32(®
->transstatus
));
284 printf("LinkCfg: %08x\n\r", in_le32(®
->linkcfg
));
285 printf("LinkCfg1: %08x\n\r", in_le32(®
->linkcfg1
));
286 printf("LinkCfg2: %08x\n\r", in_le32(®
->linkcfg2
));
287 printf("LinkStatus: %08x\n\r", in_le32(®
->linkstatus
));
288 printf("LinkStatus1: %08x\n\r", in_le32(®
->linkstatus1
));
289 printf("PhyCtrlCfg: %08x\n\r", in_le32(®
->phyctrlcfg
));
290 printf("SYSPR: %08x\n\r", in_be32(®
->syspr
));
293 static int fsl_ata_exec_ata_cmd(struct fsl_sata
*sata
, struct sata_fis_h2d
*cfis
,
294 int is_ncq
, int tag
, u8
*buffer
, u32 len
)
296 cmd_hdr_entry_t
*cmd_hdr
;
297 cmd_desc_t
*cmd_desc
;
304 fsl_sata_reg_t __iomem
*reg
= sata
->reg_base
;
307 /* Check xfer length */
308 if (len
> SATA_HC_MAX_XFER_LEN
) {
309 printf("max transfer length is 64MB\n\r");
313 /* Setup the command descriptor */
314 cmd_desc
= sata
->cmd_desc
+ tag
;
316 /* Get the pointer cfis of command descriptor */
317 h2d
= (sata_fis_h2d_t
*)cmd_desc
->cfis
;
319 /* Zero the cfis of command descriptor */
320 memset((void *)h2d
, 0, SATA_HC_CMD_DESC_CFIS_SIZE
);
322 /* Copy the cfis from user to command descriptor */
323 h2d
->fis_type
= cfis
->fis_type
;
324 h2d
->pm_port_c
= cfis
->pm_port_c
;
325 h2d
->command
= cfis
->command
;
327 h2d
->features
= cfis
->features
;
328 h2d
->features_exp
= cfis
->features_exp
;
330 h2d
->lba_low
= cfis
->lba_low
;
331 h2d
->lba_mid
= cfis
->lba_mid
;
332 h2d
->lba_high
= cfis
->lba_high
;
333 h2d
->lba_low_exp
= cfis
->lba_low_exp
;
334 h2d
->lba_mid_exp
= cfis
->lba_mid_exp
;
335 h2d
->lba_high_exp
= cfis
->lba_high_exp
;
338 h2d
->sector_count
= cfis
->sector_count
;
339 h2d
->sector_count_exp
= cfis
->sector_count_exp
;
341 h2d
->sector_count
= (u8
)(tag
<< 3);
344 h2d
->device
= cfis
->device
;
345 h2d
->control
= cfis
->control
;
347 /* Setup the PRD table */
348 prde
= (prd_entry_t
*)cmd_desc
->prdt
;
349 memset((void *)prde
, 0, sizeof(struct prdt
));
353 for (i
= 0; i
< SATA_HC_MAX_PRD_DIRECT
; i
++) {
356 prde
->dba
= cpu_to_le32((u32
)buffer
& ~0x3);
357 debug("dba = %08x\n\r", (u32
)buffer
);
359 if (len
< PRD_ENTRY_MAX_XFER_SZ
) {
360 ext_c_ddc
= PRD_ENTRY_DATA_SNOOP
| len
;
361 debug("ext_c_ddc1 = %08x, len = %08x\n\r", ext_c_ddc
, len
);
362 prde
->ext_c_ddc
= cpu_to_le32(ext_c_ddc
);
367 ext_c_ddc
= PRD_ENTRY_DATA_SNOOP
; /* 4M bytes */
368 debug("ext_c_ddc2 = %08x, len = %08x\n\r", ext_c_ddc
, len
);
369 prde
->ext_c_ddc
= cpu_to_le32(ext_c_ddc
);
370 buffer
+= PRD_ENTRY_MAX_XFER_SZ
;
371 len
-= PRD_ENTRY_MAX_XFER_SZ
;
377 /* Setup the command slot of cmd hdr */
378 cmd_hdr
= (cmd_hdr_entry_t
*)&sata
->cmd_hdr
->cmd_slot
[tag
];
380 cmd_hdr
->cda
= cpu_to_le32((u32
)cmd_desc
& ~0x3);
382 val32
= prde_count
<< CMD_HDR_PRD_ENTRY_SHIFT
;
383 val32
|= sizeof(sata_fis_h2d_t
);
384 cmd_hdr
->prde_fis_len
= cpu_to_le32(val32
);
386 cmd_hdr
->ttl
= cpu_to_le32(ttl
);
389 val32
= CMD_HDR_ATTR_RES
| CMD_HDR_ATTR_SNOOP
;
391 val32
= CMD_HDR_ATTR_RES
| CMD_HDR_ATTR_SNOOP
| CMD_HDR_ATTR_FPDMA
;
394 tag
&= CMD_HDR_ATTR_TAG
;
397 debug("attribute = %08x\n\r", val32
);
398 cmd_hdr
->attribute
= cpu_to_le32(val32
);
400 /* Make sure cmd desc and cmd slot valid before commmand issue */
404 val32
= (u32
)(h2d
->pm_port_c
& 0x0f);
405 out_le32(®
->cqpmp
, val32
);
408 if (ata_wait_register(®
->car
, (1 << tag
), 0, 10000))
409 printf("Wait no active time out\n\r");
412 if (!(in_le32(®
->cqr
) & (1 << tag
))) {
414 out_le32(®
->cqr
, val32
);
417 /* Wait command completed for 10s */
418 if (ata_wait_register(®
->ccr
, (1 << tag
), (1 << tag
), 10000)) {
420 printf("Non-NCQ command time out\n\r");
422 printf("NCQ command time out\n\r");
425 val32
= in_le32(®
->cer
);
429 fsl_sata_dump_sfis((struct sata_fis_d2h
*)cmd_desc
->sfis
);
430 printf("CE at device\n\r");
431 fsl_sata_dump_regs(reg
);
432 der
= in_le32(®
->der
);
433 out_le32(®
->cer
, val32
);
434 out_le32(®
->der
, der
);
437 /* Clear complete flags */
438 val32
= in_le32(®
->ccr
);
439 out_le32(®
->ccr
, val32
);
444 static int fsl_ata_exec_reset_cmd(struct fsl_sata
*sata
, struct sata_fis_h2d
*cfis
,
445 int tag
, u8
*buffer
, u32 len
)
450 static int fsl_sata_exec_cmd(struct fsl_sata
*sata
, struct sata_fis_h2d
*cfis
,
451 enum cmd_type command_type
, int tag
, u8
*buffer
, u32 len
)
455 if (tag
> SATA_HC_MAX_CMD
|| tag
< 0) {
456 printf("tag is out of range, tag=%d\n\r", tag
);
460 switch (command_type
) {
462 rc
= fsl_ata_exec_ata_cmd(sata
, cfis
, 0, tag
, buffer
, len
);
465 rc
= fsl_ata_exec_reset_cmd(sata
, cfis
, tag
, buffer
, len
);
468 rc
= fsl_ata_exec_ata_cmd(sata
, cfis
, 1, tag
, buffer
, len
);
471 case CMD_VENDOR_BIST
:
473 printf("not support now\n\r");
482 static void fsl_sata_identify(int dev
, u16
*id
)
484 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
485 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
487 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
489 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
490 cfis
->pm_port_c
= 0x80; /* is command */
491 cfis
->command
= ATA_CMD_ID_ATA
;
493 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, (u8
*)id
, ATA_ID_WORDS
* 2);
494 ata_swap_buf_le16(id
, ATA_ID_WORDS
);
497 static void fsl_sata_xfer_mode(int dev
, u16
*id
)
499 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
501 sata
->pio
= id
[ATA_ID_PIO_MODES
];
502 sata
->mwdma
= id
[ATA_ID_MWDMA_MODES
];
503 sata
->udma
= id
[ATA_ID_UDMA_MODES
];
504 debug("pio %04x, mwdma %04x, udma %04x\n\r", sata
->pio
, sata
->mwdma
, sata
->udma
);
507 static void fsl_sata_set_features(int dev
)
509 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
510 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
513 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
515 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
516 cfis
->pm_port_c
= 0x80; /* is command */
517 cfis
->command
= ATA_CMD_SET_FEATURES
;
518 cfis
->features
= SETFEATURES_XFER
;
520 /* First check the device capablity */
521 udma_cap
= (u8
)(sata
->udma
& 0xff);
522 debug("udma_cap %02x\n\r", udma_cap
);
524 if (udma_cap
== ATA_UDMA6
)
525 cfis
->sector_count
= XFER_UDMA_6
;
526 if (udma_cap
== ATA_UDMA5
)
527 cfis
->sector_count
= XFER_UDMA_5
;
528 if (udma_cap
== ATA_UDMA4
)
529 cfis
->sector_count
= XFER_UDMA_4
;
530 if (udma_cap
== ATA_UDMA3
)
531 cfis
->sector_count
= XFER_UDMA_3
;
533 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, NULL
, 0);
536 static u32
fsl_sata_rw_cmd(int dev
, u32 start
, u32 blkcnt
, u8
*buffer
, int is_write
)
538 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
539 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
544 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
546 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
547 cfis
->pm_port_c
= 0x80; /* is command */
548 cfis
->command
= (is_write
) ? ATA_CMD_WRITE
: ATA_CMD_READ
;
549 cfis
->device
= ATA_LBA
;
551 cfis
->device
|= (block
>> 24) & 0xf;
552 cfis
->lba_high
= (block
>> 16) & 0xff;
553 cfis
->lba_mid
= (block
>> 8) & 0xff;
554 cfis
->lba_low
= block
& 0xff;
555 cfis
->sector_count
= (u8
)(blkcnt
& 0xff);
557 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, buffer
, ATA_SECT_SIZE
* blkcnt
);
561 static void fsl_sata_flush_cache(int dev
)
563 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
564 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
566 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
568 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
569 cfis
->pm_port_c
= 0x80; /* is command */
570 cfis
->command
= ATA_CMD_FLUSH
;
572 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, NULL
, 0);
575 static u32
fsl_sata_rw_cmd_ext(int dev
, u32 start
, u32 blkcnt
, u8
*buffer
, int is_write
)
577 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
578 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
583 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
585 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
586 cfis
->pm_port_c
= 0x80; /* is command */
588 cfis
->command
= (is_write
) ? ATA_CMD_WRITE_EXT
591 cfis
->lba_high_exp
= (block
>> 40) & 0xff;
592 cfis
->lba_mid_exp
= (block
>> 32) & 0xff;
593 cfis
->lba_low_exp
= (block
>> 24) & 0xff;
594 cfis
->lba_high
= (block
>> 16) & 0xff;
595 cfis
->lba_mid
= (block
>> 8) & 0xff;
596 cfis
->lba_low
= block
& 0xff;
597 cfis
->device
= ATA_LBA
;
598 cfis
->sector_count_exp
= (blkcnt
>> 8) & 0xff;
599 cfis
->sector_count
= blkcnt
& 0xff;
601 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, buffer
, ATA_SECT_SIZE
* blkcnt
);
605 static u32
fsl_sata_rw_ncq_cmd(int dev
, u32 start
, u32 blkcnt
, u8
*buffer
,
608 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
609 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
613 if (sata
->lba48
!= 1) {
614 printf("execute FPDMA command on non-LBA48 hard disk\n\r");
620 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
622 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
623 cfis
->pm_port_c
= 0x80; /* is command */
625 cfis
->command
= (is_write
) ? ATA_CMD_FPDMA_WRITE
626 : ATA_CMD_FPDMA_READ
;
628 cfis
->lba_high_exp
= (block
>> 40) & 0xff;
629 cfis
->lba_mid_exp
= (block
>> 32) & 0xff;
630 cfis
->lba_low_exp
= (block
>> 24) & 0xff;
631 cfis
->lba_high
= (block
>> 16) & 0xff;
632 cfis
->lba_mid
= (block
>> 8) & 0xff;
633 cfis
->lba_low
= block
& 0xff;
635 cfis
->device
= ATA_LBA
;
636 cfis
->features_exp
= (blkcnt
>> 8) & 0xff;
637 cfis
->features
= blkcnt
& 0xff;
639 if (sata
->queue_depth
>= SATA_HC_MAX_CMD
)
640 ncq_channel
= SATA_HC_MAX_CMD
- 1;
642 ncq_channel
= sata
->queue_depth
- 1;
644 /* Use the latest queue */
645 fsl_sata_exec_cmd(sata
, cfis
, CMD_NCQ
, ncq_channel
, buffer
, ATA_SECT_SIZE
* blkcnt
);
649 static void fsl_sata_flush_cache_ext(int dev
)
651 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
652 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
654 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
656 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
657 cfis
->pm_port_c
= 0x80; /* is command */
658 cfis
->command
= ATA_CMD_FLUSH_EXT
;
660 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, NULL
, 0);
663 static void fsl_sata_init_wcache(int dev
, u16
*id
)
665 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
667 if (ata_id_has_wcache(id
) && ata_id_wcache_enabled(id
))
669 if (ata_id_has_flush(id
))
671 if (ata_id_has_flush_ext(id
))
675 static int fsl_sata_get_wcache(int dev
)
677 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
681 static int fsl_sata_get_flush(int dev
)
683 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
687 static int fsl_sata_get_flush_ext(int dev
)
689 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
690 return sata
->flush_ext
;
693 static u32
ata_low_level_rw_lba48(int dev
, u32 blknr
, lbaint_t blkcnt
,
694 const void *buffer
, int is_write
)
704 max_blks
= ATA_MAX_SECTORS_LBA48
;
706 if (blks
> max_blks
) {
707 if (fsl_sata_info
[dev
].flags
!= FLAGS_FPDMA
)
708 fsl_sata_rw_cmd_ext(dev
, start
, max_blks
, addr
, is_write
);
710 fsl_sata_rw_ncq_cmd(dev
, start
, max_blks
, addr
, is_write
);
713 addr
+= ATA_SECT_SIZE
* max_blks
;
715 if (fsl_sata_info
[dev
].flags
!= FLAGS_FPDMA
)
716 fsl_sata_rw_cmd_ext(dev
, start
, blks
, addr
, is_write
);
718 fsl_sata_rw_ncq_cmd(dev
, start
, blks
, addr
, is_write
);
721 addr
+= ATA_SECT_SIZE
* blks
;
728 static u32
ata_low_level_rw_lba28(int dev
, u32 blknr
, u32 blkcnt
,
729 const void *buffer
, int is_write
)
739 max_blks
= ATA_MAX_SECTORS
;
741 if (blks
> max_blks
) {
742 fsl_sata_rw_cmd(dev
, start
, max_blks
, addr
, is_write
);
745 addr
+= ATA_SECT_SIZE
* max_blks
;
747 fsl_sata_rw_cmd(dev
, start
, blks
, addr
, is_write
);
750 addr
+= ATA_SECT_SIZE
* blks
;
758 * SATA interface between low level driver and command layer
760 ulong
sata_read(int dev
, ulong blknr
, lbaint_t blkcnt
, void *buffer
)
763 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
766 rc
= ata_low_level_rw_lba48(dev
, blknr
, blkcnt
, buffer
, READ_CMD
);
768 rc
= ata_low_level_rw_lba28(dev
, blknr
, blkcnt
, buffer
, READ_CMD
);
772 ulong
sata_write(int dev
, ulong blknr
, lbaint_t blkcnt
, const void *buffer
)
775 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
778 rc
= ata_low_level_rw_lba48(dev
, blknr
, blkcnt
, buffer
, WRITE_CMD
);
779 if (fsl_sata_get_wcache(dev
) && fsl_sata_get_flush_ext(dev
))
780 fsl_sata_flush_cache_ext(dev
);
782 rc
= ata_low_level_rw_lba28(dev
, blknr
, blkcnt
, buffer
, WRITE_CMD
);
783 if (fsl_sata_get_wcache(dev
) && fsl_sata_get_flush(dev
))
784 fsl_sata_flush_cache(dev
);
789 int scan_sata(int dev
)
791 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
792 unsigned char serial
[ATA_ID_SERNO_LEN
+ 1];
793 unsigned char firmware
[ATA_ID_FW_REV_LEN
+ 1];
794 unsigned char product
[ATA_ID_PROD_LEN
+ 1];
798 /* if no detected link */
802 id
= (u16
*)malloc(ATA_ID_WORDS
* 2);
804 printf("id malloc failed\n\r");
808 /* Identify device to get information */
809 fsl_sata_identify(dev
, id
);
812 ata_id_c_string(id
, serial
, ATA_ID_SERNO
, sizeof(serial
));
813 memcpy(sata_dev_desc
[dev
].product
, serial
, sizeof(serial
));
815 /* Firmware version */
816 ata_id_c_string(id
, firmware
, ATA_ID_FW_REV
, sizeof(firmware
));
817 memcpy(sata_dev_desc
[dev
].revision
, firmware
, sizeof(firmware
));
820 ata_id_c_string(id
, product
, ATA_ID_PROD
, sizeof(product
));
821 memcpy(sata_dev_desc
[dev
].vendor
, product
, sizeof(product
));
824 n_sectors
= ata_id_n_sectors(id
);
825 sata_dev_desc
[dev
].lba
= (u32
)n_sectors
;
828 /* Check if support LBA48 */
829 if (ata_id_has_lba48(id
)) {
831 debug("Device support LBA48\n\r");
833 debug("Device supports LBA28\n\r");
836 /* Get the NCQ queue depth from device */
837 sata
->queue_depth
= ata_id_queue_depth(id
);
839 /* Get the xfer mode from device */
840 fsl_sata_xfer_mode(dev
, id
);
842 /* Get the write cache status from device */
843 fsl_sata_init_wcache(dev
, id
);
845 /* Set the xfer mode to highest speed */
846 fsl_sata_set_features(dev
);
848 fsl_sata_identify(dev
, id
);