]>
git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/clk/clk-uclass.c
2 * Copyright (C) 2015 Google, Inc
3 * Written by Simon Glass <sjg@chromium.org>
4 * Copyright (c) 2016, NVIDIA CORPORATION.
6 * SPDX-License-Identifier: GPL-2.0+
11 #include <clk-uclass.h>
13 #include <dt-structs.h>
16 DECLARE_GLOBAL_DATA_PTR
;
18 static inline struct clk_ops
*clk_dev_ops(struct udevice
*dev
)
20 return (struct clk_ops
*)dev
->driver
->ops
;
23 #if CONFIG_IS_ENABLED(OF_CONTROL)
24 #ifdef CONFIG_SPL_BUILD
25 # if CONFIG_IS_ENABLED(OF_PLATDATA)
26 int clk_get_by_index_platdata(struct udevice
*dev
, int index
,
27 struct phandle_2_cell
*cells
, struct clk
*clk
)
33 ret
= uclass_get_device(UCLASS_CLK
, 0, &clk
->dev
);
36 clk
->id
= cells
[0].id
;
41 int clk_get_by_index(struct udevice
*dev
, int index
, struct clk
*clk
)
49 ret
= uclass_get_device(UCLASS_CLK
, 0, &clk
->dev
);
52 ret
= fdtdec_get_int_array(gd
->fdt_blob
, dev
->of_offset
, "clocks",
59 # endif /* OF_PLATDATA */
61 int clk_get_by_name(struct udevice
*dev
, const char *name
, struct clk
*clk
)
66 static int clk_of_xlate_default(struct clk
*clk
,
67 struct fdtdec_phandle_args
*args
)
69 debug("%s(clk=%p)\n", __func__
, clk
);
71 if (args
->args_count
> 1) {
72 debug("Invaild args_count: %d\n", args
->args_count
);
77 clk
->id
= args
->args
[0];
84 int clk_get_by_index(struct udevice
*dev
, int index
, struct clk
*clk
)
87 struct fdtdec_phandle_args args
;
88 struct udevice
*dev_clk
;
91 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__
, dev
, index
, clk
);
94 ret
= fdtdec_parse_phandle_with_args(gd
->fdt_blob
, dev
->of_offset
,
95 "clocks", "#clock-cells", 0, index
,
98 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
103 ret
= uclass_get_device_by_of_offset(UCLASS_CLK
, args
.node
, &dev_clk
);
105 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
109 ops
= clk_dev_ops(dev_clk
);
112 ret
= ops
->of_xlate(clk
, &args
);
114 ret
= clk_of_xlate_default(clk
, &args
);
116 debug("of_xlate() failed: %d\n", ret
);
120 return clk_request(dev_clk
, clk
);
123 int clk_get_by_name(struct udevice
*dev
, const char *name
, struct clk
*clk
)
127 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__
, dev
, name
, clk
);
129 index
= fdt_find_string(gd
->fdt_blob
, dev
->of_offset
, "clock-names",
132 debug("fdt_find_string() failed: %d\n", index
);
136 return clk_get_by_index(dev
, index
, clk
);
138 #endif /* CONFIG_SPL_BUILD */
139 #endif /* OF_CONTROL */
141 int clk_request(struct udevice
*dev
, struct clk
*clk
)
143 struct clk_ops
*ops
= clk_dev_ops(dev
);
145 debug("%s(dev=%p, clk=%p)\n", __func__
, dev
, clk
);
152 return ops
->request(clk
);
155 int clk_free(struct clk
*clk
)
157 struct clk_ops
*ops
= clk_dev_ops(clk
->dev
);
159 debug("%s(clk=%p)\n", __func__
, clk
);
164 return ops
->free(clk
);
167 ulong
clk_get_rate(struct clk
*clk
)
169 struct clk_ops
*ops
= clk_dev_ops(clk
->dev
);
171 debug("%s(clk=%p)\n", __func__
, clk
);
176 return ops
->get_rate(clk
);
179 ulong
clk_set_rate(struct clk
*clk
, ulong rate
)
181 struct clk_ops
*ops
= clk_dev_ops(clk
->dev
);
183 debug("%s(clk=%p, rate=%lu)\n", __func__
, clk
, rate
);
188 return ops
->set_rate(clk
, rate
);
191 int clk_enable(struct clk
*clk
)
193 struct clk_ops
*ops
= clk_dev_ops(clk
->dev
);
195 debug("%s(clk=%p)\n", __func__
, clk
);
200 return ops
->enable(clk
);
203 int clk_disable(struct clk
*clk
)
205 struct clk_ops
*ops
= clk_dev_ops(clk
->dev
);
207 debug("%s(clk=%p)\n", __func__
, clk
);
212 return ops
->disable(clk
);
215 UCLASS_DRIVER(clk
) = {