]>
git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/clk/clk-uclass.c
2 * Copyright (C) 2015 Google, Inc
3 * Written by Simon Glass <sjg@chromium.org>
4 * Copyright (c) 2016, NVIDIA CORPORATION.
6 * SPDX-License-Identifier: GPL-2.0+
11 #include <clk-uclass.h>
13 #include <dt-structs.h>
16 DECLARE_GLOBAL_DATA_PTR
;
18 static inline struct clk_ops
*clk_dev_ops(struct udevice
*dev
)
20 return (struct clk_ops
*)dev
->driver
->ops
;
23 #if CONFIG_IS_ENABLED(OF_CONTROL)
24 # if CONFIG_IS_ENABLED(OF_PLATDATA)
25 int clk_get_by_index_platdata(struct udevice
*dev
, int index
,
26 struct phandle_2_cell
*cells
, struct clk
*clk
)
32 ret
= uclass_get_device(UCLASS_CLK
, 0, &clk
->dev
);
35 clk
->id
= cells
[0].id
;
40 static int clk_of_xlate_default(struct clk
*clk
,
41 struct ofnode_phandle_args
*args
)
43 debug("%s(clk=%p)\n", __func__
, clk
);
45 if (args
->args_count
> 1) {
46 debug("Invaild args_count: %d\n", args
->args_count
);
51 clk
->id
= args
->args
[0];
58 int clk_get_by_index(struct udevice
*dev
, int index
, struct clk
*clk
)
61 struct ofnode_phandle_args args
;
62 struct udevice
*dev_clk
;
65 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__
, dev
, index
, clk
);
70 ret
= dev_read_phandle_with_args(dev
, "clocks", "#clock-cells", 0,
73 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
78 ret
= uclass_get_device_by_ofnode(UCLASS_CLK
, args
.node
, &dev_clk
);
80 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
87 ops
= clk_dev_ops(dev_clk
);
90 ret
= ops
->of_xlate(clk
, &args
);
92 ret
= clk_of_xlate_default(clk
, &args
);
94 debug("of_xlate() failed: %d\n", ret
);
98 return clk_request(dev_clk
, clk
);
100 # endif /* OF_PLATDATA */
102 int clk_get_by_name(struct udevice
*dev
, const char *name
, struct clk
*clk
)
106 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__
, dev
, name
, clk
);
109 index
= dev_read_stringlist_search(dev
, "clock-names", name
);
111 debug("fdt_stringlist_search() failed: %d\n", index
);
115 return clk_get_by_index(dev
, index
, clk
);
118 int clk_release_all(struct clk
*clk
, int count
)
122 for (i
= 0; i
< count
; i
++) {
123 debug("%s(clk[%d]=%p)\n", __func__
, i
, &clk
[i
]);
125 /* check if clock has been previously requested */
129 ret
= clk_disable(&clk
[i
]);
130 if (ret
&& ret
!= -ENOSYS
)
133 ret
= clk_free(&clk
[i
]);
134 if (ret
&& ret
!= -ENOSYS
)
141 #endif /* OF_CONTROL */
143 int clk_request(struct udevice
*dev
, struct clk
*clk
)
145 struct clk_ops
*ops
= clk_dev_ops(dev
);
147 debug("%s(dev=%p, clk=%p)\n", __func__
, dev
, clk
);
154 return ops
->request(clk
);
157 int clk_free(struct clk
*clk
)
159 struct clk_ops
*ops
= clk_dev_ops(clk
->dev
);
161 debug("%s(clk=%p)\n", __func__
, clk
);
166 return ops
->free(clk
);
169 ulong
clk_get_rate(struct clk
*clk
)
171 struct clk_ops
*ops
= clk_dev_ops(clk
->dev
);
173 debug("%s(clk=%p)\n", __func__
, clk
);
178 return ops
->get_rate(clk
);
181 ulong
clk_set_rate(struct clk
*clk
, ulong rate
)
183 struct clk_ops
*ops
= clk_dev_ops(clk
->dev
);
185 debug("%s(clk=%p, rate=%lu)\n", __func__
, clk
, rate
);
190 return ops
->set_rate(clk
, rate
);
193 int clk_enable(struct clk
*clk
)
195 struct clk_ops
*ops
= clk_dev_ops(clk
->dev
);
197 debug("%s(clk=%p)\n", __func__
, clk
);
202 return ops
->enable(clk
);
205 int clk_disable(struct clk
*clk
)
207 struct clk_ops
*ops
= clk_dev_ops(clk
->dev
);
209 debug("%s(clk=%p)\n", __func__
, clk
);
214 return ops
->disable(clk
);
217 UCLASS_DRIVER(clk
) = {