2 * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <clk-uclass.h>
11 struct clk_fixed_rate
{
12 unsigned long fixed_rate
;
15 #define to_clk_fixed_rate(dev) ((struct clk_fixed_rate *)dev_get_platdata(dev))
17 static ulong
clk_fixed_rate_get_rate(struct clk
*clk
)
22 return to_clk_fixed_rate(clk
->dev
)->fixed_rate
;
25 const struct clk_ops clk_fixed_rate_ops
= {
26 .get_rate
= clk_fixed_rate_get_rate
,
29 static int clk_fixed_rate_ofdata_to_platdata(struct udevice
*dev
)
31 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
32 to_clk_fixed_rate(dev
)->fixed_rate
=
33 dev_read_u32_default(dev
, "clock-frequency", 0);
39 static const struct udevice_id clk_fixed_rate_match
[] = {
41 .compatible
= "fixed-clock",
46 U_BOOT_DRIVER(clk_fixed_rate
) = {
47 .name
= "fixed_rate_clock",
49 .of_match
= clk_fixed_rate_match
,
50 .ofdata_to_platdata
= clk_fixed_rate_ofdata_to_platdata
,
51 .platdata_auto_alloc_size
= sizeof(struct clk_fixed_rate
),
52 .ops
= &clk_fixed_rate_ops
,