]>
git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/fpga/xilinx.c
2 * (C) Copyright 2012-2013, Xilinx, Michal Simek
5 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
6 * Keith Outwater, keith_outwater@mvis.com
8 * SPDX-License-Identifier: GPL-2.0+
22 /* Local Static Functions */
23 static int xilinx_validate(xilinx_desc
*desc
, char *fn
);
25 /* ------------------------------------------------------------------------- */
27 int fpga_loadbitstream(int devnum
, char *fpgadata
, size_t size
,
28 bitstream_type bstype
)
31 unsigned int swapsize
;
32 unsigned char *dataptr
;
34 const fpga_desc
*desc
;
37 dataptr
= (unsigned char *)fpgadata
;
38 /* Find out fpga_description */
39 desc
= fpga_validate(devnum
, dataptr
, 0, (char *)__func__
);
40 /* Assign xilinx device description */
41 xdesc
= desc
->devdesc
;
43 /* skip the first bytes of the bitsteam, their meaning is unknown */
44 length
= (*dataptr
<< 8) + *(dataptr
+ 1);
48 /* get design name (identifier, length, string) */
49 length
= (*dataptr
<< 8) + *(dataptr
+ 1);
51 if (*dataptr
++ != 0x61) {
52 debug("%s: Design name id not recognized in bitstream\n",
57 length
= (*dataptr
<< 8) + *(dataptr
+ 1);
59 printf(" design filename = \"%s\"\n", dataptr
);
62 /* get part number (identifier, length, string) */
63 if (*dataptr
++ != 0x62) {
64 printf("%s: Part number id not recognized in bitstream\n",
69 length
= (*dataptr
<< 8) + *(dataptr
+ 1);
73 i
= (ulong
)strstr((char *)dataptr
, xdesc
->name
);
75 printf("%s: Wrong bitstream ID for this device\n",
77 printf("%s: Bitstream ID %s, current device ID %d/%s\n",
78 __func__
, dataptr
, devnum
, xdesc
->name
);
82 printf("%s: Please fill correct device ID to xilinx_desc\n",
85 printf(" part number = \"%s\"\n", dataptr
);
88 /* get date (identifier, length, string) */
89 if (*dataptr
++ != 0x63) {
90 printf("%s: Date identifier not recognized in bitstream\n",
95 length
= (*dataptr
<< 8) + *(dataptr
+1);
97 printf(" date = \"%s\"\n", dataptr
);
100 /* get time (identifier, length, string) */
101 if (*dataptr
++ != 0x64) {
102 printf("%s: Time identifier not recognized in bitstream\n",
107 length
= (*dataptr
<< 8) + *(dataptr
+1);
109 printf(" time = \"%s\"\n", dataptr
);
112 /* get fpga data length (identifier, length) */
113 if (*dataptr
++ != 0x65) {
114 printf("%s: Data length id not recognized in bitstream\n",
118 swapsize
= ((unsigned int) *dataptr
<< 24) +
119 ((unsigned int) *(dataptr
+ 1) << 16) +
120 ((unsigned int) *(dataptr
+ 2) << 8) +
121 ((unsigned int) *(dataptr
+ 3));
123 printf(" bytes in bitstream = %d\n", swapsize
);
125 return fpga_load(devnum
, dataptr
, swapsize
, bstype
);
128 int xilinx_load(xilinx_desc
*desc
, const void *buf
, size_t bsize
,
129 bitstream_type bstype
)
131 if (!xilinx_validate (desc
, (char *)__FUNCTION__
)) {
132 printf ("%s: Invalid device descriptor\n", __FUNCTION__
);
136 if (!desc
->operations
|| !desc
->operations
->load
) {
137 printf("%s: Missing load operation\n", __func__
);
141 return desc
->operations
->load(desc
, buf
, bsize
, bstype
);
144 #if defined(CONFIG_CMD_FPGA_LOADFS)
145 int xilinx_loadfs(xilinx_desc
*desc
, const void *buf
, size_t bsize
,
146 fpga_fs_info
*fpga_fsinfo
)
148 if (!xilinx_validate(desc
, (char *)__func__
)) {
149 printf("%s: Invalid device descriptor\n", __func__
);
153 if (!desc
->operations
|| !desc
->operations
->loadfs
) {
154 printf("%s: Missing loadfs operation\n", __func__
);
158 return desc
->operations
->loadfs(desc
, buf
, bsize
, fpga_fsinfo
);
162 int xilinx_dump(xilinx_desc
*desc
, const void *buf
, size_t bsize
)
164 if (!xilinx_validate (desc
, (char *)__FUNCTION__
)) {
165 printf ("%s: Invalid device descriptor\n", __FUNCTION__
);
169 if (!desc
->operations
|| !desc
->operations
->dump
) {
170 printf("%s: Missing dump operation\n", __func__
);
174 return desc
->operations
->dump(desc
, buf
, bsize
);
177 int xilinx_info(xilinx_desc
*desc
)
179 int ret_val
= FPGA_FAIL
;
181 if (xilinx_validate (desc
, (char *)__FUNCTION__
)) {
182 printf ("Family: \t");
183 switch (desc
->family
) {
184 case xilinx_spartan2
:
185 printf ("Spartan-II\n");
187 case xilinx_spartan3
:
188 printf ("Spartan-III\n");
191 printf ("Virtex-II\n");
197 printf("ZynqMP PL\n");
199 /* Add new family types here */
201 printf ("Unknown family type, %d\n", desc
->family
);
204 printf ("Interface type:\t");
205 switch (desc
->iface
) {
207 printf ("Slave Serial\n");
209 case master_serial
: /* Not used */
210 printf ("Master Serial\n");
213 printf ("Slave Parallel\n");
215 case jtag_mode
: /* Not used */
216 printf ("JTAG Mode\n");
218 case slave_selectmap
:
219 printf ("Slave SelectMap Mode\n");
221 case master_selectmap
:
222 printf ("Master SelectMap Mode\n");
225 printf("Device configuration interface (Zynq)\n");
228 printf("csu_dma configuration interface (ZynqMP)\n");
230 /* Add new interface types here */
232 printf ("Unsupported interface type, %d\n", desc
->iface
);
235 printf("Device Size: \t%zd bytes\n"
236 "Cookie: \t0x%x (%d)\n",
237 desc
->size
, desc
->cookie
, desc
->cookie
);
239 printf("Device name: \t%s\n", desc
->name
);
242 printf ("Device Function Table @ 0x%p\n", desc
->iface_fns
);
244 printf ("No Device Function Table.\n");
246 if (desc
->operations
&& desc
->operations
->info
)
247 desc
->operations
->info(desc
);
249 ret_val
= FPGA_SUCCESS
;
251 printf ("%s: Invalid device descriptor\n", __FUNCTION__
);
257 /* ------------------------------------------------------------------------- */
259 static int xilinx_validate(xilinx_desc
*desc
, char *fn
)
264 if ((desc
->family
> min_xilinx_type
) &&
265 (desc
->family
< max_xilinx_type
)) {
266 if ((desc
->iface
> min_xilinx_iface_type
) &&
267 (desc
->iface
< max_xilinx_iface_type
)) {
271 printf ("%s: NULL part size\n", fn
);
273 printf ("%s: Invalid Interface type, %d\n",
276 printf ("%s: Invalid family type, %d\n", fn
, desc
->family
);
278 printf ("%s: NULL descriptor!\n", fn
);