drivers/i2c/adi_i2c.c

   1 /*
   2  * i2c.c - driver for ADI TWI/I2C
   3  *
   4  * Copyright (c) 2006-2014 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <common.h>
  10 #include <console.h>
  11 #include <i2c.h>
  12
  13 #include <asm/clock.h>
  14 #include <asm/twi.h>
  15 #include <asm/io.h>
  16
  17 static struct twi_regs *i2c_get_base(struct i2c_adapter *adap);
  18
  19 /* Every register is 32bit aligned, but only 16bits in size */
  20 #define ureg(name) u16 name; u16 __pad_##name;
  21 struct twi_regs {
  22         ureg(clkdiv);
  23         ureg(control);
  24         ureg(slave_ctl);
  25         ureg(slave_stat);
  26         ureg(slave_addr);
  27         ureg(master_ctl);
  28         ureg(master_stat);
  29         ureg(master_addr);
  30         ureg(int_stat);
  31         ureg(int_mask);
  32         ureg(fifo_ctl);
  33         ureg(fifo_stat);
  34         char __pad[0x50];
  35         ureg(xmt_data8);
  36         ureg(xmt_data16);
  37         ureg(rcv_data8);
  38         ureg(rcv_data16);
  39 };
  40 #undef ureg
  41
  42 #ifdef TWI_CLKDIV
  43 #define TWI0_CLKDIV TWI_CLKDIV
  44 # ifdef CONFIG_SYS_MAX_I2C_BUS
  45 # undef CONFIG_SYS_MAX_I2C_BUS
  46 # endif
  47 #define CONFIG_SYS_MAX_I2C_BUS 1
  48 #endif
  49
  50 /*
  51  * The way speed is changed into duty often results in integer truncation
  52  * with 50% duty, so we'll force rounding up to the next duty by adding 1
  53  * to the max.  In practice this will get us a speed of something like
  54  * 385 KHz.  The other limit is easy to handle as it is only 8 bits.
  55  */
  56 #define I2C_SPEED_MAX             400000
  57 #define I2C_SPEED_TO_DUTY(speed)  (5000000 / (speed))
  58 #define I2C_DUTY_MAX              (I2C_SPEED_TO_DUTY(I2C_SPEED_MAX) + 1)
  59 #define I2C_DUTY_MIN              0xff  /* 8 bit limited */
  60 #define SYS_I2C_DUTY              I2C_SPEED_TO_DUTY(CONFIG_SYS_I2C_SPEED)
  61 /* Note: duty is inverse of speed, so the comparisons below are correct */
  62 #if SYS_I2C_DUTY < I2C_DUTY_MAX || SYS_I2C_DUTY > I2C_DUTY_MIN
  63 # error "The I2C hardware can only operate 20KHz - 400KHz"
  64 #endif
  65
  66 /* All transfers are described by this data structure */
  67 struct adi_i2c_msg {
  68         u8 flags;
  69 #define I2C_M_COMBO             0x4
  70 #define I2C_M_STOP              0x2
  71 #define I2C_M_READ              0x1
  72         int len;                /* msg length */
  73         u8 *buf;                /* pointer to msg data */
  74         int alen;               /* addr length */
  75         u8 *abuf;               /* addr buffer */
  76 };
  77
  78 /* Allow msec timeout per ~byte transfer */
  79 #define I2C_TIMEOUT 10
  80
  81 /**
  82  * wait_for_completion - manage the actual i2c transfer
  83  *      @msg: the i2c msg
  84  */
  85 static int wait_for_completion(struct twi_regs *twi, struct adi_i2c_msg *msg)
  86 {
  87         u16 int_stat, ctl;
  88         ulong timebase = get_timer(0);
  89
  90         do {
  91                 int_stat = readw(&twi->int_stat);
  92
  93                 if (int_stat & XMTSERV) {
  94                         writew(XMTSERV, &twi->int_stat);
  95                         if (msg->alen) {
  96                                 writew(*(msg->abuf++), &twi->xmt_data8);
  97                                 --msg->alen;
  98                         } else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
  99                                 writew(*(msg->buf++), &twi->xmt_data8);
 100                                 --msg->len;
 101                         } else {
 102                                 ctl = readw(&twi->master_ctl);
 103                                 if (msg->flags & I2C_M_COMBO)
 104                                         writew(ctl | RSTART | MDIR,
 105                                                         &twi->master_ctl);
 106                                 else
 107                                         writew(ctl | STOP, &twi->master_ctl);
 108                         }
 109                 }
 110                 if (int_stat & RCVSERV) {
 111                         writew(RCVSERV, &twi->int_stat);
 112                         if (msg->len) {
 113                                 *(msg->buf++) = readw(&twi->rcv_data8);
 114                                 --msg->len;
 115                         } else if (msg->flags & I2C_M_STOP) {
 116                                 ctl = readw(&twi->master_ctl);
 117                                 writew(ctl | STOP, &twi->master_ctl);
 118                         }
 119                 }
 120                 if (int_stat & MERR) {
 121                         writew(MERR, &twi->int_stat);
 122                         return msg->len;
 123                 }
 124                 if (int_stat & MCOMP) {
 125                         writew(MCOMP, &twi->int_stat);
 126                         if (msg->flags & I2C_M_COMBO && msg->len) {
 127                                 ctl = readw(&twi->master_ctl);
 128                                 ctl = (ctl & ~RSTART) |
 129                                         (min(msg->len, 0xff) << 6) | MEN | MDIR;
 130                                 writew(ctl, &twi->master_ctl);
 131                         } else
 132                                 break;
 133                 }
 134
 135                 /* If we were able to do something, reset timeout */
 136                 if (int_stat)
 137                         timebase = get_timer(0);
 138
 139         } while (get_timer(timebase) < I2C_TIMEOUT);
 140
 141         return msg->len;
 142 }
 143
 144 static int i2c_transfer(struct i2c_adapter *adap, uint8_t chip, uint addr,
 145                         int alen, uint8_t *buffer, int len, uint8_t flags)
 146 {
 147         struct twi_regs *twi = i2c_get_base(adap);
 148         int ret;
 149         u16 ctl;
 150         uchar addr_buffer[] = {
 151                 (addr >>  0),
 152                 (addr >>  8),
 153                 (addr >> 16),
 154         };
 155         struct adi_i2c_msg msg = {
 156                 .flags = flags | (len >= 0xff ? I2C_M_STOP : 0),
 157                 .buf   = buffer,
 158                 .len   = len,
 159                 .abuf  = addr_buffer,
 160                 .alen  = alen,
 161         };
 162
 163         /* wait for things to settle */
 164         while (readw(&twi->master_stat) & BUSBUSY)
 165                 if (ctrlc())
 166                         return 1;
 167
 168         /* Set Transmit device address */
 169         writew(chip, &twi->master_addr);
 170
 171         /* Clear the FIFO before starting things */
 172         writew(XMTFLUSH | RCVFLUSH, &twi->fifo_ctl);
 173         writew(0, &twi->fifo_ctl);
 174
 175         /* prime the pump */
 176         if (msg.alen) {
 177                 len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
 178                 writew(*(msg.abuf++), &twi->xmt_data8);
 179                 --msg.alen;
 180         } else if (!(msg.flags & I2C_M_READ) && msg.len) {
 181                 writew(*(msg.buf++), &twi->xmt_data8);
 182                 --msg.len;
 183         }
 184
 185         /* clear int stat */
 186         writew(-1, &twi->master_stat);
 187         writew(-1, &twi->int_stat);
 188         writew(0, &twi->int_mask);
 189
 190         /* Master enable */
 191         ctl = readw(&twi->master_ctl);
 192         ctl = (ctl & FAST) | (min(len, 0xff) << 6) | MEN |
 193                 ((msg.flags & I2C_M_READ) ? MDIR : 0);
 194         writew(ctl, &twi->master_ctl);
 195
 196         /* process the rest */
 197         ret = wait_for_completion(twi, &msg);
 198
 199         if (ret) {
 200                 ctl = readw(&twi->master_ctl) & ~MEN;
 201                 writew(ctl, &twi->master_ctl);
 202                 ctl = readw(&twi->control) & ~TWI_ENA;
 203                 writew(ctl, &twi->control);
 204                 ctl = readw(&twi->control) | TWI_ENA;
 205                 writew(ctl, &twi->control);
 206         }
 207
 208         return ret;
 209 }
 210
 211 static uint adi_i2c_setspeed(struct i2c_adapter *adap, uint speed)
 212 {
 213         struct twi_regs *twi = i2c_get_base(adap);
 214         u16 clkdiv = I2C_SPEED_TO_DUTY(speed);
 215
 216         /* Set TWI interface clock */
 217         if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN)
 218                 return -1;
 219         clkdiv = (clkdiv << 8) | (clkdiv & 0xff);
 220         writew(clkdiv, &twi->clkdiv);
 221
 222         /* Don't turn it on */
 223         writew(speed > 100000 ? FAST : 0, &twi->master_ctl);
 224
 225         return 0;
 226 }
 227
 228 static void adi_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
 229 {
 230         struct twi_regs *twi = i2c_get_base(adap);
 231         u16 prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
 232
 233         /* Set TWI internal clock as 10MHz */
 234         writew(prescale, &twi->control);
 235
 236         /* Set TWI interface clock as specified */
 237         i2c_set_bus_speed(speed);
 238
 239         /* Enable it */
 240         writew(TWI_ENA | prescale, &twi->control);
 241 }
 242
 243 static int adi_i2c_read(struct i2c_adapter *adap, uint8_t chip,
 244                         uint addr, int alen, uint8_t *buffer, int len)
 245 {
 246         return i2c_transfer(adap, chip, addr, alen, buffer,
 247                         len, alen ? I2C_M_COMBO : I2C_M_READ);
 248 }
 249
 250 static int adi_i2c_write(struct i2c_adapter *adap, uint8_t chip,
 251                         uint addr, int alen, uint8_t *buffer, int len)
 252 {
 253         return i2c_transfer(adap, chip, addr, alen, buffer, len, 0);
 254 }
 255
 256 static int adi_i2c_probe(struct i2c_adapter *adap, uint8_t chip)
 257 {
 258         u8 byte;
 259         return adi_i2c_read(adap, chip, 0, 0, &byte, 1);
 260 }
 261
 262 static struct twi_regs *i2c_get_base(struct i2c_adapter *adap)
 263 {
 264         switch (adap->hwadapnr) {
 265 #if CONFIG_SYS_MAX_I2C_BUS > 2
 266         case 2:
 267                 return (struct twi_regs *)TWI2_CLKDIV;
 268 #endif
 269 #if CONFIG_SYS_MAX_I2C_BUS > 1
 270         case 1:
 271                 return (struct twi_regs *)TWI1_CLKDIV;
 272 #endif
 273         case 0:
 274                 return (struct twi_regs *)TWI0_CLKDIV;
 275
 276         default:
 277                 printf("wrong hwadapnr: %d\n", adap->hwadapnr);
 278         }
 279
 280         return NULL;
 281 }
 282
 283 U_BOOT_I2C_ADAP_COMPLETE(adi_i2c0, adi_i2c_init, adi_i2c_probe,
 284                          adi_i2c_read, adi_i2c_write,
 285                          adi_i2c_setspeed,
 286                          CONFIG_SYS_I2C_SPEED,
 287                          0,
 288                          0)
 289
 290 #if CONFIG_SYS_MAX_I2C_BUS > 1
 291 U_BOOT_I2C_ADAP_COMPLETE(adi_i2c1, adi_i2c_init, adi_i2c_probe,
 292                          adi_i2c_read, adi_i2c_write,
 293                          adi_i2c_setspeed,
 294                          CONFIG_SYS_I2C_SPEED,
 295                          0,
 296                          1)
 297 #endif
 298
 299 #if CONFIG_SYS_MAX_I2C_BUS > 2
 300 U_BOOT_I2C_ADAP_COMPLETE(adi_i2c2, adi_i2c_init, adi_i2c_probe,
 301                          adi_i2c_read, adi_i2c_write,
 302                          adi_i2c_setspeed,
 303                          CONFIG_SYS_I2C_SPEED,
 304                          0,
 305                          2)
 306 #endif