drivers/i2c/i2c-uniphier.c

   1 /*
   2  * Copyright (C) 2014      Panasonic Corporation
   3  * Copyright (C) 2015-2016 Socionext Inc.
   4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #include <common.h>
  10 #include <linux/types.h>
  11 #include <linux/io.h>
  12 #include <linux/sizes.h>
  13 #include <asm/errno.h>
  14 #include <dm/device.h>
  15 #include <dm/root.h>
  16 #include <i2c.h>
  17 #include <fdtdec.h>
  18
  19 struct uniphier_i2c_regs {
  20         u32 dtrm;                       /* data transmission */
  21 #define I2C_DTRM_STA    (1 << 10)
  22 #define I2C_DTRM_STO    (1 << 9)
  23 #define I2C_DTRM_NACK   (1 << 8)
  24 #define I2C_DTRM_RD     (1 << 0)
  25         u32 drec;                       /* data reception */
  26 #define I2C_DREC_STS    (1 << 12)
  27 #define I2C_DREC_LRB    (1 << 11)
  28 #define I2C_DREC_LAB    (1 << 9)
  29         u32 myad;                       /* slave address */
  30         u32 clk;                        /* clock frequency control */
  31         u32 brst;                       /* bus reset */
  32 #define I2C_BRST_FOEN   (1 << 1)
  33 #define I2C_BRST_BRST   (1 << 0)
  34         u32 hold;                       /* hold time control */
  35         u32 bsts;                       /* bus status monitor */
  36         u32 noise;                      /* noise filter control */
  37         u32 setup;                      /* setup time control */
  38 };
  39
  40 #define IOBUS_FREQ      100000000
  41
  42 struct uniphier_i2c_dev {
  43         struct uniphier_i2c_regs __iomem *regs; /* register base */
  44         unsigned long input_clk;        /* master clock (Hz) */
  45         unsigned long wait_us;          /* wait for every byte transfer (us) */
  46 };
  47
  48 static int uniphier_i2c_probe(struct udevice *dev)
  49 {
  50         fdt_addr_t addr;
  51         struct uniphier_i2c_dev *priv = dev_get_priv(dev);
  52
  53         addr = dev_get_addr(dev);
  54         if (addr == FDT_ADDR_T_NONE)
  55                 return -EINVAL;
  56
  57         priv->regs = devm_ioremap(dev, addr, SZ_64);
  58         if (!priv->regs)
  59                 return -ENOMEM;
  60
  61         priv->input_clk = IOBUS_FREQ;
  62
  63         /* deassert reset */
  64         writel(0x3, &priv->regs->brst);
  65
  66         return 0;
  67 }
  68
  69 static int send_and_recv_byte(struct uniphier_i2c_dev *dev, u32 dtrm)
  70 {
  71         writel(dtrm, &dev->regs->dtrm);
  72
  73         /*
  74          * This controller only provides interruption to inform the completion
  75          * of each byte transfer.  (No status register to poll it.)
  76          * Unfortunately, U-Boot does not have a good support of interrupt.
  77          * Wait for a while.
  78          */
  79         udelay(dev->wait_us);
  80
  81         return readl(&dev->regs->drec);
  82 }
  83
  84 static int send_byte(struct uniphier_i2c_dev *dev, u32 dtrm, bool *stop)
  85 {
  86         int ret = 0;
  87         u32 drec;
  88
  89         drec = send_and_recv_byte(dev, dtrm);
  90
  91         if (drec & I2C_DREC_LAB) {
  92                 debug("uniphier_i2c: bus arbitration failed\n");
  93                 *stop = false;
  94                 ret = -EREMOTEIO;
  95         }
  96         if (drec & I2C_DREC_LRB) {
  97                 debug("uniphier_i2c: slave did not return ACK\n");
  98                 ret = -EREMOTEIO;
  99         }
 100         return ret;
 101 }
 102
 103 static int uniphier_i2c_transmit(struct uniphier_i2c_dev *dev, uint addr,
 104                                  uint len, const u8 *buf, bool *stop)
 105 {
 106         int ret;
 107
 108         debug("%s: addr = %x, len = %d\n", __func__, addr, len);
 109
 110         ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK | addr << 1, stop);
 111         if (ret < 0)
 112                 goto fail;
 113
 114         while (len--) {
 115                 ret = send_byte(dev, I2C_DTRM_NACK | *buf++, stop);
 116                 if (ret < 0)
 117                         goto fail;
 118         }
 119
 120 fail:
 121         if (*stop)
 122                 writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm);
 123
 124         return ret;
 125 }
 126
 127 static int uniphier_i2c_receive(struct uniphier_i2c_dev *dev, uint addr,
 128                                 uint len, u8 *buf, bool *stop)
 129 {
 130         int ret;
 131
 132         debug("%s: addr = %x, len = %d\n", __func__, addr, len);
 133
 134         ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK |
 135                         I2C_DTRM_RD | addr << 1, stop);
 136         if (ret < 0)
 137                 goto fail;
 138
 139         while (len--)
 140                 *buf++ = send_and_recv_byte(dev, len ? 0 : I2C_DTRM_NACK);
 141
 142 fail:
 143         if (*stop)
 144                 writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm);
 145
 146         return ret;
 147 }
 148
 149 static int uniphier_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
 150                              int nmsgs)
 151 {
 152         int ret = 0;
 153         struct uniphier_i2c_dev *dev = dev_get_priv(bus);
 154         bool stop;
 155
 156         for (; nmsgs > 0; nmsgs--, msg++) {
 157                 /* If next message is read, skip the stop condition */
 158                 stop = nmsgs > 1 && msg[1].flags & I2C_M_RD ? false : true;
 159
 160                 if (msg->flags & I2C_M_RD)
 161                         ret = uniphier_i2c_receive(dev, msg->addr, msg->len,
 162                                                    msg->buf, &stop);
 163                 else
 164                         ret = uniphier_i2c_transmit(dev, msg->addr, msg->len,
 165                                                     msg->buf, &stop);
 166
 167                 if (ret < 0)
 168                         break;
 169         }
 170
 171         return ret;
 172 }
 173
 174 static int uniphier_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
 175 {
 176         struct uniphier_i2c_dev *priv = dev_get_priv(bus);
 177
 178         /* max supported frequency is 400 kHz */
 179         if (speed > 400000)
 180                 return -EINVAL;
 181
 182         /* bus reset: make sure the bus is idle when change the frequency */
 183         writel(0x1, &priv->regs->brst);
 184
 185         writel((priv->input_clk / speed / 2 << 16) | (priv->input_clk / speed),
 186                &priv->regs->clk);
 187
 188         writel(0x3, &priv->regs->brst);
 189
 190         /*
 191          * Theoretically, each byte can be transferred in
 192          * 1000000 * 9 / speed usec.  For safety, wait more than double.
 193          */
 194         priv->wait_us = 20000000 / speed;
 195
 196         return 0;
 197 }
 198
 199
 200 static const struct dm_i2c_ops uniphier_i2c_ops = {
 201         .xfer = uniphier_i2c_xfer,
 202         .set_bus_speed = uniphier_i2c_set_bus_speed,
 203 };
 204
 205 static const struct udevice_id uniphier_i2c_of_match[] = {
 206         { .compatible = "socionext,uniphier-i2c" },
 207         { /* sentinel */ }
 208 };
 209
 210 U_BOOT_DRIVER(uniphier_i2c) = {
 211         .name = "uniphier-i2c",
 212         .id = UCLASS_I2C,
 213         .of_match = uniphier_i2c_of_match,
 214         .probe = uniphier_i2c_probe,
 215         .priv_auto_alloc_size = sizeof(struct uniphier_i2c_dev),
 216         .ops = &uniphier_i2c_ops,
 217 };