2 * (C) Copyright 2004 Tundra Semiconductor Corp.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #if defined(CONFIG_CMD_I2C)
32 #define I2C_DELAY 100000
36 #define DPRINT(x) printf (x)
41 /* All functions assume that Tsi108 I2C block is the only master on the bus */
42 /* I2C read helper function */
44 static int i2c_read_byte (
45 uint i2c_chan
, /* I2C channel number: 0 - main, 1 - SDC SPD */
46 uchar chip_addr
,/* I2C device address on the bus */
47 uint byte_addr
, /* Byte address within I2C device */
48 uchar
* buffer
/* pointer to data buffer */
52 u32 to_count
= I2C_DELAY
;
53 u32 op_status
= TSI108_I2C_TIMEOUT_ERR
;
54 u32 chan_offset
= TSI108_I2C_OFFSET
;
56 DPRINT (("I2C read_byte() %d 0x%02x 0x%02x\n",
57 i2c_chan
, chip_addr
, byte_addr
));
60 chan_offset
= TSI108_I2C_SDRAM_OFFSET
;
62 /* Check if I2C operation is in progress */
63 temp
= *(u32
*) (CONFIG_SYS_TSI108_CSR_BASE
+ chan_offset
+ I2C_CNTRL2
);
65 if (0 == (temp
& (I2C_CNTRL2_RD_STATUS
| I2C_CNTRL2_WR_STATUS
|
67 /* Set device address and operation (read = 0) */
68 temp
= (byte_addr
<< 16) | ((chip_addr
& 0x07) << 8) |
69 ((chip_addr
>> 3) & 0x0F);
70 *(u32
*) (CONFIG_SYS_TSI108_CSR_BASE
+ chan_offset
+ I2C_CNTRL1
) =
73 /* Issue the read command
74 * (at this moment all other parameters are 0
75 * (size = 1 byte, lane = 0)
78 *(u32
*) (CONFIG_SYS_TSI108_CSR_BASE
+ chan_offset
+ I2C_CNTRL2
) =
81 /* Wait until operation completed */
83 /* Read I2C operation status */
84 temp
= *(u32
*) (CONFIG_SYS_TSI108_CSR_BASE
+ chan_offset
+ I2C_CNTRL2
);
86 if (0 == (temp
& (I2C_CNTRL2_RD_STATUS
| I2C_CNTRL2_START
))) {
88 (I2C_CNTRL2_I2C_CFGERR
|
89 I2C_CNTRL2_I2C_TO_ERR
))
91 op_status
= TSI108_I2C_SUCCESS
;
93 temp
= *(u32
*) (CONFIG_SYS_TSI108_CSR_BASE
+
97 *buffer
= (u8
) (temp
& 0xFF);
100 op_status
= TSI108_I2C_IF_ERROR
;
102 DPRINT (("I2C HW error reported: 0x%02x\n", temp
));
107 } while (to_count
--);
109 op_status
= TSI108_I2C_IF_BUSY
;
111 DPRINT (("I2C Transaction start failed: 0x%02x\n", temp
));
114 DPRINT (("I2C read_byte() status: 0x%02x\n", op_status
));
119 * I2C Read interface as defined in "include/i2c.h" :
120 * chip_addr: I2C chip address, range 0..127
121 * (to read from SPD channel EEPROM use (0xD0 ... 0xD7)
122 * NOTE: The bit 7 in the chip_addr serves as a channel select.
123 * This hack is for enabling "isdram" command on Tsi108 boards
124 * without changes to common code. Used for I2C reads only.
125 * byte_addr: Memory or register address within the chip
126 * alen: Number of bytes to use for addr (typically 1, 2 for larger
127 * memories, 0 for register type devices with only one
129 * buffer: Pointer to destination buffer for data to be read
130 * len: How many bytes to read
132 * Returns: 0 on success, not 0 on failure
135 int i2c_read (uchar chip_addr
, uint byte_addr
, int alen
,
136 uchar
* buffer
, int len
)
138 u32 op_status
= TSI108_I2C_PARAM_ERR
;
141 /* Hack to support second (SPD) I2C controller (SPD EEPROM read only).*/
142 if (0xD0 == (chip_addr
& ~0x07)) {
146 /* Check for valid I2C address */
147 if (chip_addr
<= 0x7F && (byte_addr
+ len
) <= (0x01 << (alen
* 8))) {
149 op_status
= i2c_read_byte(i2c_if
, chip_addr
, byte_addr
++, buffer
++);
151 if (TSI108_I2C_SUCCESS
!= op_status
) {
152 DPRINT (("I2C read_byte() failed: 0x%02x (%d left)\n", op_status
, len
));
159 DPRINT (("I2C read() status: 0x%02x\n", op_status
));
163 /* I2C write helper function */
165 static int i2c_write_byte (uchar chip_addr
,/* I2C device address on the bus */
166 uint byte_addr
, /* Byte address within I2C device */
167 uchar
* buffer
/* pointer to data buffer */
171 u32 to_count
= I2C_DELAY
;
172 u32 op_status
= TSI108_I2C_TIMEOUT_ERR
;
174 /* Check if I2C operation is in progress */
175 temp
= *(u32
*) (CONFIG_SYS_TSI108_CSR_BASE
+ TSI108_I2C_OFFSET
+ I2C_CNTRL2
);
177 if (0 == (temp
& (I2C_CNTRL2_RD_STATUS
| I2C_CNTRL2_WR_STATUS
| I2C_CNTRL2_START
))) {
178 /* Place data into the I2C Tx Register */
179 *(u32
*) (CONFIG_SYS_TSI108_CSR_BASE
+ TSI108_I2C_OFFSET
+
180 I2C_TX_DATA
) = (u32
) * buffer
;
182 /* Set device address and operation */
184 I2C_CNTRL1_I2CWRITE
| (byte_addr
<< 16) |
185 ((chip_addr
& 0x07) << 8) | ((chip_addr
>> 3) & 0x0F);
186 *(u32
*) (CONFIG_SYS_TSI108_CSR_BASE
+ TSI108_I2C_OFFSET
+
189 /* Issue the write command (at this moment all other parameters
190 * are 0 (size = 1 byte, lane = 0)
193 *(u32
*) (CONFIG_SYS_TSI108_CSR_BASE
+ TSI108_I2C_OFFSET
+
194 I2C_CNTRL2
) = (I2C_CNTRL2_START
);
196 op_status
= TSI108_I2C_TIMEOUT_ERR
;
198 /* Wait until operation completed */
200 /* Read I2C operation status */
201 temp
= *(u32
*) (CONFIG_SYS_TSI108_CSR_BASE
+ TSI108_I2C_OFFSET
+ I2C_CNTRL2
);
203 if (0 == (temp
& (I2C_CNTRL2_WR_STATUS
| I2C_CNTRL2_START
))) {
205 (I2C_CNTRL2_I2C_CFGERR
|
206 I2C_CNTRL2_I2C_TO_ERR
))) {
207 op_status
= TSI108_I2C_SUCCESS
;
209 /* report detected HW error */
210 op_status
= TSI108_I2C_IF_ERROR
;
212 DPRINT (("I2C HW error reported: 0x%02x\n", temp
));
218 } while (to_count
--);
220 op_status
= TSI108_I2C_IF_BUSY
;
222 DPRINT (("I2C Transaction start failed: 0x%02x\n", temp
));
229 * I2C Write interface as defined in "include/i2c.h" :
230 * chip_addr: I2C chip address, range 0..127
231 * byte_addr: Memory or register address within the chip
232 * alen: Number of bytes to use for addr (typically 1, 2 for larger
233 * memories, 0 for register type devices with only one
235 * buffer: Pointer to data to be written
236 * len: How many bytes to write
238 * Returns: 0 on success, not 0 on failure
241 int i2c_write (uchar chip_addr
, uint byte_addr
, int alen
, uchar
* buffer
,
244 u32 op_status
= TSI108_I2C_PARAM_ERR
;
246 /* Check for valid I2C address */
247 if (chip_addr
<= 0x7F && (byte_addr
+ len
) <= (0x01 << (alen
* 8))) {
250 i2c_write_byte (chip_addr
, byte_addr
++, buffer
++);
252 if (TSI108_I2C_SUCCESS
!= op_status
) {
253 DPRINT (("I2C write_byte() failed: 0x%02x (%d left)\n", op_status
, len
));
264 * I2C interface function as defined in "include/i2c.h".
265 * Probe the given I2C chip address by reading single byte from offset 0.
266 * Returns 0 if a chip responded, not 0 on failure.
269 int i2c_probe (uchar chip
)
274 * Try to read the first location of the chip.
275 * The Tsi108 HW doesn't support sending just the chip address
276 * and checkong for an <ACK> back.
278 return i2c_read (chip
, 0, 1, (uchar
*)&tmp
, 1);