2 * Copyright 2008 Extreme Engineering Solutions, Inc.
4 * SPDX-License-Identifier: GPL-2.0
8 * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
9 * and 4 programmable non-volatile GPIO pins.
17 /* Default to an address that hopefully won't corrupt other i2c devices */
18 #ifndef CONFIG_SYS_I2C_DS4510_ADDR
19 #define CONFIG_SYS_I2C_DS4510_ADDR (~0)
36 * Write to DS4510, taking page boundaries into account
38 int ds4510_mem_write(uint8_t chip
, int offset
, uint8_t *buf
, int count
)
44 wrlen
= DS4510_EEPROM_PAGE_SIZE
-
45 DS4510_EEPROM_PAGE_OFFSET(offset
);
48 if (i2c_write(chip
, offset
, 1, &buf
[i
], wrlen
))
52 * This delay isn't needed for SRAM writes but shouldn't delay
53 * things too much, so do it unconditionally for simplicity
55 udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS
* 1000);
65 * General read from DS4510
67 int ds4510_mem_read(uint8_t chip
, int offset
, uint8_t *buf
, int count
)
69 return i2c_read(chip
, offset
, 1, buf
, count
);
73 * Write SEE bit in config register.
74 * nv = 0 - Writes to SEEPROM registers behave like EEPROM
75 * nv = 1 - Writes to SEEPROM registers behave like SRAM
77 int ds4510_see_write(uint8_t chip
, uint8_t nv
)
81 if (i2c_read(chip
, DS4510_CFG
, 1, &data
, 1))
84 if (nv
) /* Treat SEEPROM bits as EEPROM */
85 data
&= ~DS4510_CFG_SEE
;
86 else /* Treat SEEPROM bits as SRAM */
87 data
|= DS4510_CFG_SEE
;
89 return ds4510_mem_write(chip
, DS4510_CFG
, &data
, 1);
93 * Write de-assertion of reset signal delay
95 int ds4510_rstdelay_write(uint8_t chip
, uint8_t delay
)
99 if (i2c_read(chip
, DS4510_RSTDELAY
, 1, &data
, 1))
102 data
&= ~DS4510_RSTDELAY_MASK
;
103 data
|= delay
& DS4510_RSTDELAY_MASK
;
105 return ds4510_mem_write(chip
, DS4510_RSTDELAY
, &data
, 1);
109 * Write pullup characteristics of IO pins
111 int ds4510_pullup_write(uint8_t chip
, uint8_t val
)
113 val
&= DS4510_IO_MASK
;
115 return ds4510_mem_write(chip
, DS4510_PULLUP
, (uint8_t *)&val
, 1);
119 * Read pullup characteristics of IO pins
121 int ds4510_pullup_read(uint8_t chip
)
125 if (i2c_read(chip
, DS4510_PULLUP
, 1, &val
, 1))
128 return val
& DS4510_IO_MASK
;
132 * Write drive level of IO pins
134 int ds4510_gpio_write(uint8_t chip
, uint8_t val
)
139 for (i
= 0; i
< DS4510_NUM_IO
; i
++) {
140 if (i2c_read(chip
, DS4510_IO0
- i
, 1, &data
, 1))
143 if (val
& (0x1 << i
))
148 if (ds4510_mem_write(chip
, DS4510_IO0
- i
, &data
, 1))
156 * Read drive level of IO pins
158 int ds4510_gpio_read(uint8_t chip
)
164 for (i
= 0; i
< DS4510_NUM_IO
; i
++) {
165 if (i2c_read(chip
, DS4510_IO0
- i
, 1, &data
, 1))
176 * Read physical level of IO pins
178 int ds4510_gpio_read_val(uint8_t chip
)
182 if (i2c_read(chip
, DS4510_IO_STATUS
, 1, &val
, 1))
185 return val
& DS4510_IO_MASK
;
188 #ifdef CONFIG_CMD_DS4510
190 * Display DS4510 information
192 static int ds4510_info(uint8_t chip
)
198 printf("DS4510 @ 0x%x:\n\n", chip
);
200 if (i2c_read(chip
, DS4510_RSTDELAY
, 1, &data
, 1))
202 printf("rstdelay = 0x%x\n\n", data
& DS4510_RSTDELAY_MASK
);
204 if (i2c_read(chip
, DS4510_CFG
, 1, &data
, 1))
206 printf("config = 0x%x\n", data
);
207 printf(" /ready = %d\n", data
& DS4510_CFG_READY
? 1 : 0);
208 printf(" trip pt = %d\n", data
& DS4510_CFG_TRIP_POINT
? 1 : 0);
209 printf(" rst sts = %d\n", data
& DS4510_CFG_RESET
? 1 : 0);
210 printf(" /see = %d\n", data
& DS4510_CFG_SEE
? 1 : 0);
211 printf(" swrst = %d\n\n", data
& DS4510_CFG_SWRST
? 1 : 0);
213 printf("gpio pins: 3210\n");
214 printf("---------------\n");
217 tmp
= ds4510_pullup_read(chip
);
220 for (i
= DS4510_NUM_IO
- 1; i
>= 0; i
--)
221 printf("%d", (tmp
& (1 << i
)) ? 1 : 0);
225 tmp
= ds4510_gpio_read(chip
);
228 for (i
= DS4510_NUM_IO
- 1; i
>= 0; i
--)
229 printf("%d", (tmp
& (1 << i
)) ? 1 : 0);
233 tmp
= ds4510_gpio_read_val(chip
);
236 for (i
= DS4510_NUM_IO
- 1; i
>= 0; i
--)
237 printf("%d", (tmp
& (1 << i
)) ? 1 : 0);
243 cmd_tbl_t cmd_ds4510
[] = {
244 U_BOOT_CMD_MKENT(device
, 3, 0, (void *)DS4510_CMD_DEVICE
, "", ""),
245 U_BOOT_CMD_MKENT(nv
, 3, 0, (void *)DS4510_CMD_NV
, "", ""),
246 U_BOOT_CMD_MKENT(output
, 4, 0, (void *)DS4510_CMD_OUTPUT
, "", ""),
247 U_BOOT_CMD_MKENT(input
, 3, 0, (void *)DS4510_CMD_INPUT
, "", ""),
248 U_BOOT_CMD_MKENT(pullup
, 4, 0, (void *)DS4510_CMD_PULLUP
, "", ""),
249 U_BOOT_CMD_MKENT(info
, 2, 0, (void *)DS4510_CMD_INFO
, "", ""),
250 #ifdef CONFIG_CMD_DS4510_RST
251 U_BOOT_CMD_MKENT(rstdelay
, 3, 0, (void *)DS4510_CMD_RSTDELAY
, "", ""),
253 #ifdef CONFIG_CMD_DS4510_MEM
254 U_BOOT_CMD_MKENT(eeprom
, 6, 0, (void *)DS4510_CMD_EEPROM
, "", ""),
255 U_BOOT_CMD_MKENT(seeprom
, 6, 0, (void *)DS4510_CMD_SEEPROM
, "", ""),
256 U_BOOT_CMD_MKENT(sram
, 6, 0, (void *)DS4510_CMD_SRAM
, "", ""),
260 int do_ds4510(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
262 static uint8_t chip
= CONFIG_SYS_I2C_DS4510_ADDR
;
267 #ifdef CONFIG_CMD_DS4510_MEM
272 int (*rw_func
)(uint8_t, int, uint8_t *, int);
275 c
= find_cmd_tbl(argv
[1], cmd_ds4510
, ARRAY_SIZE(cmd_ds4510
));
277 /* All commands but "device" require 'maxargs' arguments */
278 if (!c
|| !((argc
== (c
->maxargs
)) ||
279 (((int)c
->cmd
== DS4510_CMD_DEVICE
) &&
280 (argc
== (c
->maxargs
- 1))))) {
281 return cmd_usage(cmdtp
);
284 /* arg2 used as chip addr and pin number */
286 ul_arg2
= simple_strtoul(argv
[2], NULL
, 16);
288 /* arg3 used as output/pullup value */
290 ul_arg3
= simple_strtoul(argv
[3], NULL
, 16);
292 switch ((int)c
->cmd
) {
293 case DS4510_CMD_DEVICE
:
296 printf("Current device address: 0x%x\n", chip
);
299 return ds4510_see_write(chip
, ul_arg2
);
300 case DS4510_CMD_OUTPUT
:
301 tmp
= ds4510_gpio_read(chip
);
305 tmp
|= (1 << ul_arg2
);
307 tmp
&= ~(1 << ul_arg2
);
308 return ds4510_gpio_write(chip
, tmp
);
309 case DS4510_CMD_INPUT
:
310 tmp
= ds4510_gpio_read_val(chip
);
313 return (tmp
& (1 << ul_arg2
)) != 0;
314 case DS4510_CMD_PULLUP
:
315 tmp
= ds4510_pullup_read(chip
);
319 tmp
|= (1 << ul_arg2
);
321 tmp
&= ~(1 << ul_arg2
);
322 return ds4510_pullup_write(chip
, tmp
);
323 case DS4510_CMD_INFO
:
324 return ds4510_info(chip
);
325 #ifdef CONFIG_CMD_DS4510_RST
326 case DS4510_CMD_RSTDELAY
:
327 return ds4510_rstdelay_write(chip
, ul_arg2
);
329 #ifdef CONFIG_CMD_DS4510_MEM
330 case DS4510_CMD_EEPROM
:
331 end
= DS4510_EEPROM
+ DS4510_EEPROM_SIZE
;
334 case DS4510_CMD_SEEPROM
:
335 end
= DS4510_SEEPROM
+ DS4510_SEEPROM_SIZE
;
336 off
= DS4510_SEEPROM
;
338 case DS4510_CMD_SRAM
:
339 end
= DS4510_SRAM
+ DS4510_SRAM_SIZE
;
344 /* We should never get here... */
348 #ifdef CONFIG_CMD_DS4510_MEM
349 /* Only eeprom, seeprom, and sram commands should make it here */
350 if (strcmp(argv
[2], "read") == 0)
351 rw_func
= ds4510_mem_read
;
352 else if (strcmp(argv
[2], "write") == 0)
353 rw_func
= ds4510_mem_write
;
355 return cmd_usage(cmdtp
);
357 addr
= simple_strtoul(argv
[3], NULL
, 16);
358 off
+= simple_strtoul(argv
[4], NULL
, 16);
359 cnt
= simple_strtoul(argv
[5], NULL
, 16);
361 if ((off
+ cnt
) > end
) {
362 printf("ERROR: invalid len\n");
366 return rw_func(chip
, off
, (uint8_t *)addr
, cnt
);
371 ds4510
, 6, 1, do_ds4510
,
372 "ds4510 eeprom/seeprom/sram/gpio access",
374 " - show or set current device address\n"
376 " - display ds4510 info\n"
377 "ds4510 output pin 0|1\n"
378 " - set pin low or high-Z\n"
380 " - read value of pin\n"
381 "ds4510 pullup pin 0|1\n"
382 " - disable/enable pullup on specified pin\n"
384 " - make gpio and seeprom writes volatile/non-volatile"
385 #ifdef CONFIG_CMD_DS4510_RST
387 "ds4510 rstdelay 0-3\n"
388 " - set reset output delay"
390 #ifdef CONFIG_CMD_DS4510_MEM
392 "ds4510 eeprom read addr off cnt\n"
393 "ds4510 eeprom write addr off cnt\n"
394 " - read/write 'cnt' bytes at EEPROM offset 'off'\n"
395 "ds4510 seeprom read addr off cnt\n"
396 "ds4510 seeprom write addr off cnt\n"
397 " - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n"
398 "ds4510 sram read addr off cnt\n"
399 "ds4510 sram write addr off cnt\n"
400 " - read/write 'cnt' bytes at SRAM offset 'off'"
403 #endif /* CONFIG_CMD_DS4510 */