2 * Copyright 2008 Extreme Engineering Solutions, Inc.
4 * SPDX-License-Identifier: GPL-2.0
8 * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
9 * and 4 programmable non-volatile GPIO pins.
17 /* Default to an address that hopefully won't corrupt other i2c devices */
18 #ifndef CONFIG_SYS_I2C_DS4510_ADDR
19 #define CONFIG_SYS_I2C_DS4510_ADDR (~0)
36 * Write to DS4510, taking page boundaries into account
38 int ds4510_mem_write(uint8_t chip
, int offset
, uint8_t *buf
, int count
)
44 wrlen
= DS4510_EEPROM_PAGE_SIZE
-
45 DS4510_EEPROM_PAGE_OFFSET(offset
);
48 if (i2c_write(chip
, offset
, 1, &buf
[i
], wrlen
))
52 * This delay isn't needed for SRAM writes but shouldn't delay
53 * things too much, so do it unconditionally for simplicity
55 udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS
* 1000);
65 * General read from DS4510
67 int ds4510_mem_read(uint8_t chip
, int offset
, uint8_t *buf
, int count
)
69 return i2c_read(chip
, offset
, 1, buf
, count
);
73 * Write SEE bit in config register.
74 * nv = 0 - Writes to SEEPROM registers behave like EEPROM
75 * nv = 1 - Writes to SEEPROM registers behave like SRAM
77 int ds4510_see_write(uint8_t chip
, uint8_t nv
)
81 if (i2c_read(chip
, DS4510_CFG
, 1, &data
, 1))
84 if (nv
) /* Treat SEEPROM bits as EEPROM */
85 data
&= ~DS4510_CFG_SEE
;
86 else /* Treat SEEPROM bits as SRAM */
87 data
|= DS4510_CFG_SEE
;
89 return ds4510_mem_write(chip
, DS4510_CFG
, &data
, 1);
93 * Write de-assertion of reset signal delay
95 int ds4510_rstdelay_write(uint8_t chip
, uint8_t delay
)
99 if (i2c_read(chip
, DS4510_RSTDELAY
, 1, &data
, 1))
102 data
&= ~DS4510_RSTDELAY_MASK
;
103 data
|= delay
& DS4510_RSTDELAY_MASK
;
105 return ds4510_mem_write(chip
, DS4510_RSTDELAY
, &data
, 1);
109 * Write pullup characteristics of IO pins
111 int ds4510_pullup_write(uint8_t chip
, uint8_t val
)
113 val
&= DS4510_IO_MASK
;
115 return ds4510_mem_write(chip
, DS4510_PULLUP
, (uint8_t *)&val
, 1);
119 * Read pullup characteristics of IO pins
121 int ds4510_pullup_read(uint8_t chip
)
125 if (i2c_read(chip
, DS4510_PULLUP
, 1, &val
, 1))
128 return val
& DS4510_IO_MASK
;
132 * Write drive level of IO pins
134 int ds4510_gpio_write(uint8_t chip
, uint8_t val
)
139 for (i
= 0; i
< DS4510_NUM_IO
; i
++) {
140 if (i2c_read(chip
, DS4510_IO0
- i
, 1, &data
, 1))
143 if (val
& (0x1 << i
))
148 if (ds4510_mem_write(chip
, DS4510_IO0
- i
, &data
, 1))
156 * Read drive level of IO pins
158 int ds4510_gpio_read(uint8_t chip
)
164 for (i
= 0; i
< DS4510_NUM_IO
; i
++) {
165 if (i2c_read(chip
, DS4510_IO0
- i
, 1, &data
, 1))
176 * Read physical level of IO pins
178 int ds4510_gpio_read_val(uint8_t chip
)
182 if (i2c_read(chip
, DS4510_IO_STATUS
, 1, &val
, 1))
185 return val
& DS4510_IO_MASK
;
188 #ifdef CONFIG_CMD_DS4510
189 #ifdef CONFIG_CMD_DS4510_INFO
191 * Display DS4510 information
193 static int ds4510_info(uint8_t chip
)
199 printf("DS4510 @ 0x%x:\n\n", chip
);
201 if (i2c_read(chip
, DS4510_RSTDELAY
, 1, &data
, 1))
203 printf("rstdelay = 0x%x\n\n", data
& DS4510_RSTDELAY_MASK
);
205 if (i2c_read(chip
, DS4510_CFG
, 1, &data
, 1))
207 printf("config = 0x%x\n", data
);
208 printf(" /ready = %d\n", data
& DS4510_CFG_READY
? 1 : 0);
209 printf(" trip pt = %d\n", data
& DS4510_CFG_TRIP_POINT
? 1 : 0);
210 printf(" rst sts = %d\n", data
& DS4510_CFG_RESET
? 1 : 0);
211 printf(" /see = %d\n", data
& DS4510_CFG_SEE
? 1 : 0);
212 printf(" swrst = %d\n\n", data
& DS4510_CFG_SWRST
? 1 : 0);
214 printf("gpio pins: 3210\n");
215 printf("---------------\n");
218 tmp
= ds4510_pullup_read(chip
);
221 for (i
= DS4510_NUM_IO
- 1; i
>= 0; i
--)
222 printf("%d", (tmp
& (1 << i
)) ? 1 : 0);
226 tmp
= ds4510_gpio_read(chip
);
229 for (i
= DS4510_NUM_IO
- 1; i
>= 0; i
--)
230 printf("%d", (tmp
& (1 << i
)) ? 1 : 0);
234 tmp
= ds4510_gpio_read_val(chip
);
237 for (i
= DS4510_NUM_IO
- 1; i
>= 0; i
--)
238 printf("%d", (tmp
& (1 << i
)) ? 1 : 0);
243 #endif /* CONFIG_CMD_DS4510_INFO */
245 cmd_tbl_t cmd_ds4510
[] = {
246 U_BOOT_CMD_MKENT(device
, 3, 0, (void *)DS4510_CMD_DEVICE
, "", ""),
247 U_BOOT_CMD_MKENT(nv
, 3, 0, (void *)DS4510_CMD_NV
, "", ""),
248 U_BOOT_CMD_MKENT(output
, 4, 0, (void *)DS4510_CMD_OUTPUT
, "", ""),
249 U_BOOT_CMD_MKENT(input
, 3, 0, (void *)DS4510_CMD_INPUT
, "", ""),
250 U_BOOT_CMD_MKENT(pullup
, 4, 0, (void *)DS4510_CMD_PULLUP
, "", ""),
251 #ifdef CONFIG_CMD_DS4510_INFO
252 U_BOOT_CMD_MKENT(info
, 2, 0, (void *)DS4510_CMD_INFO
, "", ""),
254 #ifdef CONFIG_CMD_DS4510_RST
255 U_BOOT_CMD_MKENT(rstdelay
, 3, 0, (void *)DS4510_CMD_RSTDELAY
, "", ""),
257 #ifdef CONFIG_CMD_DS4510_MEM
258 U_BOOT_CMD_MKENT(eeprom
, 6, 0, (void *)DS4510_CMD_EEPROM
, "", ""),
259 U_BOOT_CMD_MKENT(seeprom
, 6, 0, (void *)DS4510_CMD_SEEPROM
, "", ""),
260 U_BOOT_CMD_MKENT(sram
, 6, 0, (void *)DS4510_CMD_SRAM
, "", ""),
264 int do_ds4510(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
266 static uint8_t chip
= CONFIG_SYS_I2C_DS4510_ADDR
;
271 #ifdef CONFIG_CMD_DS4510_MEM
276 int (*rw_func
)(uint8_t, int, uint8_t *, int);
279 c
= find_cmd_tbl(argv
[1], cmd_ds4510
, ARRAY_SIZE(cmd_ds4510
));
281 /* All commands but "device" require 'maxargs' arguments */
282 if (!c
|| !((argc
== (c
->maxargs
)) ||
283 (((int)c
->cmd
== DS4510_CMD_DEVICE
) &&
284 (argc
== (c
->maxargs
- 1))))) {
285 return cmd_usage(cmdtp
);
288 /* arg2 used as chip addr and pin number */
290 ul_arg2
= simple_strtoul(argv
[2], NULL
, 16);
292 /* arg3 used as output/pullup value */
294 ul_arg3
= simple_strtoul(argv
[3], NULL
, 16);
296 switch ((int)c
->cmd
) {
297 case DS4510_CMD_DEVICE
:
300 printf("Current device address: 0x%x\n", chip
);
303 return ds4510_see_write(chip
, ul_arg2
);
304 case DS4510_CMD_OUTPUT
:
305 tmp
= ds4510_gpio_read(chip
);
309 tmp
|= (1 << ul_arg2
);
311 tmp
&= ~(1 << ul_arg2
);
312 return ds4510_gpio_write(chip
, tmp
);
313 case DS4510_CMD_INPUT
:
314 tmp
= ds4510_gpio_read_val(chip
);
317 return (tmp
& (1 << ul_arg2
)) != 0;
318 case DS4510_CMD_PULLUP
:
319 tmp
= ds4510_pullup_read(chip
);
323 tmp
|= (1 << ul_arg2
);
325 tmp
&= ~(1 << ul_arg2
);
326 return ds4510_pullup_write(chip
, tmp
);
327 #ifdef CONFIG_CMD_DS4510_INFO
328 case DS4510_CMD_INFO
:
329 return ds4510_info(chip
);
331 #ifdef CONFIG_CMD_DS4510_RST
332 case DS4510_CMD_RSTDELAY
:
333 return ds4510_rstdelay_write(chip
, ul_arg2
);
335 #ifdef CONFIG_CMD_DS4510_MEM
336 case DS4510_CMD_EEPROM
:
337 end
= DS4510_EEPROM
+ DS4510_EEPROM_SIZE
;
340 case DS4510_CMD_SEEPROM
:
341 end
= DS4510_SEEPROM
+ DS4510_SEEPROM_SIZE
;
342 off
= DS4510_SEEPROM
;
344 case DS4510_CMD_SRAM
:
345 end
= DS4510_SRAM
+ DS4510_SRAM_SIZE
;
350 /* We should never get here... */
354 #ifdef CONFIG_CMD_DS4510_MEM
355 /* Only eeprom, seeprom, and sram commands should make it here */
356 if (strcmp(argv
[2], "read") == 0)
357 rw_func
= ds4510_mem_read
;
358 else if (strcmp(argv
[2], "write") == 0)
359 rw_func
= ds4510_mem_write
;
361 return cmd_usage(cmdtp
);
363 addr
= simple_strtoul(argv
[3], NULL
, 16);
364 off
+= simple_strtoul(argv
[4], NULL
, 16);
365 cnt
= simple_strtoul(argv
[5], NULL
, 16);
367 if ((off
+ cnt
) > end
) {
368 printf("ERROR: invalid len\n");
372 return rw_func(chip
, off
, (uint8_t *)addr
, cnt
);
377 ds4510
, 6, 1, do_ds4510
,
378 "ds4510 eeprom/seeprom/sram/gpio access",
380 " - show or set current device address\n"
381 #ifdef CONFIG_CMD_DS4510_INFO
383 " - display ds4510 info\n"
385 "ds4510 output pin 0|1\n"
386 " - set pin low or high-Z\n"
388 " - read value of pin\n"
389 "ds4510 pullup pin 0|1\n"
390 " - disable/enable pullup on specified pin\n"
392 " - make gpio and seeprom writes volatile/non-volatile"
393 #ifdef CONFIG_CMD_DS4510_RST
395 "ds4510 rstdelay 0-3\n"
396 " - set reset output delay"
398 #ifdef CONFIG_CMD_DS4510_MEM
400 "ds4510 eeprom read addr off cnt\n"
401 "ds4510 eeprom write addr off cnt\n"
402 " - read/write 'cnt' bytes at EEPROM offset 'off'\n"
403 "ds4510 seeprom read addr off cnt\n"
404 "ds4510 seeprom write addr off cnt\n"
405 " - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n"
406 "ds4510 sram read addr off cnt\n"
407 "ds4510 sram write addr off cnt\n"
408 " - read/write 'cnt' bytes at SRAM offset 'off'"
411 #endif /* CONFIG_CMD_DS4510 */