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mmc: omap_hsmmc: use a default 52MHz max clock rate if none is specified
[people/ms/u-boot.git] / drivers / mmc / ftsdc010_mci.h
1 /*
2 * Faraday FTSDC010 Secure Digital Memory Card Host Controller
3 *
4 * Copyright (C) 2011 Andes Technology Corporation
5 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9 #include <mmc.h>
10
11 #ifndef __FTSDC010_MCI_H
12 #define __FTSDC010_MCI_H
13
14 struct ftsdc010_chip {
15 void __iomem *regs;
16 uint32_t wprot; /* write protected (locked) */
17 uint32_t rate; /* actual SD clock in Hz */
18 uint32_t sclk; /* FTSDC010 source clock in Hz */
19 uint32_t fifo; /* fifo depth in bytes */
20 uint32_t acmd;
21 struct mmc_config cfg; /* mmc configuration */
22 const char *name;
23 void *ioaddr;
24 unsigned int caps;
25 unsigned int version;
26 unsigned int clock;
27 unsigned int bus_hz;
28 unsigned int div;
29 int dev_index;
30 int dev_id;
31 int buswidth;
32 u32 fifoth_val;
33 struct mmc *mmc;
34 void *priv;
35 bool fifo_mode;
36 };
37
38
39 #ifdef CONFIG_DM_MMC
40 /* Export the operations to drivers */
41 int ftsdc010_probe(struct udevice *dev);
42 extern const struct dm_mmc_ops dm_ftsdc010_ops;
43 #endif
44 void ftsdc_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
45 uint caps, u32 max_clk, u32 min_clk);
46 void set_bus_width(struct ftsdc010_mmc __iomem *regs, struct mmc_config *cfg);
47
48 #ifdef CONFIG_BLK
49 int ftsdc010_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg);
50 #endif
51
52
53 #endif /* __FTSDC010_MCI_H */