2 * Copyright 2008, Freescale Semiconductor, Inc
5 * Based vaguely on the Linux code
7 * SPDX-License-Identifier: GPL-2.0+
14 #include <dm/device-internal.h>
20 #include <linux/list.h>
22 #include "mmc_private.h"
24 #ifndef CONFIG_DM_MMC_OPS
25 __weak
int board_mmc_getwp(struct mmc
*mmc
)
30 int mmc_getwp(struct mmc
*mmc
)
34 wp
= board_mmc_getwp(mmc
);
37 if (mmc
->cfg
->ops
->getwp
)
38 wp
= mmc
->cfg
->ops
->getwp(mmc
);
46 __weak
int board_mmc_getcd(struct mmc
*mmc
)
52 #ifdef CONFIG_MMC_TRACE
53 void mmmc_trace_before_send(struct mmc
*mmc
, struct mmc_cmd
*cmd
)
55 printf("CMD_SEND:%d\n", cmd
->cmdidx
);
56 printf("\t\tARG\t\t\t 0x%08X\n", cmd
->cmdarg
);
59 void mmmc_trace_after_send(struct mmc
*mmc
, struct mmc_cmd
*cmd
, int ret
)
65 printf("\t\tRET\t\t\t %d\n", ret
);
67 switch (cmd
->resp_type
) {
69 printf("\t\tMMC_RSP_NONE\n");
72 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
76 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
80 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
82 printf("\t\t \t\t 0x%08X \n",
84 printf("\t\t \t\t 0x%08X \n",
86 printf("\t\t \t\t 0x%08X \n",
89 printf("\t\t\t\t\tDUMPING DATA\n");
90 for (i
= 0; i
< 4; i
++) {
92 printf("\t\t\t\t\t%03d - ", i
*4);
93 ptr
= (u8
*)&cmd
->response
[i
];
95 for (j
= 0; j
< 4; j
++)
96 printf("%02X ", *ptr
--);
101 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
105 printf("\t\tERROR MMC rsp not supported\n");
111 void mmc_trace_state(struct mmc
*mmc
, struct mmc_cmd
*cmd
)
115 status
= (cmd
->response
[0] & MMC_STATUS_CURR_STATE
) >> 9;
116 printf("CURR STATE:%d\n", status
);
120 #ifndef CONFIG_DM_MMC_OPS
121 int mmc_send_cmd(struct mmc
*mmc
, struct mmc_cmd
*cmd
, struct mmc_data
*data
)
125 mmmc_trace_before_send(mmc
, cmd
);
126 ret
= mmc
->cfg
->ops
->send_cmd(mmc
, cmd
, data
);
127 mmmc_trace_after_send(mmc
, cmd
, ret
);
133 int mmc_send_status(struct mmc
*mmc
, int timeout
)
136 int err
, retries
= 5;
138 cmd
.cmdidx
= MMC_CMD_SEND_STATUS
;
139 cmd
.resp_type
= MMC_RSP_R1
;
140 if (!mmc_host_is_spi(mmc
))
141 cmd
.cmdarg
= mmc
->rca
<< 16;
144 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
146 if ((cmd
.response
[0] & MMC_STATUS_RDY_FOR_DATA
) &&
147 (cmd
.response
[0] & MMC_STATUS_CURR_STATE
) !=
150 else if (cmd
.response
[0] & MMC_STATUS_MASK
) {
151 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
152 printf("Status Error: 0x%08X\n",
157 } else if (--retries
< 0)
166 mmc_trace_state(mmc
, &cmd
);
168 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
169 printf("Timeout waiting card ready\n");
177 int mmc_set_blocklen(struct mmc
*mmc
, int len
)
184 cmd
.cmdidx
= MMC_CMD_SET_BLOCKLEN
;
185 cmd
.resp_type
= MMC_RSP_R1
;
188 return mmc_send_cmd(mmc
, &cmd
, NULL
);
191 static int mmc_read_blocks(struct mmc
*mmc
, void *dst
, lbaint_t start
,
195 struct mmc_data data
;
198 cmd
.cmdidx
= MMC_CMD_READ_MULTIPLE_BLOCK
;
200 cmd
.cmdidx
= MMC_CMD_READ_SINGLE_BLOCK
;
202 if (mmc
->high_capacity
)
205 cmd
.cmdarg
= start
* mmc
->read_bl_len
;
207 cmd
.resp_type
= MMC_RSP_R1
;
210 data
.blocks
= blkcnt
;
211 data
.blocksize
= mmc
->read_bl_len
;
212 data
.flags
= MMC_DATA_READ
;
214 if (mmc_send_cmd(mmc
, &cmd
, &data
))
218 cmd
.cmdidx
= MMC_CMD_STOP_TRANSMISSION
;
220 cmd
.resp_type
= MMC_RSP_R1b
;
221 if (mmc_send_cmd(mmc
, &cmd
, NULL
)) {
222 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
223 printf("mmc fail to send stop cmd\n");
233 ulong
mmc_bread(struct udevice
*dev
, lbaint_t start
, lbaint_t blkcnt
, void *dst
)
235 ulong
mmc_bread(struct blk_desc
*block_dev
, lbaint_t start
, lbaint_t blkcnt
,
240 struct blk_desc
*block_dev
= dev_get_uclass_platdata(dev
);
242 int dev_num
= block_dev
->devnum
;
244 lbaint_t cur
, blocks_todo
= blkcnt
;
249 struct mmc
*mmc
= find_mmc_device(dev_num
);
253 err
= blk_dselect_hwpart(block_dev
, block_dev
->hwpart
);
257 if ((start
+ blkcnt
) > block_dev
->lba
) {
258 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
259 printf("MMC: block number 0x" LBAF
" exceeds max(0x" LBAF
")\n",
260 start
+ blkcnt
, block_dev
->lba
);
265 if (mmc_set_blocklen(mmc
, mmc
->read_bl_len
)) {
266 debug("%s: Failed to set blocklen\n", __func__
);
271 cur
= (blocks_todo
> mmc
->cfg
->b_max
) ?
272 mmc
->cfg
->b_max
: blocks_todo
;
273 if (mmc_read_blocks(mmc
, dst
, start
, cur
) != cur
) {
274 debug("%s: Failed to read blocks\n", __func__
);
279 dst
+= cur
* mmc
->read_bl_len
;
280 } while (blocks_todo
> 0);
285 static int mmc_go_idle(struct mmc
*mmc
)
292 cmd
.cmdidx
= MMC_CMD_GO_IDLE_STATE
;
294 cmd
.resp_type
= MMC_RSP_NONE
;
296 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
306 static int sd_send_op_cond(struct mmc
*mmc
)
313 cmd
.cmdidx
= MMC_CMD_APP_CMD
;
314 cmd
.resp_type
= MMC_RSP_R1
;
317 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
322 cmd
.cmdidx
= SD_CMD_APP_SEND_OP_COND
;
323 cmd
.resp_type
= MMC_RSP_R3
;
326 * Most cards do not answer if some reserved bits
327 * in the ocr are set. However, Some controller
328 * can set bit 7 (reserved for low voltages), but
329 * how to manage low voltages SD card is not yet
332 cmd
.cmdarg
= mmc_host_is_spi(mmc
) ? 0 :
333 (mmc
->cfg
->voltages
& 0xff8000);
335 if (mmc
->version
== SD_VERSION_2
)
336 cmd
.cmdarg
|= OCR_HCS
;
338 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
343 if (cmd
.response
[0] & OCR_BUSY
)
352 if (mmc
->version
!= SD_VERSION_2
)
353 mmc
->version
= SD_VERSION_1_0
;
355 if (mmc_host_is_spi(mmc
)) { /* read OCR for spi */
356 cmd
.cmdidx
= MMC_CMD_SPI_READ_OCR
;
357 cmd
.resp_type
= MMC_RSP_R3
;
360 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
366 mmc
->ocr
= cmd
.response
[0];
368 mmc
->high_capacity
= ((mmc
->ocr
& OCR_HCS
) == OCR_HCS
);
374 static int mmc_send_op_cond_iter(struct mmc
*mmc
, int use_arg
)
379 cmd
.cmdidx
= MMC_CMD_SEND_OP_COND
;
380 cmd
.resp_type
= MMC_RSP_R3
;
382 if (use_arg
&& !mmc_host_is_spi(mmc
))
383 cmd
.cmdarg
= OCR_HCS
|
384 (mmc
->cfg
->voltages
&
385 (mmc
->ocr
& OCR_VOLTAGE_MASK
)) |
386 (mmc
->ocr
& OCR_ACCESS_MODE
);
388 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
391 mmc
->ocr
= cmd
.response
[0];
395 static int mmc_send_op_cond(struct mmc
*mmc
)
399 /* Some cards seem to need this */
402 /* Asking to the card its capabilities */
403 for (i
= 0; i
< 2; i
++) {
404 err
= mmc_send_op_cond_iter(mmc
, i
!= 0);
408 /* exit if not busy (flag seems to be inverted) */
409 if (mmc
->ocr
& OCR_BUSY
)
412 mmc
->op_cond_pending
= 1;
416 static int mmc_complete_op_cond(struct mmc
*mmc
)
423 mmc
->op_cond_pending
= 0;
424 if (!(mmc
->ocr
& OCR_BUSY
)) {
425 /* Some cards seem to need this */
428 start
= get_timer(0);
430 err
= mmc_send_op_cond_iter(mmc
, 1);
433 if (mmc
->ocr
& OCR_BUSY
)
435 if (get_timer(start
) > timeout
)
441 if (mmc_host_is_spi(mmc
)) { /* read OCR for spi */
442 cmd
.cmdidx
= MMC_CMD_SPI_READ_OCR
;
443 cmd
.resp_type
= MMC_RSP_R3
;
446 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
451 mmc
->ocr
= cmd
.response
[0];
454 mmc
->version
= MMC_VERSION_UNKNOWN
;
456 mmc
->high_capacity
= ((mmc
->ocr
& OCR_HCS
) == OCR_HCS
);
463 static int mmc_send_ext_csd(struct mmc
*mmc
, u8
*ext_csd
)
466 struct mmc_data data
;
469 /* Get the Card Status Register */
470 cmd
.cmdidx
= MMC_CMD_SEND_EXT_CSD
;
471 cmd
.resp_type
= MMC_RSP_R1
;
474 data
.dest
= (char *)ext_csd
;
476 data
.blocksize
= MMC_MAX_BLOCK_LEN
;
477 data
.flags
= MMC_DATA_READ
;
479 err
= mmc_send_cmd(mmc
, &cmd
, &data
);
484 int mmc_switch(struct mmc
*mmc
, u8 set
, u8 index
, u8 value
)
490 cmd
.cmdidx
= MMC_CMD_SWITCH
;
491 cmd
.resp_type
= MMC_RSP_R1b
;
492 cmd
.cmdarg
= (MMC_SWITCH_MODE_WRITE_BYTE
<< 24) |
496 ret
= mmc_send_cmd(mmc
, &cmd
, NULL
);
498 /* Waiting for the ready status */
500 ret
= mmc_send_status(mmc
, timeout
);
506 static int mmc_change_freq(struct mmc
*mmc
)
508 ALLOC_CACHE_ALIGN_BUFFER(u8
, ext_csd
, MMC_MAX_BLOCK_LEN
);
514 if (mmc_host_is_spi(mmc
))
517 /* Only version 4 supports high-speed */
518 if (mmc
->version
< MMC_VERSION_4
)
521 mmc
->card_caps
|= MMC_MODE_4BIT
| MMC_MODE_8BIT
;
523 err
= mmc_send_ext_csd(mmc
, ext_csd
);
528 cardtype
= ext_csd
[EXT_CSD_CARD_TYPE
] & 0xf;
530 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
, EXT_CSD_HS_TIMING
, 1);
535 /* Now check to see that it worked */
536 err
= mmc_send_ext_csd(mmc
, ext_csd
);
541 /* No high-speed support */
542 if (!ext_csd
[EXT_CSD_HS_TIMING
])
545 /* High Speed is set, there are two types: 52MHz and 26MHz */
546 if (cardtype
& EXT_CSD_CARD_TYPE_52
) {
547 if (cardtype
& EXT_CSD_CARD_TYPE_DDR_1_8V
)
548 mmc
->card_caps
|= MMC_MODE_DDR_52MHz
;
549 mmc
->card_caps
|= MMC_MODE_HS_52MHz
| MMC_MODE_HS
;
551 mmc
->card_caps
|= MMC_MODE_HS
;
557 static int mmc_set_capacity(struct mmc
*mmc
, int part_num
)
561 mmc
->capacity
= mmc
->capacity_user
;
565 mmc
->capacity
= mmc
->capacity_boot
;
568 mmc
->capacity
= mmc
->capacity_rpmb
;
574 mmc
->capacity
= mmc
->capacity_gp
[part_num
- 4];
580 mmc_get_blk_desc(mmc
)->lba
= lldiv(mmc
->capacity
, mmc
->read_bl_len
);
585 int mmc_switch_part(struct mmc
*mmc
, unsigned int part_num
)
589 ret
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
, EXT_CSD_PART_CONF
,
590 (mmc
->part_config
& ~PART_ACCESS_MASK
)
591 | (part_num
& PART_ACCESS_MASK
));
594 * Set the capacity if the switch succeeded or was intended
595 * to return to representing the raw device.
597 if ((ret
== 0) || ((ret
== -ENODEV
) && (part_num
== 0))) {
598 ret
= mmc_set_capacity(mmc
, part_num
);
599 mmc_get_blk_desc(mmc
)->hwpart
= part_num
;
605 int mmc_hwpart_config(struct mmc
*mmc
,
606 const struct mmc_hwpart_conf
*conf
,
607 enum mmc_hwpart_conf_mode mode
)
613 u32 max_enh_size_mult
;
614 u32 tot_enh_size_mult
= 0;
617 ALLOC_CACHE_ALIGN_BUFFER(u8
, ext_csd
, MMC_MAX_BLOCK_LEN
);
619 if (mode
< MMC_HWPART_CONF_CHECK
|| mode
> MMC_HWPART_CONF_COMPLETE
)
622 if (IS_SD(mmc
) || (mmc
->version
< MMC_VERSION_4_41
)) {
623 printf("eMMC >= 4.4 required for enhanced user data area\n");
627 if (!(mmc
->part_support
& PART_SUPPORT
)) {
628 printf("Card does not support partitioning\n");
632 if (!mmc
->hc_wp_grp_size
) {
633 printf("Card does not define HC WP group size\n");
637 /* check partition alignment and total enhanced size */
638 if (conf
->user
.enh_size
) {
639 if (conf
->user
.enh_size
% mmc
->hc_wp_grp_size
||
640 conf
->user
.enh_start
% mmc
->hc_wp_grp_size
) {
641 printf("User data enhanced area not HC WP group "
645 part_attrs
|= EXT_CSD_ENH_USR
;
646 enh_size_mult
= conf
->user
.enh_size
/ mmc
->hc_wp_grp_size
;
647 if (mmc
->high_capacity
) {
648 enh_start_addr
= conf
->user
.enh_start
;
650 enh_start_addr
= (conf
->user
.enh_start
<< 9);
656 tot_enh_size_mult
+= enh_size_mult
;
658 for (pidx
= 0; pidx
< 4; pidx
++) {
659 if (conf
->gp_part
[pidx
].size
% mmc
->hc_wp_grp_size
) {
660 printf("GP%i partition not HC WP group size "
661 "aligned\n", pidx
+1);
664 gp_size_mult
[pidx
] = conf
->gp_part
[pidx
].size
/ mmc
->hc_wp_grp_size
;
665 if (conf
->gp_part
[pidx
].size
&& conf
->gp_part
[pidx
].enhanced
) {
666 part_attrs
|= EXT_CSD_ENH_GP(pidx
);
667 tot_enh_size_mult
+= gp_size_mult
[pidx
];
671 if (part_attrs
&& ! (mmc
->part_support
& ENHNCD_SUPPORT
)) {
672 printf("Card does not support enhanced attribute\n");
676 err
= mmc_send_ext_csd(mmc
, ext_csd
);
681 (ext_csd
[EXT_CSD_MAX_ENH_SIZE_MULT
+2] << 16) +
682 (ext_csd
[EXT_CSD_MAX_ENH_SIZE_MULT
+1] << 8) +
683 ext_csd
[EXT_CSD_MAX_ENH_SIZE_MULT
];
684 if (tot_enh_size_mult
> max_enh_size_mult
) {
685 printf("Total enhanced size exceeds maximum (%u > %u)\n",
686 tot_enh_size_mult
, max_enh_size_mult
);
690 /* The default value of EXT_CSD_WR_REL_SET is device
691 * dependent, the values can only be changed if the
692 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
693 * changed only once and before partitioning is completed. */
694 wr_rel_set
= ext_csd
[EXT_CSD_WR_REL_SET
];
695 if (conf
->user
.wr_rel_change
) {
696 if (conf
->user
.wr_rel_set
)
697 wr_rel_set
|= EXT_CSD_WR_DATA_REL_USR
;
699 wr_rel_set
&= ~EXT_CSD_WR_DATA_REL_USR
;
701 for (pidx
= 0; pidx
< 4; pidx
++) {
702 if (conf
->gp_part
[pidx
].wr_rel_change
) {
703 if (conf
->gp_part
[pidx
].wr_rel_set
)
704 wr_rel_set
|= EXT_CSD_WR_DATA_REL_GP(pidx
);
706 wr_rel_set
&= ~EXT_CSD_WR_DATA_REL_GP(pidx
);
710 if (wr_rel_set
!= ext_csd
[EXT_CSD_WR_REL_SET
] &&
711 !(ext_csd
[EXT_CSD_WR_REL_PARAM
] & EXT_CSD_HS_CTRL_REL
)) {
712 puts("Card does not support host controlled partition write "
713 "reliability settings\n");
717 if (ext_csd
[EXT_CSD_PARTITION_SETTING
] &
718 EXT_CSD_PARTITION_SETTING_COMPLETED
) {
719 printf("Card already partitioned\n");
723 if (mode
== MMC_HWPART_CONF_CHECK
)
726 /* Partitioning requires high-capacity size definitions */
727 if (!(ext_csd
[EXT_CSD_ERASE_GROUP_DEF
] & 0x01)) {
728 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
729 EXT_CSD_ERASE_GROUP_DEF
, 1);
734 ext_csd
[EXT_CSD_ERASE_GROUP_DEF
] = 1;
736 /* update erase group size to be high-capacity */
737 mmc
->erase_grp_size
=
738 ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
] * 1024;
742 /* all OK, write the configuration */
743 for (i
= 0; i
< 4; i
++) {
744 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
745 EXT_CSD_ENH_START_ADDR
+i
,
746 (enh_start_addr
>> (i
*8)) & 0xFF);
750 for (i
= 0; i
< 3; i
++) {
751 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
752 EXT_CSD_ENH_SIZE_MULT
+i
,
753 (enh_size_mult
>> (i
*8)) & 0xFF);
757 for (pidx
= 0; pidx
< 4; pidx
++) {
758 for (i
= 0; i
< 3; i
++) {
759 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
760 EXT_CSD_GP_SIZE_MULT
+pidx
*3+i
,
761 (gp_size_mult
[pidx
] >> (i
*8)) & 0xFF);
766 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
767 EXT_CSD_PARTITIONS_ATTRIBUTE
, part_attrs
);
771 if (mode
== MMC_HWPART_CONF_SET
)
774 /* The WR_REL_SET is a write-once register but shall be
775 * written before setting PART_SETTING_COMPLETED. As it is
776 * write-once we can only write it when completing the
778 if (wr_rel_set
!= ext_csd
[EXT_CSD_WR_REL_SET
]) {
779 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
780 EXT_CSD_WR_REL_SET
, wr_rel_set
);
785 /* Setting PART_SETTING_COMPLETED confirms the partition
786 * configuration but it only becomes effective after power
787 * cycle, so we do not adjust the partition related settings
788 * in the mmc struct. */
790 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
791 EXT_CSD_PARTITION_SETTING
,
792 EXT_CSD_PARTITION_SETTING_COMPLETED
);
799 #ifndef CONFIG_DM_MMC_OPS
800 int mmc_getcd(struct mmc
*mmc
)
804 cd
= board_mmc_getcd(mmc
);
807 if (mmc
->cfg
->ops
->getcd
)
808 cd
= mmc
->cfg
->ops
->getcd(mmc
);
817 static int sd_switch(struct mmc
*mmc
, int mode
, int group
, u8 value
, u8
*resp
)
820 struct mmc_data data
;
822 /* Switch the frequency */
823 cmd
.cmdidx
= SD_CMD_SWITCH_FUNC
;
824 cmd
.resp_type
= MMC_RSP_R1
;
825 cmd
.cmdarg
= (mode
<< 31) | 0xffffff;
826 cmd
.cmdarg
&= ~(0xf << (group
* 4));
827 cmd
.cmdarg
|= value
<< (group
* 4);
829 data
.dest
= (char *)resp
;
832 data
.flags
= MMC_DATA_READ
;
834 return mmc_send_cmd(mmc
, &cmd
, &data
);
838 static int sd_change_freq(struct mmc
*mmc
)
842 ALLOC_CACHE_ALIGN_BUFFER(uint
, scr
, 2);
843 ALLOC_CACHE_ALIGN_BUFFER(uint
, switch_status
, 16);
844 struct mmc_data data
;
849 if (mmc_host_is_spi(mmc
))
852 /* Read the SCR to find out if this card supports higher speeds */
853 cmd
.cmdidx
= MMC_CMD_APP_CMD
;
854 cmd
.resp_type
= MMC_RSP_R1
;
855 cmd
.cmdarg
= mmc
->rca
<< 16;
857 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
862 cmd
.cmdidx
= SD_CMD_APP_SEND_SCR
;
863 cmd
.resp_type
= MMC_RSP_R1
;
869 data
.dest
= (char *)scr
;
872 data
.flags
= MMC_DATA_READ
;
874 err
= mmc_send_cmd(mmc
, &cmd
, &data
);
883 mmc
->scr
[0] = __be32_to_cpu(scr
[0]);
884 mmc
->scr
[1] = __be32_to_cpu(scr
[1]);
886 switch ((mmc
->scr
[0] >> 24) & 0xf) {
888 mmc
->version
= SD_VERSION_1_0
;
891 mmc
->version
= SD_VERSION_1_10
;
894 mmc
->version
= SD_VERSION_2
;
895 if ((mmc
->scr
[0] >> 15) & 0x1)
896 mmc
->version
= SD_VERSION_3
;
899 mmc
->version
= SD_VERSION_1_0
;
903 if (mmc
->scr
[0] & SD_DATA_4BIT
)
904 mmc
->card_caps
|= MMC_MODE_4BIT
;
906 /* Version 1.0 doesn't support switching */
907 if (mmc
->version
== SD_VERSION_1_0
)
912 err
= sd_switch(mmc
, SD_SWITCH_CHECK
, 0, 1,
913 (u8
*)switch_status
);
918 /* The high-speed function is busy. Try again */
919 if (!(__be32_to_cpu(switch_status
[7]) & SD_HIGHSPEED_BUSY
))
923 /* If high-speed isn't supported, we return */
924 if (!(__be32_to_cpu(switch_status
[3]) & SD_HIGHSPEED_SUPPORTED
))
928 * If the host doesn't support SD_HIGHSPEED, do not switch card to
929 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
930 * This can avoid furthur problem when the card runs in different
931 * mode between the host.
933 if (!((mmc
->cfg
->host_caps
& MMC_MODE_HS_52MHz
) &&
934 (mmc
->cfg
->host_caps
& MMC_MODE_HS
)))
937 err
= sd_switch(mmc
, SD_SWITCH_SWITCH
, 0, 1, (u8
*)switch_status
);
942 if ((__be32_to_cpu(switch_status
[4]) & 0x0f000000) == 0x01000000)
943 mmc
->card_caps
|= MMC_MODE_HS
;
948 /* frequency bases */
949 /* divided by 10 to be nice to platforms without floating point */
950 static const int fbase
[] = {
957 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
958 * to platforms without floating point.
960 static const u8 multipliers
[] = {
979 #ifndef CONFIG_DM_MMC_OPS
980 static void mmc_set_ios(struct mmc
*mmc
)
982 if (mmc
->cfg
->ops
->set_ios
)
983 mmc
->cfg
->ops
->set_ios(mmc
);
987 void mmc_set_clock(struct mmc
*mmc
, uint clock
)
989 if (clock
> mmc
->cfg
->f_max
)
990 clock
= mmc
->cfg
->f_max
;
992 if (clock
< mmc
->cfg
->f_min
)
993 clock
= mmc
->cfg
->f_min
;
1000 static void mmc_set_bus_width(struct mmc
*mmc
, uint width
)
1002 mmc
->bus_width
= width
;
1007 static int mmc_startup(struct mmc
*mmc
)
1011 u64 cmult
, csize
, capacity
;
1013 ALLOC_CACHE_ALIGN_BUFFER(u8
, ext_csd
, MMC_MAX_BLOCK_LEN
);
1014 ALLOC_CACHE_ALIGN_BUFFER(u8
, test_csd
, MMC_MAX_BLOCK_LEN
);
1016 bool has_parts
= false;
1017 bool part_completed
;
1018 struct blk_desc
*bdesc
;
1020 #ifdef CONFIG_MMC_SPI_CRC_ON
1021 if (mmc_host_is_spi(mmc
)) { /* enable CRC check for spi */
1022 cmd
.cmdidx
= MMC_CMD_SPI_CRC_ON_OFF
;
1023 cmd
.resp_type
= MMC_RSP_R1
;
1025 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1032 /* Put the Card in Identify Mode */
1033 cmd
.cmdidx
= mmc_host_is_spi(mmc
) ? MMC_CMD_SEND_CID
:
1034 MMC_CMD_ALL_SEND_CID
; /* cmd not supported in spi */
1035 cmd
.resp_type
= MMC_RSP_R2
;
1038 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1043 memcpy(mmc
->cid
, cmd
.response
, 16);
1046 * For MMC cards, set the Relative Address.
1047 * For SD cards, get the Relatvie Address.
1048 * This also puts the cards into Standby State
1050 if (!mmc_host_is_spi(mmc
)) { /* cmd not supported in spi */
1051 cmd
.cmdidx
= SD_CMD_SEND_RELATIVE_ADDR
;
1052 cmd
.cmdarg
= mmc
->rca
<< 16;
1053 cmd
.resp_type
= MMC_RSP_R6
;
1055 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1061 mmc
->rca
= (cmd
.response
[0] >> 16) & 0xffff;
1064 /* Get the Card-Specific Data */
1065 cmd
.cmdidx
= MMC_CMD_SEND_CSD
;
1066 cmd
.resp_type
= MMC_RSP_R2
;
1067 cmd
.cmdarg
= mmc
->rca
<< 16;
1069 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1071 /* Waiting for the ready status */
1072 mmc_send_status(mmc
, timeout
);
1077 mmc
->csd
[0] = cmd
.response
[0];
1078 mmc
->csd
[1] = cmd
.response
[1];
1079 mmc
->csd
[2] = cmd
.response
[2];
1080 mmc
->csd
[3] = cmd
.response
[3];
1082 if (mmc
->version
== MMC_VERSION_UNKNOWN
) {
1083 int version
= (cmd
.response
[0] >> 26) & 0xf;
1087 mmc
->version
= MMC_VERSION_1_2
;
1090 mmc
->version
= MMC_VERSION_1_4
;
1093 mmc
->version
= MMC_VERSION_2_2
;
1096 mmc
->version
= MMC_VERSION_3
;
1099 mmc
->version
= MMC_VERSION_4
;
1102 mmc
->version
= MMC_VERSION_1_2
;
1107 /* divide frequency by 10, since the mults are 10x bigger */
1108 freq
= fbase
[(cmd
.response
[0] & 0x7)];
1109 mult
= multipliers
[((cmd
.response
[0] >> 3) & 0xf)];
1111 mmc
->tran_speed
= freq
* mult
;
1113 mmc
->dsr_imp
= ((cmd
.response
[1] >> 12) & 0x1);
1114 mmc
->read_bl_len
= 1 << ((cmd
.response
[1] >> 16) & 0xf);
1117 mmc
->write_bl_len
= mmc
->read_bl_len
;
1119 mmc
->write_bl_len
= 1 << ((cmd
.response
[3] >> 22) & 0xf);
1121 if (mmc
->high_capacity
) {
1122 csize
= (mmc
->csd
[1] & 0x3f) << 16
1123 | (mmc
->csd
[2] & 0xffff0000) >> 16;
1126 csize
= (mmc
->csd
[1] & 0x3ff) << 2
1127 | (mmc
->csd
[2] & 0xc0000000) >> 30;
1128 cmult
= (mmc
->csd
[2] & 0x00038000) >> 15;
1131 mmc
->capacity_user
= (csize
+ 1) << (cmult
+ 2);
1132 mmc
->capacity_user
*= mmc
->read_bl_len
;
1133 mmc
->capacity_boot
= 0;
1134 mmc
->capacity_rpmb
= 0;
1135 for (i
= 0; i
< 4; i
++)
1136 mmc
->capacity_gp
[i
] = 0;
1138 if (mmc
->read_bl_len
> MMC_MAX_BLOCK_LEN
)
1139 mmc
->read_bl_len
= MMC_MAX_BLOCK_LEN
;
1141 if (mmc
->write_bl_len
> MMC_MAX_BLOCK_LEN
)
1142 mmc
->write_bl_len
= MMC_MAX_BLOCK_LEN
;
1144 if ((mmc
->dsr_imp
) && (0xffffffff != mmc
->dsr
)) {
1145 cmd
.cmdidx
= MMC_CMD_SET_DSR
;
1146 cmd
.cmdarg
= (mmc
->dsr
& 0xffff) << 16;
1147 cmd
.resp_type
= MMC_RSP_NONE
;
1148 if (mmc_send_cmd(mmc
, &cmd
, NULL
))
1149 printf("MMC: SET_DSR failed\n");
1152 /* Select the card, and put it into Transfer Mode */
1153 if (!mmc_host_is_spi(mmc
)) { /* cmd not supported in spi */
1154 cmd
.cmdidx
= MMC_CMD_SELECT_CARD
;
1155 cmd
.resp_type
= MMC_RSP_R1
;
1156 cmd
.cmdarg
= mmc
->rca
<< 16;
1157 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1164 * For SD, its erase group is always one sector
1166 mmc
->erase_grp_size
= 1;
1167 mmc
->part_config
= MMCPART_NOAVAILABLE
;
1168 if (!IS_SD(mmc
) && (mmc
->version
>= MMC_VERSION_4
)) {
1169 /* check ext_csd version and capacity */
1170 err
= mmc_send_ext_csd(mmc
, ext_csd
);
1173 if (ext_csd
[EXT_CSD_REV
] >= 2) {
1175 * According to the JEDEC Standard, the value of
1176 * ext_csd's capacity is valid if the value is more
1179 capacity
= ext_csd
[EXT_CSD_SEC_CNT
] << 0
1180 | ext_csd
[EXT_CSD_SEC_CNT
+ 1] << 8
1181 | ext_csd
[EXT_CSD_SEC_CNT
+ 2] << 16
1182 | ext_csd
[EXT_CSD_SEC_CNT
+ 3] << 24;
1183 capacity
*= MMC_MAX_BLOCK_LEN
;
1184 if ((capacity
>> 20) > 2 * 1024)
1185 mmc
->capacity_user
= capacity
;
1188 switch (ext_csd
[EXT_CSD_REV
]) {
1190 mmc
->version
= MMC_VERSION_4_1
;
1193 mmc
->version
= MMC_VERSION_4_2
;
1196 mmc
->version
= MMC_VERSION_4_3
;
1199 mmc
->version
= MMC_VERSION_4_41
;
1202 mmc
->version
= MMC_VERSION_4_5
;
1205 mmc
->version
= MMC_VERSION_5_0
;
1208 mmc
->version
= MMC_VERSION_5_1
;
1212 /* The partition data may be non-zero but it is only
1213 * effective if PARTITION_SETTING_COMPLETED is set in
1214 * EXT_CSD, so ignore any data if this bit is not set,
1215 * except for enabling the high-capacity group size
1216 * definition (see below). */
1217 part_completed
= !!(ext_csd
[EXT_CSD_PARTITION_SETTING
] &
1218 EXT_CSD_PARTITION_SETTING_COMPLETED
);
1220 /* store the partition info of emmc */
1221 mmc
->part_support
= ext_csd
[EXT_CSD_PARTITIONING_SUPPORT
];
1222 if ((ext_csd
[EXT_CSD_PARTITIONING_SUPPORT
] & PART_SUPPORT
) ||
1223 ext_csd
[EXT_CSD_BOOT_MULT
])
1224 mmc
->part_config
= ext_csd
[EXT_CSD_PART_CONF
];
1225 if (part_completed
&&
1226 (ext_csd
[EXT_CSD_PARTITIONING_SUPPORT
] & ENHNCD_SUPPORT
))
1227 mmc
->part_attr
= ext_csd
[EXT_CSD_PARTITIONS_ATTRIBUTE
];
1229 mmc
->capacity_boot
= ext_csd
[EXT_CSD_BOOT_MULT
] << 17;
1231 mmc
->capacity_rpmb
= ext_csd
[EXT_CSD_RPMB_MULT
] << 17;
1233 for (i
= 0; i
< 4; i
++) {
1234 int idx
= EXT_CSD_GP_SIZE_MULT
+ i
* 3;
1235 uint mult
= (ext_csd
[idx
+ 2] << 16) +
1236 (ext_csd
[idx
+ 1] << 8) + ext_csd
[idx
];
1239 if (!part_completed
)
1241 mmc
->capacity_gp
[i
] = mult
;
1242 mmc
->capacity_gp
[i
] *=
1243 ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
];
1244 mmc
->capacity_gp
[i
] *= ext_csd
[EXT_CSD_HC_WP_GRP_SIZE
];
1245 mmc
->capacity_gp
[i
] <<= 19;
1248 if (part_completed
) {
1249 mmc
->enh_user_size
=
1250 (ext_csd
[EXT_CSD_ENH_SIZE_MULT
+2] << 16) +
1251 (ext_csd
[EXT_CSD_ENH_SIZE_MULT
+1] << 8) +
1252 ext_csd
[EXT_CSD_ENH_SIZE_MULT
];
1253 mmc
->enh_user_size
*= ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
];
1254 mmc
->enh_user_size
*= ext_csd
[EXT_CSD_HC_WP_GRP_SIZE
];
1255 mmc
->enh_user_size
<<= 19;
1256 mmc
->enh_user_start
=
1257 (ext_csd
[EXT_CSD_ENH_START_ADDR
+3] << 24) +
1258 (ext_csd
[EXT_CSD_ENH_START_ADDR
+2] << 16) +
1259 (ext_csd
[EXT_CSD_ENH_START_ADDR
+1] << 8) +
1260 ext_csd
[EXT_CSD_ENH_START_ADDR
];
1261 if (mmc
->high_capacity
)
1262 mmc
->enh_user_start
<<= 9;
1266 * Host needs to enable ERASE_GRP_DEF bit if device is
1267 * partitioned. This bit will be lost every time after a reset
1268 * or power off. This will affect erase size.
1272 if ((ext_csd
[EXT_CSD_PARTITIONING_SUPPORT
] & PART_SUPPORT
) &&
1273 (ext_csd
[EXT_CSD_PARTITIONS_ATTRIBUTE
] & PART_ENH_ATTRIB
))
1276 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
1277 EXT_CSD_ERASE_GROUP_DEF
, 1);
1282 ext_csd
[EXT_CSD_ERASE_GROUP_DEF
] = 1;
1285 if (ext_csd
[EXT_CSD_ERASE_GROUP_DEF
] & 0x01) {
1286 /* Read out group size from ext_csd */
1287 mmc
->erase_grp_size
=
1288 ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
] * 1024;
1290 * if high capacity and partition setting completed
1291 * SEC_COUNT is valid even if it is smaller than 2 GiB
1292 * JEDEC Standard JESD84-B45, 6.2.4
1294 if (mmc
->high_capacity
&& part_completed
) {
1295 capacity
= (ext_csd
[EXT_CSD_SEC_CNT
]) |
1296 (ext_csd
[EXT_CSD_SEC_CNT
+ 1] << 8) |
1297 (ext_csd
[EXT_CSD_SEC_CNT
+ 2] << 16) |
1298 (ext_csd
[EXT_CSD_SEC_CNT
+ 3] << 24);
1299 capacity
*= MMC_MAX_BLOCK_LEN
;
1300 mmc
->capacity_user
= capacity
;
1303 /* Calculate the group size from the csd value. */
1304 int erase_gsz
, erase_gmul
;
1305 erase_gsz
= (mmc
->csd
[2] & 0x00007c00) >> 10;
1306 erase_gmul
= (mmc
->csd
[2] & 0x000003e0) >> 5;
1307 mmc
->erase_grp_size
= (erase_gsz
+ 1)
1311 mmc
->hc_wp_grp_size
= 1024
1312 * ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
]
1313 * ext_csd
[EXT_CSD_HC_WP_GRP_SIZE
];
1315 mmc
->wr_rel_set
= ext_csd
[EXT_CSD_WR_REL_SET
];
1318 err
= mmc_set_capacity(mmc
, mmc_get_blk_desc(mmc
)->hwpart
);
1323 err
= sd_change_freq(mmc
);
1325 err
= mmc_change_freq(mmc
);
1330 /* Restrict card's capabilities by what the host can do */
1331 mmc
->card_caps
&= mmc
->cfg
->host_caps
;
1334 if (mmc
->card_caps
& MMC_MODE_4BIT
) {
1335 cmd
.cmdidx
= MMC_CMD_APP_CMD
;
1336 cmd
.resp_type
= MMC_RSP_R1
;
1337 cmd
.cmdarg
= mmc
->rca
<< 16;
1339 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1343 cmd
.cmdidx
= SD_CMD_APP_SET_BUS_WIDTH
;
1344 cmd
.resp_type
= MMC_RSP_R1
;
1346 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1350 mmc_set_bus_width(mmc
, 4);
1353 if (mmc
->card_caps
& MMC_MODE_HS
)
1354 mmc
->tran_speed
= 50000000;
1356 mmc
->tran_speed
= 25000000;
1357 } else if (mmc
->version
>= MMC_VERSION_4
) {
1358 /* Only version 4 of MMC supports wider bus widths */
1361 /* An array of possible bus widths in order of preference */
1362 static unsigned ext_csd_bits
[] = {
1363 EXT_CSD_DDR_BUS_WIDTH_8
,
1364 EXT_CSD_DDR_BUS_WIDTH_4
,
1365 EXT_CSD_BUS_WIDTH_8
,
1366 EXT_CSD_BUS_WIDTH_4
,
1367 EXT_CSD_BUS_WIDTH_1
,
1370 /* An array to map CSD bus widths to host cap bits */
1371 static unsigned ext_to_hostcaps
[] = {
1372 [EXT_CSD_DDR_BUS_WIDTH_4
] =
1373 MMC_MODE_DDR_52MHz
| MMC_MODE_4BIT
,
1374 [EXT_CSD_DDR_BUS_WIDTH_8
] =
1375 MMC_MODE_DDR_52MHz
| MMC_MODE_8BIT
,
1376 [EXT_CSD_BUS_WIDTH_4
] = MMC_MODE_4BIT
,
1377 [EXT_CSD_BUS_WIDTH_8
] = MMC_MODE_8BIT
,
1380 /* An array to map chosen bus width to an integer */
1381 static unsigned widths
[] = {
1385 for (idx
=0; idx
< ARRAY_SIZE(ext_csd_bits
); idx
++) {
1386 unsigned int extw
= ext_csd_bits
[idx
];
1387 unsigned int caps
= ext_to_hostcaps
[extw
];
1390 * If the bus width is still not changed,
1391 * don't try to set the default again.
1392 * Otherwise, recover from switch attempts
1393 * by switching to 1-bit bus width.
1395 if (extw
== EXT_CSD_BUS_WIDTH_1
&&
1396 mmc
->bus_width
== 1) {
1402 * Check to make sure the card and controller support
1403 * these capabilities
1405 if ((mmc
->card_caps
& caps
) != caps
)
1408 err
= mmc_switch(mmc
, EXT_CSD_CMD_SET_NORMAL
,
1409 EXT_CSD_BUS_WIDTH
, extw
);
1414 mmc
->ddr_mode
= (caps
& MMC_MODE_DDR_52MHz
) ? 1 : 0;
1415 mmc_set_bus_width(mmc
, widths
[idx
]);
1417 err
= mmc_send_ext_csd(mmc
, test_csd
);
1422 /* Only compare read only fields */
1423 if (ext_csd
[EXT_CSD_PARTITIONING_SUPPORT
]
1424 == test_csd
[EXT_CSD_PARTITIONING_SUPPORT
] &&
1425 ext_csd
[EXT_CSD_HC_WP_GRP_SIZE
]
1426 == test_csd
[EXT_CSD_HC_WP_GRP_SIZE
] &&
1427 ext_csd
[EXT_CSD_REV
]
1428 == test_csd
[EXT_CSD_REV
] &&
1429 ext_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
]
1430 == test_csd
[EXT_CSD_HC_ERASE_GRP_SIZE
] &&
1431 memcmp(&ext_csd
[EXT_CSD_SEC_CNT
],
1432 &test_csd
[EXT_CSD_SEC_CNT
], 4) == 0)
1441 if (mmc
->card_caps
& MMC_MODE_HS
) {
1442 if (mmc
->card_caps
& MMC_MODE_HS_52MHz
)
1443 mmc
->tran_speed
= 52000000;
1445 mmc
->tran_speed
= 26000000;
1449 mmc_set_clock(mmc
, mmc
->tran_speed
);
1451 /* Fix the block length for DDR mode */
1452 if (mmc
->ddr_mode
) {
1453 mmc
->read_bl_len
= MMC_MAX_BLOCK_LEN
;
1454 mmc
->write_bl_len
= MMC_MAX_BLOCK_LEN
;
1457 /* fill in device description */
1458 bdesc
= mmc_get_blk_desc(mmc
);
1462 bdesc
->blksz
= mmc
->read_bl_len
;
1463 bdesc
->log2blksz
= LOG2(bdesc
->blksz
);
1464 bdesc
->lba
= lldiv(mmc
->capacity
, mmc
->read_bl_len
);
1465 #if !defined(CONFIG_SPL_BUILD) || \
1466 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1467 !defined(CONFIG_USE_TINY_PRINTF))
1468 sprintf(bdesc
->vendor
, "Man %06x Snr %04x%04x",
1469 mmc
->cid
[0] >> 24, (mmc
->cid
[2] & 0xffff),
1470 (mmc
->cid
[3] >> 16) & 0xffff);
1471 sprintf(bdesc
->product
, "%c%c%c%c%c%c", mmc
->cid
[0] & 0xff,
1472 (mmc
->cid
[1] >> 24), (mmc
->cid
[1] >> 16) & 0xff,
1473 (mmc
->cid
[1] >> 8) & 0xff, mmc
->cid
[1] & 0xff,
1474 (mmc
->cid
[2] >> 24) & 0xff);
1475 sprintf(bdesc
->revision
, "%d.%d", (mmc
->cid
[2] >> 20) & 0xf,
1476 (mmc
->cid
[2] >> 16) & 0xf);
1478 bdesc
->vendor
[0] = 0;
1479 bdesc
->product
[0] = 0;
1480 bdesc
->revision
[0] = 0;
1482 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1489 static int mmc_send_if_cond(struct mmc
*mmc
)
1494 cmd
.cmdidx
= SD_CMD_SEND_IF_COND
;
1495 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1496 cmd
.cmdarg
= ((mmc
->cfg
->voltages
& 0xff8000) != 0) << 8 | 0xaa;
1497 cmd
.resp_type
= MMC_RSP_R7
;
1499 err
= mmc_send_cmd(mmc
, &cmd
, NULL
);
1504 if ((cmd
.response
[0] & 0xff) != 0xaa)
1507 mmc
->version
= SD_VERSION_2
;
1512 /* board-specific MMC power initializations. */
1513 __weak
void board_mmc_power_init(void)
1517 int mmc_start_init(struct mmc
*mmc
)
1522 /* we pretend there's no card when init is NULL */
1523 no_card
= mmc_getcd(mmc
) == 0;
1524 #ifndef CONFIG_DM_MMC_OPS
1525 no_card
= no_card
|| (mmc
->cfg
->ops
->init
== NULL
);
1529 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1530 printf("MMC: no card present\n");
1538 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1539 mmc_adapter_card_type_ident();
1541 board_mmc_power_init();
1543 #ifdef CONFIG_DM_MMC_OPS
1544 /* The device has already been probed ready for use */
1546 /* made sure it's not NULL earlier */
1547 err
= mmc
->cfg
->ops
->init(mmc
);
1552 mmc_set_bus_width(mmc
, 1);
1553 mmc_set_clock(mmc
, 1);
1555 /* Reset the Card */
1556 err
= mmc_go_idle(mmc
);
1561 /* The internal partition reset to user partition(0) at every CMD0*/
1562 mmc_get_blk_desc(mmc
)->hwpart
= 0;
1564 /* Test for SD version 2 */
1565 err
= mmc_send_if_cond(mmc
);
1567 /* Now try to get the SD card's operating condition */
1568 err
= sd_send_op_cond(mmc
);
1570 /* If the command timed out, we check for an MMC card */
1571 if (err
== -ETIMEDOUT
) {
1572 err
= mmc_send_op_cond(mmc
);
1575 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1576 printf("Card did not respond to voltage select!\n");
1583 mmc
->init_in_progress
= 1;
1588 static int mmc_complete_init(struct mmc
*mmc
)
1592 mmc
->init_in_progress
= 0;
1593 if (mmc
->op_cond_pending
)
1594 err
= mmc_complete_op_cond(mmc
);
1597 err
= mmc_startup(mmc
);
1605 int mmc_init(struct mmc
*mmc
)
1609 #ifdef CONFIG_DM_MMC
1610 struct mmc_uclass_priv
*upriv
= dev_get_uclass_priv(mmc
->dev
);
1617 start
= get_timer(0);
1619 if (!mmc
->init_in_progress
)
1620 err
= mmc_start_init(mmc
);
1623 err
= mmc_complete_init(mmc
);
1624 debug("%s: %d, time %lu\n", __func__
, err
, get_timer(start
));
1628 int mmc_set_dsr(struct mmc
*mmc
, u16 val
)
1634 /* CPU-specific MMC initializations */
1635 __weak
int cpu_mmc_init(bd_t
*bis
)
1640 /* board-specific MMC initializations. */
1641 __weak
int board_mmc_init(bd_t
*bis
)
1646 void mmc_set_preinit(struct mmc
*mmc
, int preinit
)
1648 mmc
->preinit
= preinit
;
1651 #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1652 static int mmc_probe(bd_t
*bis
)
1656 #elif defined(CONFIG_DM_MMC)
1657 static int mmc_probe(bd_t
*bis
)
1661 struct udevice
*dev
;
1663 ret
= uclass_get(UCLASS_MMC
, &uc
);
1668 * Try to add them in sequence order. Really with driver model we
1669 * should allow holes, but the current MMC list does not allow that.
1670 * So if we request 0, 1, 3 we will get 0, 1, 2.
1672 for (i
= 0; ; i
++) {
1673 ret
= uclass_get_device_by_seq(UCLASS_MMC
, i
, &dev
);
1677 uclass_foreach_dev(dev
, uc
) {
1678 ret
= device_probe(dev
);
1680 printf("%s - probe failed: %d\n", dev
->name
, ret
);
1686 static int mmc_probe(bd_t
*bis
)
1688 if (board_mmc_init(bis
) < 0)
1695 int mmc_initialize(bd_t
*bis
)
1697 static int initialized
= 0;
1699 if (initialized
) /* Avoid initializing mmc multiple times */
1706 ret
= mmc_probe(bis
);
1710 #ifndef CONFIG_SPL_BUILD
1711 print_mmc_devices(',');